DC I-V characteristics of field emitter triodes

A simple model that is applicable to Spindt-type emitter triodes is presented. Experimentally, it has been observed that the gate current at zero collector voltage follows the same Fowler-Nordheim law as the collector current at high collector voltage, and that for low emission current densities, the sum of gate and collector currents is constant for any collector voltage and is given by the Fowler-Nordheim current I_FN. Based on these observations, a simple model has been developed to calculate the I-V characteristics of a triode. By measuring the Fowler-Nordheim emission, emission area and field enhancement can be obtained assuming a value for the barrier height. Incorporating the gate current, the collector current can be calculated from I_c=I_FN-I_g as a function of collector voltage. The model's accuracy is best at low current density. At higher emission currents, deviations occur at low collector voltages because the constancy of gate and collector currents is violated     

Frequency doubling in GaAs/AlGaAs field effect transistor usingreal space transfer

A modified field effect transistor (FET) topology is used which enhances the real space transfer of carrier out of the channel toward a special collector terminal. The drain current rises, peaks, and then reduces as gate voltage is increased due to a steep rise in collector current with gate voltage. When biased near the peak, the AC drain current induced by the gate is folded over becoming frequency doubled. The device exhibits functional multiplexing being operable as either a positive transconductance, negative transconductance, or frequency doubling element setable via quiescent gate voltage     

Charge-driven HF transistor-tuned power amplifier

A new approach to the design of HF transistor-tuned power amplifiers is proposed that uses the concepts of charge control. A circuit arrangement and design technique is described that allows the performance of tuned power amplifiers operating at high frequencies to be specified and predicted accurately. The collector current of a transistor is, within limits, proportional to the charge stored in the base. A technique is described that defines this stored charge by a sinusoidal drive voltage across a capacitor in series with the base. Sinusoidally varying charge in phase with the drive voltage is injected into the base and approximately forms a truncated sinusoid of collector current with a predictable and controlled conduction angle and height. Dynamic collector characteristics are described that relate the stored base charge to the collector voltage and current. From these, or by direct measurement, are obtained dynamic constant current curves that are plotted on the graph of base charge versus collector voltage. This graph enables the collector current pulse shape to be predicted, and thus the difficult design problem where the collector current pulse shape is unknown is overcome. An amplifier is designed using this technique, and design and experimental results are in good agreement.     

Increase of critical current density and voltage for triggering avalanche injection through use of graded collector doping

In this paper it is shown that both critical current density and voltage of an epitaxial bipolar power transistor with an inductive load, which are taken as a measure of its susceptibility to avalanche injection, can be significantly increased by using double graded collector doping profiles. The first graded portion gives the required current protection level and the steeper second graded profile can be used to increase the voltage protection level. Calculations are carried out for optimum collector parameters to achieve minimum resistance for the required open base breakdown voltage. Results are compared with uniformly doped profile for the same collector resistance and open base voltage. It is shown that a device with graded collector is less prone to failure due to avalanche injection.     

The saturation characteristics of n-p-ν-n power transistors

The transport equations and charge-control concepts are applied in an analysis of a static conductivity-modulation mechanism occurring in the collector region of n-p-ν-n power transistors. This results in an expression for collector-emitter saturation voltage as a function of terminal currents and device parameters. An expression is derived which describes the current gain characteristics of saturated epitaxial and triple-diffused devices. The analysis is also used to illustrate the relationship between the emitter metallization resistance, collector charge storage, and the turn-off crowding mechanism experienced by high-frequency saturating transistor switches. An analysis of a time-dependent collector conductivity modulation process is used to derive an expression which describes the repetition frequency dependence of the collector-emitter saturation voltage of an epitaxial (or triple-diffused) transistor switching a square wave of collector current. It is concluded that frequency-dependent edge-crowding mechanisms occur only at much higher frequencies than those considered in this study.     

多级降压收集极行波管高压电源的设计

为了提高真空管雷达发射机的效率、缩小整机的体积和重量,常使用多级降压收集极行波管作为功率射频放大器.为了保证多级降压收集极行波管高增益、高效率和良好线性等性能发挥的更好,就要在行波管每个电极上加合适的电压,确保行波管内建立稳定的电场.因此,根据行波管各电极的特性合理地选择各收集极的电压以及合理的设计高压电源显得尤其重要.文中结合多级降压收集极行波管的工作特性介绍了4种高压电源的设计方法及其特点.     

A new high breakdown voltage lateral Schottky collector bipolar transistor on SOI: design and analysis

Using two-dimensional process and device simulation, we present for the first time, a new high breakdown voltage two-zone base extended buried oxide (BOX) lateral Schottky Collector Bipolar Transistor (SCBT) on silicon-on-insulator with a breakdown voltage as high as 12 times that of the conventional lateral Schottky collector bipolar transistor. We have explained the new design features of the proposed Schottky collector structure and the reasons for its significantly improved breakdown performance. The proposed structure is expected to be suitable in the design of the new generation scaled high voltage Schottky collector bipolar transistors for low power high speed analog applications.     

Diode operation of a transistor in functional blocks

Many functional blocks have a basic double-diffused three-layer n-p-n or p-n-p structure to permit the incorporation of transistors. If diodes are also to be incorporated in the block, it is often more convenient to connect the transistor structure already present as a diode so that "batch" processing can be used. There are five different ways to connect a transistor as a diode, either by opening certain electrodes or by short-circuiting a pair of electrodes. The different connections are compared both analytically and experimentally on the basis of forward voltage drop, recovery time and reverse characteristics. It is found that the shorted collector -base connection has the shortest recovery time, comparable to fast computer diodes, and a lower forward voltage drop than the open collector diode connection. The performance is almost equivalent to a diode with a metallic contact in place of the collector. The shorted emitter-base connection has the lowest forward voltage drop. There is good agreement between theory and experiments. The applications of this analysis to the design and fabrication of a high-speed nonsaturated diode-emitter follower AND gate functional block will be illustrated.     

Transient analysis of stored charge in neutral base region

The authors studied the transient relationship between stored charge in the neutral base region and electron current flowing through emitter and collector terminals. Stored charge flows not only through an emitter terminal but also through a collector terminal when emitter-base junction voltage decreases from the switch-on voltage to zero. The ratio of net charge flowing through the emitter terminal to that flowing through the collector terminal is 2:1 once a steady state has been reached. No charge accumulates through the collector terminal when the emitter-base junction voltage increases from zero to the switch-on voltage, however, so the charge partition ratio depends on the sign of the time gradient of the emitter-base voltage     

Demonstration of low-knee voltage high-breakdown GaInP double HBTsusing novel compound collector design

We have demonstrated a heterojunction bipolar transistor using a novel compound collector (CCHBT) design that allows a low-knee voltage and high-breakdown voltage to be obtained simultaneously. The novel aspect of this design is to use a short wide band-gap collector only over a narrow portion of the collector, where the field is highest. This allows support of high fields while maintaining a low overall collector resistance due to the higher mobility of the narrow band-gap material. We demonstrate an offset voltage reduction of about 35% and a knee-voltage reduction of 30%, while increasing both BVCEO and BVCBO by 20 and 27%, respectively, compared to a single heterojunction device of the same collector length     

Collector/emitter offset voltage in double-heterojunction bipolar transistors

Double-heterojunction bipolar transistors (DHBT) can exhibit a large collector/emitter offset voltage at zero collector current which will adversely affect digital switching circuits. It is shown that this effect results from insufficient grading at the base/collector heterojunction. A GaAlAs/GaAs DHBT grown by MBE having a 130 ? compositional grading at the emitter/base and base/collector junction showed no sign of the collector/emitter offset voltage.     

Class E tuned power amplifier with nonsinusoidal output voltage

An analysis is presented of the amplifier for a limiting case when the load network does not contain a series-resonant output circuit and the output voltage is non-sinusoidal. For optimum operation with any switch-duty ratio, the author has determined the current and voltage waveforms, the collector current and collector-emitter peak values, the output power, the power-output capability, and the load-network component values. The spectrum of the output voltage is given for a switch-duty ratio of 0.25, 0.5, and 0.75. Close-approximation equations are given for transistor power losses and collector efficiency. The experimental and theoretical results are in very good agreement. The measured collector efficiency is 95%. The circuit has practical applications, e.g., in high-efficiency switching-mode DC-to-DC converters used in DC power supplies for microcomputers or communication equipment.     

达林顿晶体管的PSpice建模和仿真

达林顿晶体管的PSpice建模优化是在室温下完成的,一些典型的NPN达林顿对的电子特征是基于芯片TIP120仿真的,比如在不同的集电极-射极饱和电压状态下的电流增益（hVE）,集电极电流VS,输入级电流,以及集电极-射极饱和电压和集电极电流之间的关系。     

Adaptive methods to preserve power amplifier linearity under antenna mismatch conditions

Under antenna mismatch conditions at high output power, voltage clipping (due to collector voltage saturation) is the main cause of power amplifier linearity degradation. To preserve linearity under mismatch three adaptive methods are presented that make use of the detected minimum collector peak voltage. This detected signal controls either the amplifier output power, load-line, or supply voltage. These concepts are generalized analytically, and calculated results compare well to simulations. Measurements demonstrate am error vector magnitude reduction of 5% and an adjacent channel power ratio improvement of 10 dB at a voltage standing wave ratio of 4 for an EDGE amplifier with adaptively controlled output power. These adaptive methods offer a cost and size effective alternative to the use of an isolator.     

The tetrode power transistor

Power transistor circuits are characterized by the fact that the collector current must swing over a wide range of values during any complete cycle of operation. One disadvantage of present-day alloyed junction power transistors is that the current gain decreases with increasing collector current. This causes distortion in linear applications and makes temperature stabilization in switching circuits more difficult. Power transistors having emitter areas large enough to handle currents in the amperes range can be made as tetrodes by use of an annular ring geometry. Experimental results show that the gain characteristics can be altered by applying a bias voltage or a portion of the signal voltage transversely across the base. The gain characteristic can be made flatter for improved fidelity in audio applications, or even reversed to give increasing gain with collector current for certain switching applications. Practical circuitry utilizing the improved gain characteristics of power tetrodes has been developed, and the annular geometry permits the fabrication of tetrodes using conventional alloying techniques.     

有射极电阻的基本电路中双极型晶体三极管工作状态的一种判断方法

本文给出含有射极电阻的基本电路中双极型晶体三极管(BJT)工作状态的一种判断方法。对于有射极电阻的基本电路,如果只知道电路中电阻的阻值、BJT的电流放大倍数β和直流电源的电压值,可以先假设其中的BJT处于放大状态,求出BJT在放大状态下的集电极电流IC或基极电流IB,然后与临界饱和状态下的集电极电流ICS或基极电流IBS比较,如果IC相似文献   

The effect of base resistance of the vertical npn transistor in I2L structures

Expressions are derived for the lateral base current and for the base-emitter voltage by solving the differential equations obtained from a physical model of the base region of the vertical npn transistor. The theoretical and experimental results concur in showing that on the one hand the decrease of the upward current gain of the individual collectors at higher values of the collector current is due to the lateral voltage drop, and that high injection effects appear only for small values of current gain which have no practical importance. On the other hand the curves of current gain plotted against collector current show that the lateral voltage drop causes a point of inflexion followed by a maximum. This effect is evident at that collector nearest to the injector (or even at several such collectors, depending upon how many there are). Furthermore it is seen that the decrease of the current gain is almost entirely independent of the current gain of the intrinsic transistor.     

Impurity-density distribution in the base region of drift transistors

The nature of the impurity grading in the base of drift transistors is studied by measuring the dependence of the base transit time on collector voltage. Provided that modulation of collector-depletion layer width caused by change of collector voltage occurs only in the base material, as in the case of an alloyed collector, it is possible to deduce the base-region field parameterm=Delta V/(kT/q)from such transit-time measurements. By this means, the validity of assumed distributions of impurity density may be verified; in particular, it may be established whether the impurity grading approximates an exponential or a complementary error function (erfc) form. Results are given for a number of drift-transistor samples, most of which are believed to have undergone impurity diffusion into the base material from a constant surface concentration during fabrication. In all cases, however, interpretation of measured data indicates a base impurity-density distribution approximating exponential rather than erfc form to be present.     

D波段行波管三级降压收集极的设计

效率是行波管(TWT)的重要技术指标,为提高某一0.22 THz折叠波导行波管的效率,需设计多级降压收集极。对注波互作用后的电子注信息进行分析,估算收集极效率最高时的电压设置。利用电磁仿真软件对三级降压收集极电极结构和电压设置进行仿真优化,得到效率大于87.5%,回流电流小于0.328 9 mA的轴对称三级降压收集极;在第二电极入口采用斜口结构进行仿真优化,得到回流电流小于0.075 mA的非轴对称三级降压收集极。结果表明,采用斜口结构可以有效降低0.22 THz行波管多级降压收集极的回流电流。     

Current mode second breakdown in epitaxial planar transistors

Current mode second breakdown is a type of voltage "switchback" observed in epitaxial transistors. The phenomenon is initiated when the emitter is injecting at a collector voltage in excess of the collector-emitter sustaining voltage, and is characterized by delay and voltage fall times on the order of a nanosecond. The device can be sustained in the low voltage state only as long as there is sufficient charge to produce conductivity modulation within the collector-base depletion region. When the available charge is exhausted, the collector voltage will recharge at a rate determined by the external circuit. At some critical current density, the collector-base depletion region collapses toward the high conductivity substrate. The electric field within the depletion region increases as the depletion region width narrows, until avalanche occurs. The sustaining voltage will be determined by the bulk base-to-collector avalanche voltage. A consequence of this behavior is that most epitaxial transistors cannot operate stably in the LVCERmode, and switching-off unclamped inductive circuits with the emitter-base junction terminated in some finite resistance will lead to second breakdown.