Convection heat transfer from a hybrid circuit

Accurate values of heat transfer coefficient are needed for simulation of the thermal characteristics of a thick film resistor. In this paper, the results of an investigation are presented where an optical technique is used to study the convection plumes from a horizontally positioned hybrid resistor package. The observations have shown that simplifying approximations to the convection coefficients may be made in thermal analysis of such devices. Using these approximations and an optimization technique, values have been estimated for the coefficients.     

埋入电镀电阻在高速线路中的应用

埋入电阻是实现高频电路的重要方法之一。现已开发出在内层要求精确电镀上电阻元件的工艺,这意味着PCB制造厂可采用各种类型层压板材料,根据不同电镀时间得到从25 Ω到100 Ω范围内的方块电阻值(电阻率),而不是采用各种不同电阻值金属箔的基材来制备不同阻值的埋入电阻。采用常规PWB的活化和化学镀等制造步骤便可制作这种电阻,这种埋入电阻工艺是易于激光检修并层压到多层板内部是很稳定的。这种埋入电阻经过多层层压,温度变化或者显露于潮湿环境下表明电阻值是很小改变的,经过模拟电路运作具有好的稳定性。     

An MRI Receiver Coil Produced by Inkjet Printing Directly on to a Flexible Substrate

Inkjet printing has been used to produce resonant radio frequency coils that are comparable to those produced by conventional printed circuit board (PCB) methods. The coils, which consist of a conductive loop and in-series capacitors, form part of a receiver circuit that is used for magnetic resonance imaging (MRI). The resonant circuit is selective at the predetermined frequency of 400 MHz. The required electrical components (resistor, capacitor, and inductor) were produced by inkjet printing, with scaling experiments for resistor and capacitor performed before the complete loops with integrated capacitors were printed. Numerical simulation was used to determine the required values for the components. The inkjet printed circuit was combined with a small tuning and matching board before being connected to a network analyzer and the MRI hardware. With a matching of ${-}$ 38 dB at 400 MHz the achieved results were comparable to those from standard PCB techniques. The performance of the inkjet printed component as a receiver device for nuclear magnetic resonance and MRI was verified by imaging reference phantoms and a whole kiwifruit; it compares favorably to standard MRI devices. Inkjet printing can, therefore, be considered a feasible technique for producing MRI receiver circuits on flexible substrates.      

PCB glass-fibre laminates: Thermal conductivity measurements and their effect on simulation

Accurate values of thermal conductivity are required for the simulation of temperature phenomena in electronic circuits. This paper presents the results of measurements carried out to determine the thermal conductivity along and normal to the plane of fibre glass laminates used in the manufacture of printed circuit boards. It has been found that the reinforced fibre-glass substrates used in PCBs are strongly anisotropic with the conductivity normal to the boards being much smaller than tangential to it. The test samples were type FR4 epoxy/glass laminates. An experiment has been designed which determines the thermal conductivity in-the-plane of the laminates by matching the measured temperature distribution along a heated specimen with a finite difference solution. An electrically heated Lees’ disc apparatus is also used to measure the thermal conductivity of these boards in a direction normal to their plane. The samples tested yielded values of 0.343 W/mK and 1.059 W/mK for thermal conductivity through and along the plane of the boards, respectively.     

Passive Immersion Cooling of 3-D Stacked Dies

Three-dimensional die stacking increases integrated circuit (IC) density, providing increased capabilities and improved electrical performance on a smaller printed circuit board (PCB) footprint area. However, these advantages come at the expense of higher volumetric heat generation rates and decreased thermal and mechanical access to the die areas. Passive immersion cooling, allowing for buoyancy-driven fluid flow between stacked dies, can provide high heat transfer coefficients directly on the die surfaces, can easily accommodate a wide variety of interconnect schemes, and is scalable to any number of dies. A methodology for the optimization of immersion cooled 3-D stacked dies is presented, including the effects of confinement on natural convection and channel boiling. Optimum die spacings for both single and two phase cooling with saturated FC-72 are found to be on the order of half a millimeter for typical microelectronics geometries and to yield heat densities of 10-50 W/cm³ in natural convection and 100-500 W/cm³ in channel boiling.     

深低温大功率电阻阵列封装结构研究

电阻阵列的封装需求向着集成度高、大功率、深低温方向发展。为了满足130 K以下低温工作、稳态功率100 W以上的深低温应用需求，提出了一种利用液氮进行制冷的集成封装结构，并利用有限元仿真和实测验证相结合的方法验证了装置的制冷能力。结果表明，热沉钼与陶瓷电极板的厚度均为2 mm的情况下，加热功率在0.1~192.76 W区间内，有限元仿真得到的温度与实测温度最大误差小于7.67%，引起误差的主要原因是封装结构件的体热阻及界面热阻随温度发生变化而仿真时采用恒定热阻。结构能够在加热功率小于211.90 W的工况下正常工作。在设计的100 W稳定加热工况下，芯片衬底温度不高于101.9 K，热应力为5.66 MPa，满足设计要求。     

表面电子元件的建模与分析

针对电子设备特别是手提电子设备对电子元件小型化、集成化的要求,提出了如何设计印刷电阻、印刷电容、印刷电感的方法,重点给出了计算印刷电路板电感的计算公式,并构建了其电路模型。实验证明理论计算值与实际值的一致性。     

Thermal measurements and analysis of AlGaInP/GaInP MQW red LEDs with different chip sizes and substrate thicknesses

Thermal properties of AlGaInP/GaInP MQW red LEDs are investigated by thermal measurements and analysis for different chip sizes and substrate thicknesses. To extract the thermal resistance (R_th), junction temperature (T_j) is experimentally determined by both forward voltage and electroluminescence (EL) emission peak shift methods. For theoretical thermal analysis, thermal parameters are calculated in simulation using measured heat source densities. The T_j value increases with increasing the injection current, and it decreases as the chip size becomes larger. The use of a thin substrate improves the heat removal capability. At 450 mA, the T_j values of 315 K and 342 K are measured for 500 × 500 μm² LEDs with 110 μm and 350 μm thick substrates, respectively. For 500 × 500 μm² LEDs with 110 μm thick substrate, the R_th values of 13.99 K/W and 14.89 K/W are obtained experimentally by the forward voltage and EL emission peak shift methods, respectively. The theoretically calculated value is 13.44 K/W, indicating a good agreement with the experimental results.     

Self generating square/triangular wave and pulse width modulator using a single MO-CCCDTA

A self-generating square/triangular wave and pulse width modulator (PWM) using multiple output current controlled current differencing transconductance amplifier (MO-CCCDTA) is presented. To obtain all the three functions simultaneously from the same topology, the MO-CCCDTA is modified a little bit. The characterisation of the modified MO-CCCDTA structure shows that the parasitic resistances at input terminals (n and p) can be varied via bias current. The maximum useful frequency range is found to be 635 MHz, which is higher than the available literature. The waveform generator and PWM circuit use only one MO-CCCDTA, one grounded capacitor and no resistor; hence suitable for IC implementation. The duty cycle of proposed pulse width modulation can be tuned by bias current of MO-CCCDTA over a wide range. The performances of the proposed block and its applications (square/triangular/PWM) are verified by PSPICE simulation using TSMC 0.35 µm technology. The power consumption is about 1.12 mW. To verify experimentally, a prototype of MO-CCCDTA has been made using commercially available ICs (AD844AN and CA3080) on printed circuit board. The simulation and experimental results verify theoretical proposition well. Monte carlo simulation is carried out, which proves satisfactory performance of the proposed circuit against mismatches. The performance of the proposed circuit is also verified through pre-layout and post-layout simulation results. The required chip area is only 22.415 × 14.6 µm².     

Thermomechanical effects in embedded passive materials

Thermomechanical fatigue was measured using electron-beam moiré (EBM) and infrared (IR) microscopy. A specimen was made using a FR-4 printed wiring board (PWB), a silver-filled conductive adhesive, and a carbon-filled conductive paste. Both filled polymeric materials are used for embedded resistor applications. We studied the behavior of these materials and, particularly, the interfaces between these materials as a function of thermal cycling. The EBM gives quantitative information on localized strains, whereas the IR microscopy gives quantitative information on changes in heat flow. The filled polymeric materials showed strains of −0.6% at −55°C and 1.4% at 125°C. The interface between the silver and carbon-filled materials increased in thermal resistance on the order of 10⁻⁶ m²·K·W⁻¹ per thermal cycle.     

雷达用多层微波综合背板制造工艺研究

对多种型号雷达用多层微波综合背板材料CLTE-XT进行了性能及特点介绍。创新性运用埋置膜电阻技术、金属化孔制造的反钻孔技术,实现了多层微波综合背板的制造。并对其制造过程中所涉及的层间定位、多层化制造、孔金属化实现等关键技术进行了详细阐述,对此类微波多层背板的制造具有指导意义。     

Health-monitoring method of note PC for cooling performance degradation and load assessment

Health monitoring technologies, which can evaluate the performance degradation, load history and degree of fatigue, have the potential to improve the effective maintenance, the reliability design method and the availability in the improper use conditions of electronic equipment. In this paper, we propose a method to assess the cooling performance degradation and load history of printed circuit boards in electronic equipment by use of a hierarchical Bayes model based on Computer Aided Engineering (CAE) results of thermal-stress simulation and experiment data from observed measurements. We applied this method to note PC that can monitor the device load factor and revolution number of cooling fan. It is shown that this method can estimate the temperature and deformation distribution of the printed circuit board from monitoring variables through latent variables such as thermal dissipation of the device and thermal boundary condition by use of the hierarchical Bayes model. And it is confirmed that the statistical load assessment concerning thermal cyclic load and the maximum load distribution can be conducted using the estimated temperature and deformation data. Furthermore, we verified that the cooling performance degradation can be assessed, if the temperature difference per unit thermal value between two suitable points on the printed circuit board can be obtained. It is concluded that the proposed method can be effective to assess the thermal load history and cooling performance degradation.     

航天用刚挠印制板可靠性研究

通过分析影响航天用刚挠印制板可靠性的主要因素分层和金属化孔的质量,从刚挠印制板的设计、工艺控制等角度提出适合于航天用刚挠印制板的材料、关键工序工艺条件以及特殊检验要求。通过振动试验、加速度试验、加严热冲击试验、焊接后高低温循环试验等试验证明了高可靠性刚挠印制板可以应用于航天器产品,并给出航天用刚挠印制板具体的材料、生产工艺及关键工艺参数建议。     

盲铣板技术研究

随着电子产品逐渐向功能化、集成化、微小化的发展，印制电路板制作技术难度也越来越高，因此要求印制线路板的设计更加多样化；盲铣板的技术研究是根据客户设计要求来的，目前越来越多的客户关注和应用盲铣板。本文主要对盲铣板的盲铣深度公差、盲铣槽平滑度、盲铣槽外形尺寸进行分析和研究，并对各自的制程能力进行了制定，为大批量导入盲铣板提供了技术支持和储备。     

An investigation of thermal enhancement on flip chip plastic BGApackages using CFD tool

This paper demonstrates the advantage of applying Predictive Engineering in the thermal assessment of a 279 inputs/outputs (I/Os), six-layer, depopulated array flip chip PBGA package. Thermal simulation was conducted using a computational fluid dynamics (CFD) tool to analyze the heat transfer and fluid flow in a free convection environment. This study first describes the modeling techniques on a multilayer substrate, thermal vias, solder bumps, and printed circuit board (PCB). For a flip chip package without any thermal enhancement, more than 90% of the total power was conducted from the front surface of the die through the solder ball interconnects to the substrate, then to the board. To enhance the thermal performance of the package, the heat transfer area from the backside of the die needs to increase dramatically. Several thermal enhancing techniques were examined. These methods included a copper heat spreader with various thicknesses and with thermal pads, metallic lid, overmolded with and without a heat spreader, and with heat sink. An aluminum lid and a heat sink gave the best improvement; followed by a heat spreader with thermal pads. Both methods reduced thermal resistance by an average of 50%. Detailed analyses on heat flow projections are discussed     

Spacing optimization of high power LED arrays for solid state lighting

This paper provides an analytical approach to determine the optimum pitch by utilizing a thermal resistance network,under the assumption of constant luminous efficiency.This work allows an LED array design which is mounted on a printed circuit board(PCB) attached with a heat sink subject to the natural convection cooling. Being validated by finite element(FE) models,the current approach can be shown as an effective method for the determination of optimal component spacing in an LED array assembly for SSL.     

Spacing optimization of high power LED arrays for solid state lighting

This paper provides an analytical approach to determine the optimum pitch by utilizing a thermal resistance network, under the assumption of constant luminous efficiency. This work allows an LED array design which is mounted on a printed circuit board (PCB) attached with a heat sink subject to the natural convection cooling. Being validated by finite element (FE) models, the current approach can be shown as an effective method for the determination of optimal component spacing in an LED array assembly for SSL.     

印刷电路板温度-应力耦合场有限元分析

温度和热应力是引起印刷电路板功能失效的重要原因,针对某电子设备的PCB。对其温度-应力耦合场进行有限元分析,找出了印刷电路最大可能的失效区域;采用DOE方法对元器件结构布局进行了优化设计,使离面正负最大变形量达到最小值,应力集中得到了改善,提高了PCB的使用寿命。     

Thermal characteristics and fabrication of silicon sub-mount based LED package

In this paper, the cost of a light emitting diode (LED) package is lowered by using a silicon substrate as the base attached to the chip, in contrast to the conventional chip-on-board (COB) package. In addition we proposed an LED package with a new structure to promote reliability and lifespan by maximizing heat dissipation from the chip. We designed an LED package combining the advantages of COB based on conventional metal printed circuit board (PCB) and the merits of a silicon sub-mount as a substrate. When an input current 500–1000 mA was applied, the fabricated LED exhibited the light output of approximately 112 lm/W at 29 W. We also measured and compared the thermal resistance of the sub-mount package and conventional COB package. The measured thermal resistance of the sub-mount package with a reflective film of Ag and the COB package were 0.625 K/W and 1.352 K/W, respectively.