A Dual-Mode Conditioning Circuit for Differential Analog-to-Digital Converters

Several devices such as load cells and pressure sensors, among others, provide differential outputs. Given that present high-resolution analog-to-digital converters (ADCs) have differential inputs, fully differential (F-D) circuits are required to adapt the sensor output to the ADC input. This paper proposes an F-D conditioning circuit that allows adjusting both differential- and common-mode signals to the levels required by the ADC. A design example is presented, and a prototype was built and tested. It transforms a differential input signal of $pm$25 mV with a common-mode voltage of 5 V to a differential output signal of $pm$5 and 2.5 V, respectively. It shows an input-referenced peak-to-peak noise of 120 nV, which results in a 112-dB dynamic range (18.7-bit noise-free resolution) for a signal bandwidth of 10 Hz.      

Logarithmic Analog-to-Digital Converters: A Survey

Analog-to-digital converters (ADC) with logarithmic law are receiving particular attention from system and circuit designers. They can be applied to solve many problems of data acquisition and encoding found in almost all the fields of experimental physics and instrumentation dealing with analog variables with several decades of dynamic range, where a constarnt relative accuracy, rather than a constant absolute accuracy, is required. Spme proposals and realizations of logarithmic ADC (LADC) already presented in the literature are discussed as well as some new ideas organized according to three classes of schemes. The first can be viewed as the cascade connection of an analog logarithmic information converter and a conventional ADC; while in the second, the LADC is entirely digital and follows the ADC; and in the third, the logarithmic conversion and the A/D conversion are performed by the same structure and cannot be easily distinguished. An analysis is made of the performances of the various possible realizations as well as of their complexity.     

Jitter Measurement and Compensation for Analog-to-Digital Converters

Clock jitter is measured and digitized by a stochastic time-to-digital converter (TDC). This jitter information is used to compensate the sampling error of an analog-to-digital converter (ADC) caused by the clock jitter. The following two system scenarios are covered: 1) an ADC with a clean external clock and 2) an ADC with an external clock as the main jitter source. TDC calibrations for both scenarios are proposed. The calibrations are based on signal reconstruction and can be performed in the background. Both theoretical analyses and system simulations are provided to verify the proposed jitter compensation and TDC calibration techniques.      

New Criterion for Testing Analog-to-Digital Converters for Statistical Evaluation

The influence of linearity errors on the statistical properties of analog-to-digital converter (ADC) outputs is discussed. It is shown that most ADCs available on the market cannot be used for precise statistical measurements. A measurement technique and an error definition is proposed to allow a careful evaluation of ADCs for statistical measurements.     

An Automated Test Set for High Resolution Analog-to-Digital and Digital-to-Analog Converters

An automated test set is described for characterizing the static performance of high resolution ADC's and DAC's. Measured parameters include gain, offset, linearity, and equivalent ADC input noise with uncertainties of 2-4 ppm. Measurements to full accuracy can be made at a rate up to 40/s. A 20-bit DAC serves as a comparison standard.     

Current Comparator Using Ferromagnetic Cores and Its Application to Analog-to-Digital Converters

A current comparator using ferromagnetic cores with a rectangular hysteresis loop is described. Design criteria for this comparator are derived from the B-H characteristics of the core. To verify the performance of the current comparator, basic experiments and experimental A-D converters with these comparators have been made. By application of the current comparator, it would be possible to realize an A-D converter that could convert a current between a few milliamperes and a few amperes into 9- to 10-bit binary forms within an order of microseconds. The merits of an A-D converter of this type are 1) its very low input impedance, 2) its high impedance between the balanced input terminal pair and the ground, and 3) its ease of conversion of the sum/difference of two currents. Because of these features, the A-D converters can measure currents in circuits having high potential to ground without giving disturbance. The input impedance, measured at 500 kHz, of the experimental A-D converter is shown as a series connection of 0.3-ohm resistance and 0.24-?H inductance, with a stray capacitance of 7.5 pF between input terminals and ground.     

Device Verification Testing of High-Speed Analog-to-Digital Converters in Satellite Communication Systems

This paper presents a step-by-step sequence of operations for the dynamic performance testing of a high-speed analog-to-digital converter (ADC) using on-chip digital demultiplexing and clock distribution. Demultiplexed digital outputs are postprocessed and fed into a computer-aided ADC performance characterization tool. The described methodology reduces test costs and overcomes many test hardware limitations. The problems of high-sampling-rate ADC testing are described. As our focus is on RF communication system applications, we emphasize the measurement of intermodulation distortion (IMD) and effective resolution bandwidth (ERB). Accurate gain and phase matching are also of critical importance. As Fourier analysis is an important component of characterization, we address the issue of automated sample window adjustment to eliminate leakage and false spur generation. A 6-bit 800 MSample/s dual-channel SiGe-based ADC is used as a target example.     

Measuring Volterra Kernels of Analog-to-Digital Converters Using a Stepped Three-Tone Scan

The Volterra theory can be used to mathematically model nonlinear dynamic components such as analog-to-digital converters (ADCs). This paper describes how frequency-domain Volterra kernels of an ADC are determined from measurements. The elements of the Volterra theory are given, and practical issues are considered, such as methods for signal conditioning and finding the appropriate test signals scenario and suitable sampling frequency. The results show that, for the used pipeline ADC, the frequency dependence is significantly stronger for second-order difference products than for sum products and the linear frequency dependence was not as pronounced as that of the second-order Volterra kernel. It is suggested that the Volterra kernels have the symmetry properties of a specific box model, namely, the parallel Hammerstein system.     

A Wide Dynamic Range Analog-to-Digital Conversion System for GCMS Applications

An analog-to-digital conversion system is described which utilizes three parallel integrators of different sensitivities in front of a 12-bit analog-to-digital converter (ADC) to achieve a wide dynamic range, high linearity, and noise reduction. Gain ranging decisions are made by the hardware using a novel method of checking the ADC serial data output, with a minimal amount of logic circuitry. Applications to gas chromatography mass spectrometry (GCMS) are described.     

A Very-High-Speed Analog Buffer with Analog-to-Digital Converter

An analog signal with a bandwidth up to 100 MHz is temporarily stored in a relatively inexpensive analog buffer consisting of an oscilloscope screen image on the target layer of a vidicon tube. From this buffer 255 samples are taken, digitized (seven bits sample), and transferred to a digital computer or averager with a rate of 15 000 samples/s. The fastest fill time of the analog buffer is 50 ns, so the minimum time between consecutive samples of the analog input signal corresponds to 2 ? 10-10 s. A modified apparatus could be used to digitize on paper or film recorded curves, etc.     

A New and Unique Analog-to-Digital Conversion Technique

The analog-to-digital conversion technique which is used in the more accurate digital voltmeters available today is either potentiometric or integrating in nature. Both of these techniques are described in some detail, and their advantages and limitations are pointed out. A new technique is described which combines these two techniques so that the benefits of both are retained while the limitations of each are reduced or eliminated. The new technique, called potentiometric integrating, lends itself to high reading rates (7/sec) with 10 ppm resolution. A resolution of 1 ppm can be achieved with a reading rate of 1/second. Both cases retain the basic accuracy of 0.005 percent of reading and immunity to superimposed noise. This new technique has many applications in both systems and laboratory environments.     

An Integrating Analog-to-Digital Converter for Differential Transducers

An improved dual-slope analog-to-digital converter for measurements made with a pair of resistive or capacitive differential transducers is described. The converter can be contrasted with the conventional method in which the transducers are placed in a bridge, the bridge output is amplified, and the conversion is made. In the new converter the transducers are part of the integrator. As a result, conversion of the signal to a time interval takes place at an earlier stage, eliminating the bridge and the amplifier. The method has the same advantages as the dual-slope method and several additional ones. The fractional change in the transducers is obtained as the ratio of the difference and sum of two time periods. As a result, the converter does not need an accurate voltage reference. In addition, errors due to offset in the integrating amplifier are eliminated.     

D／A转换器的模型化测试策略

本文提出了模型化测量D/A转换器非线性误差的方法,讨论了建模技术和选择优化试验点的方法。利用这些工具,可以从一组充分、必要的测量数据,准确估计出在所有码态时转换器的非线性误差、位误差和重叠误差。     

A Stabilized Fiber Laser for High-Resolution Low-Frequency Strain Sensing

We frequency stabilize a fiber laser for use in low-frequency sensing applications. Using a radio frequency locking technique, an Erbium-doped single longitudinal mode fiber laser is stabilized to a Mach–Zehnder interferometer. The low-frequency fiber laser noise was suppressed by more than 1.5 orders of magnitude at frequencies below 300 Hz reaching a minimum of 2 ${rm Hz}/sqrt {rm Hz}$ between 60 and 250 Hz. The corresponding strain sensitivities are 2 ${rm p}epsilon /sqrt {rm Hz}$ at 1 Hz and 15 ${rm f}epsilon /sqrt {rm Hz}$ from 60 to 250 Hz.      

A High-Resolution Thermometer for the Range 1.6 to 5 K

This paper presents a detailed design, a theoretical analysis, and experimental tests of a high-resolution thermometer for use in the temperature range from 1.6 to 5 K. The device uses a dc-SQUID magnetometer to determine the change in magnetization with temperature of a paramagnetic salt in a magnetic field. The field is provided by a small permanent magnet attached to the thermometer. Measurements of the sensitivity of the device agree well with the theoretical analysis. Near 2.17 K (the superfluid transition of ⁴ He at saturated vapor pressure) the thermometer has a specific sensitivity of 4000 ₀ /K Gauss. There it achieves a temperature resolution better than 10 ^–9 K when it is charged with a field of about 300 Gauss. At 4.2 K, the specific sensitivity is smaller by a factor of 50, but should still allow temperature measurements with a resolution better than 10 ^–7 K. Near 2.17 K, drifts of the device are below the level of 10 ^–13 K/s. The thermometer has a small mass of about 7 g (excluding the magnet), and thus the advantage of relatively small cosmic radiation heating during microgravity experiments in Earth orbit.     

A High-Resolution MEMS Piezoelectric Strain Sensor for Structural Vibration Detection

This paper presents the modeling, fabrication, and testing of a high-performance dynamic strain sensor. Using microelectromechanical systems (MEMS) technology, ZnO piezoelectric microsensors are directly fabricated on silicon and steel substrates. The sensors are intended to be used as point sensors for vibration sensing without putting an extra burden on the host structures. A model that incorporates piezoelectric effects into an RC circuit, representing the sensor architecture, is developed to describe the voltage output characteristics of the piezoelectric microsensors. It is shown that the sensitivity of microplanar piezoelectric sensors that utilize the $e_{31}$ effect is linearly proportional to sensor thickness but unrelated to sensor area. Sensor characterization was performed on a cantilever beam cut from a fabricated silicon wafer. The experimental data indicate that the overall sensor and circuit system is capable of resolving better than 40.3 nanostrain time domain signal at frequencies above 2 kHz. The corresponding noise floor is lower than 200 femto-strain per root hertz and the sensitivity, defined as the sensor voltage output over strain input, is calculated to be 340 V/$varepsilon$ . Micro ZnO piezoelectric sensors fabricated on steel hard disk drive suspensions also show excellent results. The sensor not only has a better signal-to-noise ratio but also detects more vibration information than the combination of two laser-doppler-vibrometer measurements in different directions.