A 30–130 GHz Ultra Broadband Direct-Conversion BPSK Modulator Using a 0.5-μm E/D-PHEMT Process

A 30-130 GHz ultra broadband direct-conversion binary phase shift keying (BPSK) modulator using a 0.5-mum enhancement/depletion-pseudomorphic high-electron mobility transistor (E/D-PHEMT) process is presented in this letter. The BPSK modulator was designed using a modified reflection-type topology with E-mode PHEMT devices. An advantage for the E-mode PHEMT process is positive gate bias, and therefore the bias circuit for the modulation would be less complicated. Moreover, the BPSK modulator demonstrates an error vector magnitude of within 5.5%, an adjacent channel power ratio of better than -35 dBc, and an on-off isolation of greater than 20 dB from 30 to 130 GHz. The chip size of the BPSK modulator is only 0.8x0.7 mm². To the best of the authors' knowledge, this work is the highest operation frequency with the widest bandwidth among all the reported monolithic microwave integrated circuit-based BPSK modulators.     

Design and analysis of CMOS broad-band compact high-linearity modulators for gigabit microwave/millimeter-wave applications

CMOS broad-band compact high-linearity binary phase-shift keying (BPSK) and IQ modulators are proposed and analyzed in this paper. The modulators are constructed utilizing a modified reflection-type topology with the transmission lines implemented on the thick SiO/sub 2/ layer to avoid the lossy silicon substrate. The monolithic microwave integrated circuit (MMIC) chips were fabricated using standard bulk 0.13-/spl mu/m MS/RF CMOS process and demonstrated an ultracompact layout with more than 80% chip size reduction. The broadside couplers and 180/spl deg/ hybrid for the modulators in the CMOS process are broad-band designs with low phase/amplitude errors. The dc offset and imbalance for the proposed topology are investigated and compared with the conventional reflection-type modulators. The measured dc offset was improved by more than 10 dB. Both BPSK and IQ modulators feature a conversion loss of 13 dB, a modulation bandwidth of wider than 1 GHz, and second- and third-order spur suppressions of better than -30 dBc. The IQ modulator shows good sideband suppression with high local-oscillator suppression from 20 to 40 GHz. The modulators are also evaluated with a digital modulation signal and demonstrate excellent modulator quality and adjacent channel power ratio.     

A 3.1 GHz–8.0 GHz Single-Chip Transceiver for MB-OFDM UWB in 0.18-$mu$ m CMOS Process

This paper presents the design and integration of a fully-integrated dual-conversion zero-IF2 CMOS transceiver for 9-band MB-OFDM UWB systems from 3.1 GHz to 8.0 GHz. The transceiver integrates all building blocks including a variable-gain wideband LNA, a single combined mixer for both RF down-conversion in RX and up-conversion in TX, a fast-settling frequency synthesizer, and IQ ADCs and DACs. Fabricated in a standard 0.18- mum CMOS process, the receiver measures maximum S11 of - 13 dB, maximum NF of 8.25 dB, in-band IIP3 of better than -13.7 dBm, and variable gain from 25.3 to 84.0 dB. IQ path gain and phase mismatches of the receiver chain are measured to be 0.8 dB and 4 ^deg, respectively. The transmitter achieves a minimum output P-1 dB of -8.2 dBm, sideband rejection of better than -42.2 dBc, and LO leakage of smaller than - 46.5 dBc.     

A 4 GHz quadrature output fractional-N frequency synthesizer for an IR-UWB transceiver

This paper describes a 4 GHz fractional-N frequency synthesizer for a 3.1 to 5 GHz IR-UWB transceiver.Designed in a 0.18μm mixed-signal & RF 1P6M CMOS process, the operating range of the synthesizer is 3.74 to 4.44 GHz. By using an 18-bit third-order ∑-△ modulator, the synthesizer achieves a frequency resolution of 15 Hz when the reference frequency is 20 MHz. The measured amplitude mismatch and phase error between I and Q signals are less than 0.1 dB and 0.8° respectively. The measured phase noise is -116 dBc/Hz at 3 MHz offset for a 4 GHz output.Measured spurious tones are lower than -60 dBc. The settling time is within 80 μs. The core circuit conupSigmaes only 38.2 mW from a 1.8 V power supply.     

Preclipping experiment for subcarrier-multiplexed AM/64QAM opticaltransmission

Bit-error-rate degradation of the 64QAM signal due to clipping distortion caused by overmodulation at the laser diode is compensated for by preclipping for subcarrier-multiplexed AM; 64QAM optical transmission. The worst composite distortions of CSO<-60 dBc and CTB<-65 dBc have been achieved in the 40-channel AM signal band. It has also been confirmed that preclipping is more effective than Reed-Solomon (204, 188) error correction against clipping distortion     

A highly linear and fully-integrated FMCW synthesizer for 60 GHz radar applications with 7 GHz bandwidth

A highly linear and fully-integrated frequency-modulated continuous-wave (FMCW) generator based on a fractional-N phase-locked loop (PLL) that is able to synthesize modulation schemes in 57–64 GHz range is proposed in this paper. The fractional-N PLL employs Colpitts voltage-controlled oscillator (VCO) at 60 GHz with 13.5% tuning range. Automatic amplitude and frequency calibrations are implemented to avoid drifts due to process, voltage and temperature variations and to set the center frequency of the VCO. Five-stage multi-modulus divider is used for division ratio switching, controlled by the sigma-delta (\(\Sigma \Delta\)) modulator MASH 1-1-1. The frequency sweep (chirp) bandwidth and duration are fully programmable via serial peripheral interface allowing up to 16 different chirps in complex modulation scheme. The PLL reference signal is 250 MHz provided by external low-noise signal generator which is also used for digital modules clock. The overall PLL phase noise is lower than ?80 dBc/Hz at 10 kHz offset and the chirp linearity is better than 0.01%. The complete FMCW synthesizer is implemented and verified as a stand-alone chip in a commercially available SiGe HBT 130 nm BiCMOS technology. The total chip area is \(2.04\,\text {mm}^2\), and the total power consumption is 280 mW.     

Modulation methods for PCNs

The interference levels that may be expected for a range of conventional cellular and microcellular clusters used in personal communication networks (PCNs) and personal communication systems (PCSs) are discussed. Simulation results show that for conventional size cells, 32- and 64-level quadrature amplitude modulation (QAM) schemes are preferred for bit error rates (BER) above 1×10^-2, while 4PSK or variable-rate QAM schemes are better for lower BER. For microcells with communications at both 900 MHz and 1.8 GHz, four- or six-cell clusters are advocated, depending on the SNR expected. Based on the expected signal-to-noise ratio (SNR) and interference levels, it is argued that variable-rate QAM schemes are superior to the other modulation schemes considered. For low BERs 4PSK may often provide the best performance, whereas for high BERs, particularly when the SNR is high, 32- and 64-level star QAM are the most suitable     

A Wideband ΔΣ Digital-RF Modulator for High Data Rate Transmitters

A wideband software-defined digital-RF modulator targeting Gb/s data rates is presented. The modulator consists of a 2.625-GS/s digital DeltaSigma modulator, a 5.25-GHz direct digital-RF converter, and a fourth-order auto-tuned passive LC RF bandpass filter. The architecture removes high dynamic range analog circuits from the baseband signal path, replacing them with high-speed digital circuits to take advantage of digital CMOS scaling. The integration of the digital-RF converter with an RF bandpass reconstruction filter eliminates spurious signals and noise associated with direct digital-RF conversion. An efficient passgate adder circuit lowers the power consumption of the high-speed digital processing and a quadrature digital-IF approach is employed to reduce LO feedthrough and image spurs. The digital-RF modulator is software programmable to support variable bandwidths, adaptive modulation schemes, and multi-channel operation within a frequency band. A prototype IC built in 0.13-mum CMOS demonstrates a data rate of 1.2 Gb/s using OFDM modulation in a bandwidth of 200 MHz centered at 5.25 GHz. In-band LO and image spurs are less than -59 dBc without requiring calibration. The modulator consumes 187 mW and occupies a die area of 0.72 mm².     

A /spl Sigma/-/spl Delta/ fractional-N frequency synthesizer using a wide-band integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications

A fractional-N frequency synthesizer (FNFS) in a 0.5-/spl mu/m SiGe BiCMOS technology is implemented. In order to operate in a wide-band frequency range, a switched-capacitors bank LC tank voltage-controlled oscillator (VCO) and an adaptive frequency calibration (AFC) technique are used. The measured VCO tuning range is as wide as 600 MHz (40%) from 1.15 to 1.75 GHz with a tuning sensitivity from 5.2 to 17.5 MHz/V. A 3-bit fourth-order /spl Sigma/-/spl Delta/ modulator is used to reduce out-of-band phase noise and to meet a frequency resolution of less than 3 Hz as well as agile switching time. The experimental results show -80 dBc/Hz in-band phase noise within the loop bandwidth of 25 kHz and -129 dBc/Hz out-of-band phase noise at 400-kHz offset frequency. The fractional spurious is less than -70 dBc/Hz at 300-kHz offset frequency and the reference spur is -75 dBc/Hz. The lock time is less than 150 /spl mu/s. The proposed synthesizer consumes 19.5 mA from a single 2.8-V supply voltage and meets the requirements of GSM/GPRS/WCDMA applications.     

Direct 16 QAM six-port modulator

A direct 16 quadrature amplitude modulation (QAM) modulator based on the six-port technique is proposed. It uses a six-port passive microwave network to implement the modulation scheme with suitable terminations. A microwave prototype was built to validate the 16 QAM modulation up to 200 Mbit/s data rate at 4.2 GHz carrier frequency. The error vector magnitude and local oscillator (LO) power testing show that this six-port 16 QAM modulator has wide dynamic range capability to overcome the LO power variation. It has potentially low cost and low power consumption for RF communications applications.     

A 16–18.8-GHz Sub-Integer-N Frequency Synthesizer for 60-GHz Transceivers

An 18-GHz range frequency synthesizer is implemented in 0.13-mum SiGe BiCMOS technology as part of a 60-GHz superheterodyne transceiver chipset. It provides for RF channels of 56.5-64 GHz in 500-MHz steps, and features a phase-rotating multi-modulus divider capable of sub-integer division. Output frequency range from the synthesizer is 16.0 to 18.8 GHz, while the enabled RF frequency range is 3.5 times this, or 55.8 to 65.8 GHz. The measured RMS phase noise of the synthesizer is 0.8deg (1 MHz to 1 GHz integration), while phase noise at 100-kHz and 10-MHz offsets are -90 and -124 dBc/Hz, respectively. Reference spurs are 69 dBc; sub-integer spurs are -65 dBc; and combined power consumption from 1.2 and 2.7 V is 144 mW.     

一种用于短距离器件的带自校准的∑-Δ分数分频频率综合器

介绍了一种应用于433/868MHz频段短距离器件的分数分频频率综合器.采用带自适应频率校准的宽带压控振荡器来覆盖要求的频段,并采用3位量化、3阶的Σ△调制器来实现分数分频和改善锁相环的带外噪声.测试结果表明,自适应频率校准能够正常工作,压控振荡器的频率调节范围为1.31～1.18GHz,在3MHz频偏处的带外噪声为-139dBc/Hz,分数毛刺低于-60dBc.芯片采用0.35μm CMOS工艺,芯片面积仅为1.8mm2,功耗仅为57mW.     

零中频发射机设计与实现

零中频发射机电路实现上只有DAC和IQ调制器两部分,电路结构简单,与二次变频方案相比,省去中频信号发生器、中频合成器(PLL/VCO)、中频－射频混频器以及 SAW 滤波器等,不仅降低了发射机系统的复杂度,也大幅减小了系统体积、重量、功耗和成本,但是零中频方案存在无用边带和本振泄漏。文中分析了零中频发射机的原理和存在的问题,找到了一种抑制无用边带和本振泄漏的方法,给出了一种零中频发射机实现方案。经工程验证,文中的零中频发射机64QAM调制方式EVM＜4%,ACPR＞53 dB,各项关键指标优于3GPP规范。     

Performance characteristics and applications of hybrid multichannelANI-VSB/M-QAM video lightwave transmission systems

The performance characteristics and applications of hybrid multichannel amplitude modulation vestigal sideband (AM-VSB)/M-quadrature amplitude modulation (QAM) video lightwave transmission systems operating at either 1310 or 1550 nm are reviewed. These systems can transport up to 80 AM-VSB video channels and more than 30 64/256-QAM digital video channels over a standard single-mode fiber (SMF) using a single laser transmitter. Five main transmission impairment mechanisms for these systems are reviewed as follows: (a) clipping-induced impulse noise, (b) bursty nonlinear distortions, (c) multiple optical reflections, (d) stimulated Brillouin scattering, and (e) self-phase modulation. For AM-QAM video lightwave trunking applications, the in-line erbium-doped fiber amplifier (EDFA) selection is discussed using a frequency-domain simulation model. Such lightwave trunking systems can provide an AM carrier-to-noise ratio (CNR) greater than 50 dB with composite second order (CSO) and composite-triple-beat (CTB) distortions less than -65 dBc, and nearly error-free transmission (BER⩽10^-9) for the 64-QAM channels with signal-to-noise ratio (SNR) of 30-dB or better. Comparison between 64-QAM and 256-QAM video channel transmission and the effect of the QAM channels on the AM-VSB channels are also presented. The implications of these results and others in hybrid multichannel AM-QAM video lightwave trunking systems are discussed     

A 98/196 GHz Low Phase Noise Voltage Controlled Oscillator With a Mode Selector Using a 90 nm CMOS Process

A 98/196 GHz low phase noise voltage controlled oscillator (VCO) with a fundamental/push-push mode selector using a 90 nm CMOS process is presented in this letter. An innovative concept of the VCO with the mode selector is proposed to switch the fundamental or second harmonic to the RF output. The VCO demonstrates a fundamental frequency of up to 98 GHz with an output power of greater than $-8~{rm dBm}$. The phase noise of the VCO is better than $-100.8~{rm dBc}/{rm Hz}$ at 1 MHz offset frequency, and its figure-of-merit is better than $-186~{rm dBc}/{rm Hz}$. Moreover, the output frequency of the work is up to 196 GHz with a fundamental suppression of greater than $-30~{rm dBc}$ as the VCO is operated in push-push mode.      

10 GHz bandwidth traveling-wave LiNbO3optical waveguide modulator

A broad-band traveling-wave electrooptic modulator of Ti-diffused LiNbO3optical waveguide was designed, constructed, and tested at 0.63 μm over a bandwidth of 10.5 GHz. Using a novel asymmetric electrode configuration as a microwave waveguide, practically smooth frequency response of the modulator was obtained. For 300 mW drive power, the phase modulation index was 1 rad at 2 GHz and 0.53 rad at 10 GHz, while the intensity modulation index was 64 and 34 percent, respectively.     

A V-Band Monolithic AlGaN/GaN VCO

A V-band push-push GaN monolithic microwave integrated circuit voltage controlled oscillator (VCO) has been realized based on a 0.2 mum T-gate AlGaN/GaN high electron mobility transistor technology with an fT ~ 65 GHz. The GaN VCO delivered an output power of +11 dBm at 53 GHz with an estimated phase noise of -97 dBc/Hz at 1 MHz offset based on on-wafer measurement. To the best of our knowledge, this is the highest frequency VCO ever reported for GaN technology with a high output power at V-band, without using any buffer amplifier. This work demonstrates the potential of applying GaN technology to millimeter wave band, high power, and low phase noise frequency sources applications.     

Novel 53/106 GHz Dual-Band MMW LC Oscillator Implemented in SiGe BiCMOS Technology

In this Paper, we present a fully integrated millimeter wave LC voltage-controlled oscillator (VCO), which employs a novel topology, operating at dual-band frequency of 53.22 GHz-band and 106.44 GHz-band. The low-phase noise performance of ?107.3 dBc/Hz and ?106.1 dBc/Hz at the offset frequency of 600 kHz, ?111.8 dBc/Hz and ?110.6 dBc/Hz at the offset frequency of 1 MHz around 53.22 GHz and 106.44 GHz are achieved using IBM BiCMOS-6HP technology, respectively. Two tuning ranges, of 52.7 - 53.8 GHz and 105.4 - 107.6 GHz for the proposed LC VCO are obtained. The output voltage swing of this VCO is around 1.8 V_p-p at the operation frequency of 53.22 GHz and 0.45 V_p-p at 106.44 GHz; the total power consumption is about 16.5 mW. To our knowledge, this is the first oscillator which operates at dual-band frequency above 50 GHz with the best preformance.     

A 15-mW fully integrated I/Q synthesizer for Bluetooth in 0.18-/spl mu/m CMOS

A low-power fully integrated synthesizer for Bluetooth applications is presented. The circuit with quadrature output signals at 2.45 GHz and 15-mW power dissipation has been designed in a digital 0.18-/spl mu/m CMOS process with 1.8-V supply voltage. The only external component is a 64-MHz crystal. Measurements have been performed on packaged samples mounted on an FR-4 board and show that the Bluetooth requirements are met. The measured phase noise is below -120 dBc/Hz at 3-MHz offset, and the resulting residual frequency modulation is 7.4-kHz rms. The tuning range consists of an analog and digital tuning mechanism, resulting in more than 15% overall tuning range.     

Analysis of different sub-carrier allocation of M-ary QAM-OFDM downlink in RoF system

In this paper, the performance of a 60 GHz radio over fiber (RoF) system with 4/16/64 quadrature amplitude modulation (QAM) orthogonal frequency division multiplexing (OFDM) downstream signals is studied. Delivery of 10 Gbit/s M-ary QAM (MQAM) OFDM signals through the 20-km-long single-mode fiber (SMF) is complicated in terms of intensity modulation and direct detection (IM/DD). Using self-homodyne method, the beating of two independent light waves generating the millimeter-wave at the photodetector can be down-converted to baseband in the electrical domain. Meanwhile, three kinds of sub-carrier arrangement schemes are compared and discussed, and the simulation results show that lower peak-to-average power ratio (PAPR) can be obtained adopting the adjacent scheme. At bit error rate (BER) of 10-3, the receiver sensitivity using 4QAM-OFDM sub-carrier signal is almost enhanced by 4 dB and 9 dB compared with those of 16QAM-OFDM signal and 64QAM-OFDM signal.