LRSAR-Net语义分割模型用于新冠肺炎CT图片辅助诊断

自2019年末新型冠状病毒(Covid-19)疫情在全球爆发以来,世界各国都处于疫情的危害之下.新冠病毒通过入侵人体的呼吸系统,造成肺部感染,甚至死亡.CT(Computed Tomography)图是医生对肺炎患者进行诊断的常规方法.为了提高医生对新冠感染者进行诊断的效率,该文提出一种基于低秩张量自注意力重构的语义分...     

High-Voltage Analog System for a Mobile NAND Flash

High-voltage analog circuits, including a novel high-voltage regulation scheme, are presented with emphasis on low supply voltage, low power consumption, low area overhead, and low noise, which are key design metrics for implementing NAND Flash memory in a mobile handset. Regulated high voltage generation at low supply voltage is achieved with optimized oscillator, high-voltage charge pump, and voltage regulator circuits. We developed a design methodology for a high-voltage charge pump to minimize silicon area, noise, and power consumption of the circuit without degrading the high-voltage output drive capability. Novel circuit techniques are proposed for low supply voltage operation. Both the oscillator and the regulator circuits achieve 1.5 V operation, while the regulator includes a ripple suppression circuit that is simple and robust. Through the paper, theoretical analysis of the proposed circuits is provided along with Spice simulations. A mobile NAND Flash device is realized with an advanced 63 nm technology to verify the operation of the proposed circuits. Extensive measurements show agreement with the results predicted by both analysis and simulation.     

Hybrid Nanodielectrics for Low‐Voltage Organic Electronics

Nanoscale hybrid dielectrics composed of an ultra‐thin polymeric low‐κ bottom layer and an ultra‐thin high‐κ oxide top layer, with high dielectric strength and capacitances up to 0.25 μFcm^?2, compatible with low‐voltage, low‐power, organic electronic circuits are demonstrated. An efficient and reliable fabrication process, with 100% yield achieved on lab‐scale arrays, is demonstrated by means of pulsed laser deposition (PLD) for the fast growth of the oxide layer. With this strategy, high capacitance top gate (TG), n‐type and p‐type organic field effect transistors (OFETs) with high mobility, low leakage currents, and low subthreshold slopes are realized and employed in complementary‐like inverters, exhibiting ideal switching for supply voltages as low as 2 V. Importantly, the hybrid double‐layer allows for a neat decoupling between the need for a high capacitance, guaranteed by the nanoscale thickness of the double layer, and for an optimized semiconductor–dielectric interface, a crucial point in enabling high mobility OFETs, thanks to the low‐κ polymeric dielectric layer in direct contact with the polymer semiconductor. It is shown that such decoupling can be achieved already with a polymer dielectric as thin as 10 nm when the top oxide is deposited by PLD. This paves the way for a very versatile implementation of the proposed approach for the scaling of the operating voltages of TG OFETs with very low level of dielectric leakage currents to the fabrication of low‐voltage organic electronics with drastically reduced power consumption.     

802.11b标准MAC子层的低功耗设计

在考察802.11b标准MAC协议的基础上,提出了MAC芯片设计的构架,并在设计中加入低功耗考虑因素,其中特别就作为控制模块的状态机的低功耗设计方法进行了尝试。通过仿真和验证,可以看到,在充分考虑低功耗因素后,系统的整体功耗将会下降,最核心的控制模块经过改进,功耗下降了近一半。     

一体化EMCCD微光相机的设计

电子倍增电荷耦合器件(E1ectron Multiplying Charge Coupled Device,EMCCD)是一种新型高灵敏度图像传感器。近年来,EMCCD相机在微光探测领域的应用越来越广泛。为了在微光相机中应用新型EMCCD器件,设计了一种探测能力强、数据更新快、具有一体化光纤接口的微光成像系统。主要研究了EMCCD相机的设计方法,说明了EMCCD的工作原理,论述了基于TC253SPD—BO的EMCCD微光相机的设计方案。用成像实验和信噪比测试实验验证了所设计的一体化微光相机的性能。结果表明,该相机不仅可以实现20km以上的数据传输和30f/s的拍摄帧频,而且还可实现弱光条件下的探测功能,并具有较高的系统信噪比。     

双频段接收机中的BiFET低噪声放大器

设计了一种采用BiFET结构的低噪声放大器（LNA）,这种结构通过BiCMOS工艺使低噪声放大电路集合了双极型晶体管的低噪声特性和CMOS晶体管的高线性度。应用优化的BiFET Cascode共源共栅结构能够明显地提高低噪声放大器的性能,并且能应用于两个不同频率。本文设计的低噪声放大器在低偏置电流（1．7mA）和低功耗（5．7mW）的情况下能取得1．69dB的噪声系数、15．96dB的电压增益、一8．5dBm的IIP3和-67dB的反向隔离。设计的BiFET低噪声放大器是采用了AMS0．8μm的BiCMOS混合信号工艺,经过优化可以用于工业、室内的远程无线控制系统包括无线门禁系统。     

一种适用于无线传感器通信的UWB收发机结构

论文介绍了一种使用低速率超宽带技术实现的适用于无线传感器网络通信的收发机结构,这种结构采用结构简单的IR-UWB(Impulse Radio UWB)方法,能满足无线传感器节点低功耗、低硬件复杂度的要求。这种结构发射机采用SRD(Step Recovery Diode)二极管来产生UWB脉冲信号,接收机则使用结构简单的能量检测方法。     

Turbo乘积码快速编码的FPGA实现

Turbo乘积码是一种性能卓越的前向纠错码,具有译码复杂度低,且在低信噪比时可以获得近似最优的性能。TPC编码的主要指标是时延,论文给出了一种基于FPGA的TPC编码方法,采用行列同时编码,编码时延小,复杂度低。     

噪声背景下雷达低速小目标检测的一种新方法

该文在研究Duffing振子特性之后,基于Duffing振子与小波变换和神经网络相结合,提出了一种适用于低速小目标的Duffing振子雷达检测新方法。仿真实验表明,该检测方法能在低信噪比环境中,以低虚警率对低速目标进行有效检测。     

舰载雷达低空探测性能分析

结合现役舰载雷达的低空试验数据,研究了减小单部干涉盲区的可行性,给出了一种雷达低空探测距离的计算结果,提出可以警戒探测系统雷达配置进行优化,不同波段电磁波干涉的盲区能够互补,提高低空目标的检测能力,以保证低空目标的连续跟踪。     

Fundamentals of packet multiple access for satellite networks

The fundamental objectives which guide the design of a packet multiple-access technique for satellite networks with large numbers of earth stations are explained. Among these objectives are low peak power in the transmitters, low average power from the satellite transponder, high channel capacity, and low complexity of the multiple-access receiver. The author reviews the fundamentals of satellite packet multiple access and relates these fundamentals to the objectives listed. Code division multiple-access (CDMA) and ALOHA multiple access are described in terms of these fundamentals. A simple linear transformation of conventional ALOHA access, called spread ALOHA, is described. For the case of a low signal-to-noise ratio in the receiver and a low duty cycle of individual and identical transmitters, it is not possible to find a multiple-access method at the same average power and are the same bandwidth which is more efficient than spread ALOHA     

短沟道MOSFET散粒噪声测试方法研究

针对MOSFET散粒噪声难以测量的特点,提出了一种低温散粒噪声测试方法。在屏蔽环境下,将被测器件置于低温装置内,有效抑制了外界电磁波和热噪声的干扰,采用背景噪声足够低的放大器以及偏置器、适配器等,建立低温散粒噪声测试系统。应用本系统对短沟道MOSFET器件进行噪声测试,分析该器件散粒噪声的特性。     

Integrated CMOS wideband oscillator for RF applications

A fully integrated LC oscillator with a tuning range of 800 MHz is presented. A combination of capacitive and inductive tuning has been used to produce the large tuning range with a low-gain control input. The phase noise at 1.9 GHz is as low as -120 dBc/Hz at 500 kHz offset. Possible applications include integer-N PLLs with a low level of reference spurs     

Heuristic receiver for implantable UWB applications

High data rate implantable wireless systems come with many challenges, chief among them being low power operation and high linearity. A low noise amplifier (LNA) designed for this application must include high gain, low noise figure (NF) and better linearity at low power consumption within the required frequency band. The down converter also requires a passive mixer to achieve low power and better linearity. In this paper, design is based on an Impulse Response (IR) Ultra-wideband (UWB) receiver operating at (3.1–5) GHz implemented in 0.25 μm CMOS Silicon on Sapphire (SOS). This paper reports the design and measurement of a UWB receiver with a designed and measured linearity of 17 dBm, a gain of 30.5 dB and a minimum NF of 4.5 dB, which make it suitable for implantable radio applications.     

Optical Transmission Modules for Intraoffice Transmission Networks

This paper considers the requirements of, and proposes technical solutions for, the optical transmission modules used in intraoffice links. A novel crosstalk noise measurement procedure is proposed along with a quantitative evaluation method for crosstalk prevention which is very important in the development of compact modules. A procedure for circuit adjustment elimination is also proposed, previously a great obstacle to attaining low manufacturing costs. Based upon the above, two types of modules are developed for DS2 and DS3 signal transmissions which meet the requirements of small size, low power consumption, and low cost without transmission performance degradation.     

TFSOI complementary BiCMOS technology for low power applications

A Thin-Film-Silicon-On-Insulator Complementary BiCMOS (TFSOI CBiCMOS) technology has been developed for low power applications. The technology is based on a manufacturable, near-fully-depleted 0.5 μm CMOS process with the lateral bipolar devices integrated as drop-in modules for CBiCMOS circuits. The near-fully-depleted CMOS device design minimizes sensitivity to silicon thickness variation while maintaining the benefits of SOI devices. The bipolar device structure emphasizes use of a silicided polysilicon base contact to reduce base resistance and minimize current crowding effects. A split-oxide spacer integration allows independent control of the bipolar base width and emitter contact spacing. Excellent low power performance is demonstrated through low current ECL and low voltage, low power CMOS circuits. A 70 ps ECL gate delay at a gate current of 20 μA is achieved. This represents a factor of 3 improvement over bulk trench-isolated double-polysilicon self-aligned bipolar circuits. Similarly, CMOS gate delay shows a factor of 2 improvement over bulk silicon at a power supply voltage of 3.3 V. Finally, a 460 μW 1 GHz prescaler circuit is demonstrated using this technology     

A high performance RDS-detector for low voltage applications

The design and realisation of the analog part for an RDS-receiver, the RDS-detector, is discussed in this paper. The RDS-receiver is developed towards low voltage applications (1.8 V) with low power consumption requirements. A new topology for RDS-receivers is introduced resulting in an important quality improvement, mainly being a higher phase-linearity and a lower power consumption. The performance of the chip is compared to existing RDS-receivers. These receivers use an analog integrated bandpass filter. In the presented topology direct conversion followed by lowpass filtering is used. The chip is realised in a fully differential switched-capacitor technique with correlated double sampling. The latter is used to obtain a very low equivalent input DC-offset. The chip is implemented in a 2µm BiCMOS technology.     

Test results for on-board burst-mode CQPSK modem

An on-board burst-mode modem for coherent processing of a QPSK signal at 120 Mb/s is realized with small, low mass and low power consumption. This paper presents the hardware configuration and the various measured test data including physical characteristics. The overall performance through an earth station modem is also presented.     

煤矿井下高精度定位节点设计

针对现有RFID定位系统定位精度不足的问题,设计了一种基于Chirp 扩频（chirp spread spectrum, CSS）技术的精确定位节点。该节点核心部件由NA5TR1芯片、控制器-STM32L单片机系统,以及具有低压差、低功耗性能的LDO电源芯片所构成,在煤矿井下恶劣环境中使用此节点进行定位,其覆盖距离能够达到150 m以上,定位精度能够达到3m以内。     

极低信噪比环境下的载波同步算法研究

在极低信噪比环境下,需要使用纠错能力强的编码比如Turbo码,但Turbo码系统的缺点是要求近乎理想的载波同步。然而,在极低信噪比环境下,Turbo编码系统的同步是具有挑战性的工作。文章提出了一种基于最大均方软输出的扫频和面向判决载波同步相结合的载波同步算法。仿真结果表明,该算法能捕获较大的频偏和相偏,且在极低信噪比环境下,仍能正常工作,其性能非常接近理想同步条件下的性能。