Modeling the inversion layer at equilibrium

Recent developments in the modeling of a step junction or a semiconductor surface at equilibrium have yielded a set of approximate-analytic expressions that relate normalized potential to normalized position outside the inversion regime. Here we offer analogous approximate-analytic expressions for the relations between normalized potential, normalized position and normalized electric field within the inversion regime, for a range of variables of practical interest. A real charge density in the inversion layer obtained analytically using these expressions is compared with the value obtained from the charge-sheet model of Brews, and is shown to be appreciably more accurate.     

A static, physical VDMOS model based on the charge-sheet model

A physically based VDMOS model is derived based on the charge-sheet analysis. This is the first time a charge-sheet approach has been successfully used to model VDMOS. The continuous nature of the charge-sheet model results in a continuous I-V model for VDMOS from subthreshold to saturation. The generalized form of the charge-sheet model enables the physical modeling of the nonuniform doping through the MOS channel region of the VDMOS. A physical model of the drift region is combined with the channel model to give a complete physical system of equations which is solved numerically. The model includes detailed calculations of the drift region parameters including the variation of the internal depletion widths with external bias. The physical, continuous behavior of the model provides easy extraction of small signal parameters and interelectrode capacitances. PISCES simulations are used extensively during the development to provide physical insight into the device behavior. Test measurements of VDMOS are used to verify the model     

对表面势为基础的MOSFET片电荷模型的基本检验

本文完成了对多种表面势为基础的MOSFET片电荷(charge-sheet)模型反型层电荷和沟道电流计算的基本检验.相对于以基本的MOSFET器件物理为基础的Pao-Sah模型结果,大多数片电荷模型在不同的工作区域内都会出现不同程度的反型层电荷计算误差.为了模拟沟道电流,MOSFET片电荷模型必须使用一个半经验的沟道电流方程.这个近似会导致沟道电流方程和反型层电荷方程之间物理上的不自恰,从而使计算的沟道电流结果与Pao-Sah模型相比有近10%的误差.这些基本的检验结果表明:为了保持基本的MOSFET器件物理内容和Pao-Sah模型的高精度,以表面势为基础的片电荷模型还需要一些根本的器件物理改进和进一步的模型精度提高.     

Charge-sheet model for silicon carbide inversion layers

The charge-sheet model for metal-oxide-semiconductor (MOS) inversion layers is extended to silicon carbide. The generalized model is based on an analytical solution of the Poisson equation for the case of incomplete ionization of dopant impurities and incorporating Fermi-Dirac statistics. The results are compared with the conventional charge-sheet model which assumes complete impurity ionization and nondegenerate statistics. It is found that, at room temperature and for gate voltages in weak and moderate inversion, the present model predicts higher inversion-layer charge density at a given gate voltage. However, the relationship between the inversion charge and the surface Fermi potential is essentially independent of the degree of impurity ionization. In strong inversion or at temperatures above ~600 K, the differences between the two models are small. A formula is given for the threshold voltage as a function of the impurity ionization energy. The effects of several different interface state energy distributions on inversion charge are investigated. It is found that a slowly-varying interface-state density has an effect on threshold voltage of a MOSFET similar to that of a fixed oxide charge, while an interface-state density that increases at least exponentially with energy has the effect of lowering the field-effect mobility and transconductance     

A continuous, analytic drain-current model for DG MOSFETs

This letter presents a continuous analytic current-voltage (I-V) model for double-gate (DG) MOSFETs. It is derived from closed-form solutions of Poisson's equation, and current continuity equation without the charge-sheet approximation. The entire I/sub ds/(V/sub g/,V/sub ds/) characteristics for all regions of MOSFET operation: linear, saturation, and subthreshold, are covered under one continuous function, making it ideally suited for compact modeling. By preserving the proper physics, this model readily depicts "volume inversion" in symmetric DG MOSFETs-a distinctively noncharge-sheet phenomenon that cannot be reproduced by standard charge-sheet based I-V models. It is shown that the I-V curves generated by the analytic model are in complete agreement with two-dimensional numerical simulation results for all ranges of gate and drain voltages.     

Two-dimensional finite element charge-sheet model of a short-channel MOS transistor

A two-dimensional charge-sheet model for short-channel MOS transistors has been developed. The unique feature of the model is that the effect of channel inversion layer charge is included as a nonlinear integral boundary condition on the two-dimensional electrostatic field in the transistor. The average inversion layer charge density and source-drain current are obtained directly from the model rather than from the electron density or electron quasi-Fermi level. The model retains all of the physical detail of more complex two-dimensional models such as sensitivity to source-drain profile shape, channel profile, and oxide field shape. This allows the model to represent the changes in drain current associated with short-channel effects while still allowing simple comparison with long-channel models. For long-channel transistors, the results of this model are identical to Brews' long-channel charge-sheet model. The accuracy of this model is verified by modeling a sequence of transistors with channel lengths between 4.6 and 1.1 μm. In short-channel transistors, effects previously attributed to high field mobility are explained by simple two-dimensional electrostatics.The simulations produced using this model have been compared to experimental measurements on an array of n-channel MOSFETs; the model is in good agreement for transistors with channel lengths as short as 1.1 μm. In this verification process, the model represented accurately the onset of subthreshold current, channel-length-induced threshold voltage offset, and drain-field-induced output conductance changes.From studies of numerical accuracy, we conclude that the charge-sheet model can easily simulate drain current with an accuracy which exceeds that required for most applications. To obtain 5% accuracy for drain current, a 146 element mesh is sufficient. Refinement of the 146 element mesh to a 455 element mesh gives a current which is accurate to 0.16%. Average computer time for a high current solution is 2.5 min on a DEC-20.The numerical solutions were obtained using general-purpose software for solving elliptic partial differential equations. We have been able to solve problems with exact solutions to test the correctness and accuracy of our codes. We also can easily change the physics included in our model and the geometry of the transistor. The finite element method used allows refinement of oblique triangles which is important in achieving computational efficiency. The program is portable and has been run on a DEC-20, a VAX $\text{11}\text{780}$, a Cyber 175 and a Univac 1108.     

Quasi-static and nonquasi-static compact MOSFET models based on symmetric linearization of the bulk and inversion charges

A particularly simple form of the charge-sheet model (CSM) is developed using symmetric linearization of the bulk charge as a function of the surface potential. The new formulation is verified by comparison with the original form of the CSM and is used to obtain a simple and accurate expressions for the quasi-static (QS) terminal charges based on the Ward-Dutton partition. Combined with the spline collocation version of the weighted residuals method, symmetric linearization leads to a relatively simple version of the nonquasi-static (NQS) MOSFET model. The efficiency of the proposed approach to MOSFET modeling is enhanced by taking advantage of the recently developed noniterative algorithm for computing surface potential as a function of the terminal voltages. An important symmetry of the various MOSFET characteristics with respect to the source/drain interchange is preserved in both the QS and NQS versions of the symmetrically linearized CSM.     

A charge-sheet capacitance model based on drain current modeling

Analytical models of the drain current and the capacitances of a MOSFET are formulated using the charge-sheet approach. Mobility reduction due to velocity saturation and interface scattering of carriers are taken into account. A saturation criterion is developed from the condition of output conductance continuity. The capacitance modeling does not require additional parameters not contained in the DC model. Comparison with experimental data confirms that the theory is useful for analog circuit simulation down to channel lengths of about 1 μm     

Numerical analysis of capacitance compact models for organic thin-film transistors

Analytical expressions for the gate-voltage dependence of the channel capacitance and the gate-to-contacts overlap capacitances in top-contact organic thin-film transistors (OTFTs) are derived and implemented in an organic compact capacitance model. The resulting modified model is verified by experimental data of transistors with constant mobility. The same model is analyzed by numerical simulations for OTFTs with a voltage-dependent mobility. The simulation results indicate that the quasistatic model describes well the simulated capacitances. In accumulation, the modeled values are slightly overestimated because of the generally accepted assumption of the charge-sheet model. It is also demonstrated that the quasistatic regime occurs at lower frequencies because of the reduced mobility at lower charge carrier concentrations.     

Double-charge-sheet model for thin silicon-on-insulator films

A simple algorithm is proposed that facilitates the calculation of surface potentials and charge densities at the front and back interfaces in thin silicon-on-insulator (SOI) layers by decoupling of the potentials and charges at the two interfaces. An expression relating the front surface potential and inversion charge to the front and back gate biases is derived and compared with a numerical solution of Poisson's equation. The charge-sheet model agrees well with the simulation results over the front-surface bias range from weak to heavy inversion and with the back silicon surface biased into accumulation, depletion, and inversion. The results are shown to be reasonably accurate for all doping densities of common interest and for SOI film thicknesses above approximately 20 nm. An extension of the model to a nonequilibrium system is used to derive an expression for the drain current in a fully-depleted SOI MOSFET. Other applications of the model include a closed-form analytical solution for the threshold voltage and a calculation of the interface-state trapped charge     

Continuous analytic I-V model for surrounding-gate MOSFETs

We present a continuous analytic current-voltage (I-V) model for cylindrical undoped (lightly doped) surrounding gate (SGT) MOSFETs. It is based on the exact solution of the Poisson's equation, and the current continuity equation without the charge-sheet approximation, allowing the inversion charge distribution in the silicon film to be adequately described. It is valid for all the operation regions (linear, saturation, subthreshold) and traces the transition between them without fitting parameters, being ideal for the kernel of SGT MOSFETs compact models. We have demonstrated that the I-V characteristics obtained by this model agree with three-dimensional numerical simulations for all ranges of gate and drain voltages.     

SQM-OTFT: A compact model of organic thin-film transistors based on the symmetric quadrature of the accumulation charge considering both deep and tail states

A physically-based compact model of organic thin-film transistors suitable for CAD simulators is proposed. It is worked out by means of a newly developed and particularly simple form of the charge-sheet model: the symmetric quadrature of the accumulation charge. The model is based on the variable-range hopping and accounts for both deep and tail states. It is simple, symmetric, accurately accounts for the below-threshold, linear, and saturation regimes via a unique formulation. The symmetric quadrature is accurate within 5% in all regions of operation and the resulting current model is suitable both for p- and n-type transistors. The model leads to a significant simplification of the drain current and of the quasi-static expressions of the terminal charges based on the Ward–Dutton partition. Finally, the symmetric quadrature leads to an explicit and analytically tractable solution for the surface potential as a function of position in the device channel that can be extremely useful to implement advanced physical effects.     

Continuous analytic I–V model for GS DG MOSFETs including hot-carrier degradation effects

We have studied the influence of hot-carrier degradation effects on the drain current of a gate-stack double-gate (GS DG) MOSFET device. Our analysis is carried out by using an accurate continuous current-voltage (I-V) model, derived based on both Poisson's and continuity equations without the need of charge-sheet approximation. The developed model offers the possibility to describe the entire range of different regions (subthreshold, linear and saturation) through a unique continuous expression. Therefore, the proposed approach can bring considerable enhancement at the level of multi-gate compact modeling including hot-carrier degradation effects.     

Continuous analyticⅠ-Ⅴmodel for GS DG MOSFETs including hot-carrier degradation effects

正We have studied the influence of hot-carrier degradation effects on the drain current of a gate-stack double-gate(GS DG) MOSFET device.Our analysis is carried out by using an accurate continuous current-voltage (Ⅰ-Ⅴ) model,derived based on both Poisson's and continuity equations without the need of charge-sheet approximation. The developed model offers the possibility to describe the entire range of different regions(subthreshold, linear and saturation) through a unique continuous expression.Therefore,the proposed approach can bring considerable enhancement at the level of multi-gate compact modeling including hot-carrier degradation effects.     

A surface potential-based compact model of n-MOSFET gate-tunneling current

Aggressive scaling of the gate-oxide thickness has made gate-tunneling current an essential aspect of MOSFET modeling. This work presents a novel physics-based compact model of gate current in the n-MOSFET. A simplified version of the Esaki-Tsu formula is developed to calculate the tunneling current density, in which the original integral is approximated to retain the essential physics without sacrificing computational efficiency required in a compact model. The proposed model is surface potential-based in both the channel and source/drain overlap regions. The channel component of the gate current is physically partitioned into the source and drain parts using a symmetrically linearized version of the charge-sheet model. The partition is implemented in analytical form and accounts for the drain bias dependence of the channel component. A small number of adjustable parameters is sufficient to reproduce the experimentally observed bias and geometry dependence of the gate current for several advanced processes.     

An analytic potential model for symmetric and asymmetric DG MOSFETs

This paper presents an analytic potential model for long-channel symmetric and asymmetric double-gate (DG) MOSFETs. The model is derived rigorously from the exact solution to Poisson's and current continuity equation without the charge-sheet approximation. By preserving the proper physics, volume inversion in the subthreshold region is well accounted for in the model. The resulting analytic expressions of the drain-current, terminal charges, and capacitances for long-channel DG MOSFETs are continuous in all operation regions, i.e., linear, saturation, and subthreshold, making it suitable for compact modeling. As no fitting parameters are invoked throughout the derivation, the model is physical and predictive. All parameter formulas are validated by two-dimensional numerical simulations with excellent agreement. The model has been implemented in Simulation Program with Integrated Circuit Emphasis version 3 (SPICE3), and the feasibility is demonstrated by the transient analysis of sample CMOS circuits.     

A charge-sheet model of the MOSFET

Intuition, device evolution, and even efficient computation require simple MOSFET (metal-oxide-semiconductor field-effect transistor) models. Among these simple models are charge-sheet models which compress the inversion layer into a conducting plane of zero thickness. It is the purpose of this paper to test one such charge sheet model to see whether this approximation is too severe. This particular model includes diffusion which is expected to be important in the subthreshold and saturation regions.As a test the charge sheet model is applied to long-channel devices. Long-channel MOSFET behavior has been thoroughly studied, and is very well explained by the Pao-Sah double-integral formula for the current. Hence, a clear-cut test is a comparison of the charge sheet model with the Pao-Sah model.We find the charge sheet model has two advantages over the Pao-Sah model.(1) It leads to a very simple algebraic formula for the current of long-channel devices. The same formula applies in all regimes from subthreshold to saturation. Neither splicing nor parameter changes are needed. No discontinuities occur in either the current or the small-signal parameters, or in the derivatives of the small-signal parameters.(2) It is simpler to extend the charge sheet model to two or three dimensions than the Pao-Sah model. This simplification is a result of dropping the details of the inversion layer charge distribution.An important aspect of the gradual channel approximation is brought out by the analysis. Suppose the boundary condition relating the quasi-fermi level at the drain, φ_fL, to that at the source, φ_fo, namely

$\text{φ}{}_{\mathrm{?L}}\text{=φ}{}_{\mathrm{?0}}\text{+V}{}_{\mathrm{D}}$

where V_D is the drain voltage, is applied in all bias regimes. Then it is shown that this means the potential at the drain end of the channel, φ_sL is not related to the potential at the source end of the channel, _φso, by

$\text{φ}{}_{\mathrm{sL}}\text{=φ}{}_{\mathrm{s0}}\text{+V}{}_{\mathrm{D}}$

Instead, φ_sL is computed, not imposed as a boundary condition. It is suggested that this failure of the potential to satisfy the boundary condition at the drain is justifiable. That is, φ_sL should be reinterpreted as the potential at the point in the channel where the gradual channel approximation fails. Hence, (2) may be relaxed. However, the “channel length” in the gradual-channel approximation now becomes a fitting parameter and is not the metallurgical source-to-drain separation.In addition several aspects of the long-channel MOSFET are brought out: (1) Pinch-off is achieved only asymptotically as the drain voltage tends to infinity. This is in marked contrast to the often-stated, textbook view that pinch-off is achieved for some finite drain voltage, the saturation voltage. (2) The channel or drain conductance approaches zero only asymptotically. (3) The transconductance saturates only asymptotically.Figures comparing the simple charge-sheet model formulas with the usual textbook formulas are included for direct-current vs drain voltage, channel conductance vs drain voltage, and transconductance vs drain voltage. The charge-sheet model agrees with the original Pao-Sah double-integral formula for the current at all gate and drain voltages, and possesses the correct subthreshold behavior. The textbook formulas do not.     

A model for gated-lateral BJTs based on standard MOSFET models

The Pao-Sah MOSFET equation is modified so that it applies when the source-body junction is forward biased. The modified equation can be separated into two components: (1) a MOSFET charge-sheet term and (2) a bipolar transistor term. The role of the two components in the variable gain of gated-lateral bipolar transistors (GL-BJT) is discussed     

An evaluation of injection modeling

Charge storage in the base of an MTL structure is evaluated using two-dimensional simulation. The results are compared to those predicted by the method of injection modeling as developed by H.H. Berger. The results show that injection modeling yields pessimistic estimates of the stored base charge for a homogeneous base device. For the more important case of a graded base structure, injection modeling yields estimates which are very close to those computed in the two-dimensional simulation.