60-GHz pseudomorphic-MODFET low-noise MMIC amplifiers

The development of V-band low-noise monolithic microwave integrated circuits (MMICs) based on pseudomorphic modulation-doped FETs (P-MODFETs) is presented. These dual-stage MMICs incorporate P-MODFETs, with 0.35-μm×60-μm gates, as the active elements, electron-beam-written tuning elements, and DC-blocking and bias networks. The dual-stage chips exhibited a maximum gain of 10.2 dB at 59.5 GHz and a minimum noise figure of 5.3 dB, with an associated gain of 8.2 dB at 58.2 GHz. A cascaded four-stage amplifier using two MMIC modules exhibited 5.8-dB minimum noise figure with an associated gain of 18.3 dB at 58 GHz and up to 21.1 dB of maximum gain     

Very high gain millimeter-wave InAlAs/InGaAs/GaAs metamorphicHEMT's

We report the first demonstration of W-band metamorphic HEMTs/LNA MMICs using an AlGaAsSb lattice strain relief buffer layer on a GaAs substrate. 0.1×50 μm low-noise devices have shown typical extrinsic transconductance of 850 mS/mm with high maximum drain current of 700 mA/mm and gate-drain breakdown voltage of 4.5 V. Small-signal S-parameter measurements performed on the 0.1-μm devices exhibited an excellent f_T of 225 GHz and maximum stable gain (MSG) of 12.9 dB at 60 GHz and 10.4 dB at 110 GHz. The three-stage W-band LNA MMIC exhibits 4.2 dB noise figure with 18 dB gain at 82 GHz and 4.8 dB noise figure with 14 dB gain at 89 GHz, The gain and noise performance of the metamorphic HEMT technology is very close to that of the InP-based HEMT     

W-band low-noise InAlAs/InGaAs lattice-matched HEMTs

Very low-noise 0.15-μm gate-length W-band In_0.52 Al_0.48As/In_0.53Ga_0.47As/In _0.52Al_0.48As/InP lattice-matched HEMTs are discussed. A maximum extrinsic transconductance of 1300 mS/mm has been measured for the device. At 18 GHz, a noise figure of 0.3 dB with an associated gain of 17.2 dB was measured. The device also exhibited a minimum noise figure of 1.4 dB with 6.6-dB associated gain at 93 GHz. A maximum available gain of 12.6 dB at 95 GHz, corresponding to a maximum frequency of oscillation, f_max, of 405 GHz (-6-dB/octave extrapolation) in the device was measured. These are the best device results yet reported. These results clearly demonstrate the potential of the InP-based HEMTs for low-noise applications, at least up to 100 GHz     

High-performance Ka-band and V-band HEMTlow-noise amplifiers

Quarter-micron-gate-length high-electron-mobility transistors (HEMTs) have exhibited state-of-the-art low-noise performance at millimeter-wave frequencies, with minimum noise figures of 1.2 dB and 32 GHz and 1.8 dB at 60 GHz. At Ka-band, two-stage and three-stage HEMT low-noise amplifiers have demonstrated noise figures of 1.7 and 1.9 dB, respectively, with associated gains of 17.0 and 24.0 dB at 32 GHz. At V-band, two stage and three-stage HEMT amplifiers yielded noise figures of 3.2 and 3.6 dB, respectively, with associated gains of 12.7 and 20.0 dB and 60 GHz. The 1-dB-gain compression point of all the amplifiers is greater than +6 dBm. The results clearly show the potential of short-gate-length HEMTs for high-performance millimeter-wave receiver application     

A 7-GHz 1.8-dB NF CMOS low-noise amplifier

A 7-GHz low-noise amplifier (LNA) was designed and fabricated using 0.25-μm CMOS technology. A cascode configuration with a dual-gate MOSFET and shielded pads were adopted to improve the gain and the noise performance. The effects of the dual-gate MOSFET and the shielded pads are discussed quantitatively. An associated gain of 8.9 dB, a minimum noise figure of 1.8 dB, and an input-referred third-order intercept point of +8.4 dBm were obtained at 7 GHz. The LNA consumes 6.9 mA from a 2.0-V supply voltage. These measured results indicate the feasibility of a CMOS LNA employing these techniques for low-noise and high-linearity applications at over 5 GHz     

110-120-GHz monolithic low-noise amplifiers

The authors discuss the development of 110-120-GHz monolithic low-noise amplifiers (LNAs) using 0.1-mm pseudomorphic AlGaAs/InGaAs/GaAs low-noise HEMT technology. Two 2-stage LNAs have been designed, fabricated, and tested. The first amplifier demonstrates a gain of 12 dB at 112 to 115 GHz with a noise figure of 6.3 dB when biased for high gain, and a noise figure of 5.5 dB is achieved with an associated gain of 10 dB at 113 GHz when biased for low-noise figure. The other amplifier has a measured small-signal gain of 19.6 dB at 110 GHz with a noise figure of 3.9 dB. A noise figure of 3.4 dB with 15.6-dB associated gain was obtained at 113 GHz. The authors state that the small-signal gain and noise figure performance for the second LNA are the best results ever achieved for a two-stage HEMT amplifier at this frequency band     

60-GHz pseudomorphicAl0.25Ga0.75As/In0.28Ga0.72As low-noise HEMTs

V-band low-noise planar-doped pseudomorphic (PM) InGaAs high electron mobility transistors (HEMTs) were fabricated with an indium mole fraction of 28% in the InGaAs channel. A device with 0.15-μm T-gate achieved a minimum noise figure of 1.5 dB with an associated gain of 6.1 dB at 61.5 GHz     

Manufacturing study of yield and performance dependence on gatelength of submicron AlInAs-GaInAs HEMTs

The fabrication, characterization, and statistical analysis of the performance and yield of AlInAs-GaInAs on InP low-noise high electron mobility transistors (HEMTs) with subquarter-micron T-gates fabricated with electron beam lithography are reported. This was undertaken to establish the manufacturability of submicron AlInAs-GaInAs HEMT technology for various low-noise microwave receiver applications. Excellent DC device yield (up to 90%) was obtained from devices to gate widths 300 μm and 1000 μm. A range of minimum noise figures between 0.026 to 0.5 dB at 2 GHz and 0.39 to 0.8 dB at 12 GHz were obtained for 0.15-μm and 0.20-μm gate length devices. The results establish the correlation between the noise figure and yield for this new class of microwave devices     

220-GHz metamorphic HEMT amplifier MMICs for high-resolution imaging applications

In this paper, the development of 220-GHz low-noise amplifier (LNA) MMICs for use in high-resolution active and passive millimeter-wave imaging systems is presented. The amplifier circuits have been realized using a well-proven 0.1-/spl mu/m gate length and an advanced 0.05-/spl mu/m gate length InAlAs/InGaAs based depletion-type metamorphic high electron mobility transistor technology. Furthermore, coplanar circuit topology in combination with cascode transistors was applied, leading to a compact chip size and an excellent gain performance at high millimeter-wave frequencies. A realized single-stage 0.05-/spl mu/m cascode LNA exhibited a small-signal gain of 10 dB at 222 GHz, while a 0.1-/spl mu/m four-stage amplifier circuit achieved a linear gain of 20 dB at the frequency of operation and more than 10 dB over the bandwidth from 180 to 225 GHz.     

Millimeter-wave low-noise and high-power metamorphic HEMTamplifiers and devices on GaAs substrates

This paper reports on state of-the-art HEMT devices and circuit results utilizing 32% and 60% indium content InGaAs channel metamorphic technology on GaAs substrates. The 60% In metamorphic HEMT (MHEMT) has achieved an excellent 0.61-dB minimum noise figure with 11.8 dB of associated gain at 26 GHz. Using this MHEMT technology, two and three-stage Ka-band low-noise amplifiers (LNAs) have demonstrated <1.4-dB noise figure with 16 dB of gain and <1.7 with 26 dB of gain, respectively. The 32% In MHEMT device has overcome the <3.5-V drain bias limitation of other MHEMT power devices, showing a power density of 650 mW/mm at 35 GHz, with V_ds=6 V     

K-band low-noise amplifiers using 0.18 /spl mu/m CMOS technology

Two K-Band low-noise amplifiers (LNAs) are designed and implemented in a standard 0.18 /spl mu/m CMOS technology. The 24 GHz LNA has demonstrated a 12.86 dB gain and a 5.6 dB noise figure (NF) at 23.5 GHz. The 26 GHz LNA achieves an 8.9 dB gain at the peak gain frequency of 25.7 GHz and a 6.93 dB NF at 25 GHz. The input referred third-order intercept point (IIP3) is >+2 dBm for both LNAs with a current consumption of 30 mA from a 1.8 V power supply. To our knowledge, the LNAs show the highest operation frequencies ever reported for LNAs in a standard CMOS process.     

A 24-GHz 3.9-dB NF low-noise amplifier using 0.18 /spl mu/m CMOS technology

A 24-GHz low-noise amplifier (LNA) was designed and fabricated in a standard 0.18-/spl mu/m CMOS technology. The LNA chip achieves a peak gain of 13.1 dB at 24 GHz and a minimum noise figure of 3.9 dB at 24.3 GHz. The supply voltage and supply current are 1 V and 14 mA, respectively. To the author's knowledge, this LNA demonstrates the lowest noise figure among the reported LNAs in standard CMOS processes above 20 GHz.     

A high-gain, low-noise 1/2-μm pulse-doped pseudomorphic HEMT

A 1/2-μm gate-length pulse-doped pseudomorphic high-electron-mobility transistor (HEMT) grown by MBE, which exhibits a current-gain cutoff frequency of 62 GHz, is discussed. The maximum available gain cutoff frequency was greater than 150 GHz. A minimum noise figure of 0.85 dB and associated gain of 14 dB were measured at 10 GHz. Tuned small-signal gain in a waveguide-to-microstrip test fixture at 44 GHz was 7.6 dB. When the HEMT was tuned for power, 260 mW/mm with 5-dB gain and 17% power-added efficiency were obtained at 44 GHz. These results suggest that a 1/2-μm pseudomorphic HEMT is a viable candidate for Q-band applications     

Concurrent dual-band LNA for dual-system dual-band GNSS receiver

Two concurrent dual-band low-noise amplifiers (LNAs) for GNSS applications are presented. They adopted resistive load and LC resonator load, respectively. On-chip circuits are used for biasing the main amplifiers and active baluns are used for single-ended-to-differential conversions. Using the power-constrained simultaneous input and noise matching technique, the LNAs achieve input matching and noise optimization simultaneously at two bands. Implemented in SMIC 0.18 μm CMOS process, both LNAs consume less than 8 mA dc current with a power supply voltage of 1.8 V. The proposed LNA with resistive load exhibits measured gains of 13 and 11.5 dB, and noise figures of 1.58 and 3.1 dB at 1.217 and 1.568 GHz, respectively. The LC load LNA has measured gains of 16 and 14.8 dB, and noise figures of 2.2 and 2.35 dB at 1.217 and 1.568 GHz, respectively.     

On-chip matched 5.2 and 5.8 GHz differential LNAs fabricated using0.35 μm CMOS technology

The authors have designed experimental 5.2 and 5.8 GHz low-noise amplifiers (LNAs) using 0.35 μm CMOS technology. The ICs feature on-chip matching to 50 Ω, differential operation, and open drain output buffers. A return loss of better than -15 dB was achieved for both amplifiers. LC parallel resonant loads were used to form the gain peak. The LNAs had a measured noise figure of 4 to 5 dB, at VSS=3.3 V     

Extremely low-noise performance of GaAs MESFETs with wide-headT-shaped gate

Fully ion-implanted low-noise GaAs MESFETs with a 0.11-μm Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeter-wave integrated circuits (MMICs). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (L_h) and the device performance is examined. The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anhold's method. A current gain cutoff frequency (f_T) and a maximum stable gain (MSG) decrease monotonously as L_h increases on account of parasitic capacitance. However, the device with L_h of 1.0 μm, which has lower gate resistance than 1.0 Ω, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz. The measured noise figure is comparable to that of GaAs-based HEMT's     

Pseudomorphic n-InGaP/InGaAs/GaAs high electron mobilitytransistors for low-noise amplifiers

The authors developed 0.15-μm-gate pseudomorphic n-InGaP/InGaAs/GaAs HEMTs for low-noise amplifiers. Passivated devices exhibited a noise figure of 0.41 dB with an associated gain of 13.0 dB at 12 GHz including package loss, and of 1.2 dB with an associated gain of 5.8 dB at 50 GHz. Reducing the short-channel effects was the key to achieving the best performance ever reported for passivated and packaged low-noise HEMTs on GaAs substrates. A high aspect ratio under the thin n-InGaP layer and good carrier confinement in the pseudomorphic InGaAs channel reduce the undesirable short-channel effects in these devices     

Microwave noise performance of InP/InGaAs heterostructure bipolartransistors

The authors report the first low-noise InP/InGaAs heterostructure bipolar transistor (HBT). Minimum noise figures of 0.46, 2.0, and 3.33 dB were measured at 2, 10, and 18 GHz, respectively. The noise performance of this InP/InGaAs HBT with an emitter size of 3.5×3.5 μm² is compared to that for FETs having a 1-μm gate length. The measured minimum noise figures agree well with calculated data using a modified Hawkins model. Broadband low-noise operation is observed because of the short transit time for injected nonequilibrium electrons to transverse the base and collector depletion region     

Half-micrometer gate-length ion-implanted GaAs MESFET with 0.8-dBnoise figure at 16 GHz

Ion-implanted GaAs MESFETs with half-micrometer gate length have been fabricated on 3-in-diameter GaAs substrates. At 16 GHz, a minimum noise figure of 0.8 dB with an associated gain of 6.3 dB has been measured. This noise figure is believed to be the lowest ever reported for 0.5- and 0.25-μm ion-implanted MESFETs, and is comparable to that for 0.25-μm HEMTs at this frequency. By using the Fukui equation and the fitted equivalent circuit model, a K_f factor of 1.4 has been obtained. These results clearly demonstrate the potential of ion-implanted MESFET technology for K-band low-noise integrated circuit applications     

60-GHz noise performance of ion-implanted InxGa1-xAs MESFET's

The authors report the 60-GHz noise performance of low-noise ion-implanted In_xGa_1-xAs MESFETs with 0.25 μm T-shaped gates and amplifiers using these devices. The device noise figure was 2.8 dB with an associated gain of 5.6 dB at 60 GHz. A hybrid two-state amplifier using these ion-implanted In_xGa_1-x As MESFETs achieved a noise figure of 4.6 dB with an associated gain of 10.1 dB at 60 GHz. When this amplifier was biased at 100% I _dss, it achieved 11.5-dB gain at 60 GHz. These results, achieved using low-cost ion-implantation techniques, are the best reported noise figures for ion-implanted MESFETs