A complete model of the I-V characteristics fornarrow-gate MOSFETs

A unified and process-independent MOSFET model for accurate prediction of the I-V characteristics and the threshold voltages of narrow-gate MOSFETs is discussed. It is based on several enhancements of the SPICE2 LEVEL3 MOS model and the author's previous subthreshold I-V model. The expressions achieved for the drain current hold in the subthreshold, transition, and strong inversion regions. A continuous model is proposed for the transition region, using a scheme that ensures that both the current and conductance are continuous and will not cause convergence problems for circuit simulation applications. All of the modeled parameters are taken from experimentally measured I-V characteristics and preserve physical meaning. Comparisons between the measured and modeled I-V characteristics show excellent agreement for a wide range of channel widths and biases. The model is well suited for circuit simulation in SPICE     

An analytical model for I-V and small-signalcharacteristics of planar-doped HEMTs

An analytical current-voltage (I-V) model for planar-doped HEMTs is developed. This compact model covers the complete range of I-V characteristics, including the current saturation region and parasitic conduction in the electron-supplying layer. Analytical expressions for the small-signal parameters and current-gain cutoff frequency are derived from the I-V model. Modeling results for a 0.1-μm-gate planar-doped AlInAs-GaInAs HEMT show excellent agreement with measured characteristics. Threshold voltages and parasitic conduction in planar-doped and uniformly doped HEMTs are also compared and discussed     

SPICE macro model for the simulation of zener diodeI-V characteristics

The problems encountered when using the existing SPICE diode model to represent the I-V characteristics of a Zener diode in the reverse region are examined. A Zener diode macro model that has accurate I-V simulation characteristics and can be easily constructed using SPICE-provided primitives is presented. The static I-V characteristics and temperature response of the diode are reviewed. The performance of the model is discussed, and its main enhancements as compared to the SPICE model are identified     

A new method of determination of the I-Vcharacteristics of negative differential conductance devices

A method for mapping the complete I-V characteristic of a negative differential conductance (NDC) device has been investigated. This method employs the measurable positive differential conductance (PDC) portions of the DC I-V curve together with the measured conductances at a fixed DC bias voltage in the PDC region with different RF signal levels using a standard semiconductor analyzer. The NDC regime of the I-V curve is numerically constructed from the measured conductances at a fixed DC bias voltage in the PDC region with different signal levels using a large-signal nonlinear-circuit analysis     

Modeling of nonhyperbolic sine I-Vcharacteristics in poly-Si resistors

Poly-Si resistors with an unimplanted channel region (and with n-type source/drain regions) can exhibit a nonhyperbolic sine (non-sinh) I-V characteristic at low V_DS and an activation energy which is not simply decreasing monotonically with increasing V_DS. These phenomena are not explained by conventional poly-Si resistor models. To describe these characteristics, a self-consistent model which includes the effects of a reverse-biased diode at the drain end is presented. Numerical simulation results show excellent agreement with experiment in regard to the shape of the I -V characteristic and of the effective activation energy as a function of V_DS     

Light-to-input nonlinearities in an R-LED series network

The light-to-current (L-I) and light-to-voltage (L-V) differential nonlinearities in the simple network of a customary LED and an external resistor R in series are analyzed and calculated theoretically and compared with experimental data. Particular emphasis is placed on the influence of the log-arithmetic slope ν of the L-I characteristic and the bias current I upon the ratio of the corresponding nonlinearity parameters. It is thus deduced that, for a given optical power P, over superlinear portions of the L-I curve (ν>1) the L-I linearity is typically better than its corresponding L-V linearity. On the contrary, when the L-I dependence is sublinear (ν<1) the voltage driving scheme may ensure for the R-LED network, or the LED alone, a local L-V response much more linear than the L-I response, provided that appropriate (optimum) I and/or R values are chosen     

Input I-V and sampling time characteristics ofthe ACT device

The input I-V and sampling-time characteristics of the acoustic charge transport (ACT) device are presented for ohmic-contact charge injection and Schottky-gate-modulated charge injection. A computationally efficient analysis technique is developed to calculate the I-V and sampling-time data from two-dimensional potential and carrier-density distributions. Device physics and architecture are incorporated into the analysis through a numerical charge-injection model which is used to compute the potential and carrier-density distributions. Theoretical results are presented to demonstrate the charge injection characteristic of some typical device structures. The effects that the injection method, the epitaxial layer structure and the acoustic wave amplitude have on device performances are discussed. The physical basis of the analysis enables it to be used to study several other design parameters. Experimental measurements of a device I-V and input transconductance show good agreement with calculated data. This analysis technique provides a means of assessing the performance potential of new device designs     

A new method of determination of the I-Vcharacteristics of negative differential conductance devices bymicrowave reflection coefficient measurements

A technique to map out all of the I-V characteristics of negative differential conductance (NDC) devices is described. This method uses the DC measurable positive conductance portions of the I-V curve together with the measured microwave reflection coefficients at different RF signal levels and fixed DC bias voltage. The advantages of the method for high NDC devices are pointed out in a stability analysis. The complete I-V curve of a tunnel diode has been obtained with an accuracy within 5% in a proof-of-principal test of this method     

Nonlinear GaAs MESFET modeling using pulsed gate measurements

The effects of traps in GaAs MESFETs are studied using a pulsed gate measurement system. The devices are pulsed into the active region for a short period (typically 1 μs) and are held in the cutoff region for the rest of a 1-ms period. While the devices are on, the drain current is sampled and a series of pulsed gate I-V curves are obtained. The drain current obtained under the pulsed gate conditions for a given V_GS and V_DS gives a better representation of the instantaneous current for a corresponding V_gs and V_ds in the microwave cycle because of the effects of traps. The static and pulsed gate curves were used in a nonlinear time-domain model to predict harmonic current. The results showed that analysis using pulsed gate curves yielded better predictions of harmonic distortion than analysis based on conventional state I-V curves under large-signal conditions     

PV module characterization using Q-Rdecomposition based on the least square method

The determination of solar cell parameters (I-V characteristic) from experimental data was achieved by using the Q -R decomposition technique based on the least squares method, where all data points were considered. The algorithm used a three-parameter equation transformed from the original cell equation of five parameters. This method could be used to analyze the I-V characteristics of photovoltaic (PV) modules of various technologies under the natural conditions of implementation, and to help to establish the best sizing of a PV system and the best adaptation of a PV system to its environment     

Analytical model for I-V characteristics ofion-implanted MESFET's with heavily doped channel

A theoretical model for the I-V characteristics of ion-implanted metal-semiconductor field-effect transistors (MESFETs) has been developed. A formula for effective drift saturation velocity for electrons and a Gaussian approximation for the inverse of reduced distances in the channel have erased the process of formulation. Theoretical formulas for early saturation of drain current and transconductance obtained in the framework of the Lehovec-Zuleeg procedure are quite simple and accurate. When calculated results from the present model are compared with available experimental results, an encouraging correspondence between the two is observed. A study of the appropriateness of the velocity overshoot and the softening of pinch-off voltage indicates that both of these phenomena are real in short-channel MESFETs and need to be carefully accounted for in a realistic model. The model is equally applicable also to ion-implanted JFETs     

1/f noise in MODFETs at low drain bias

The 1/f noise in normally-on MODFETs biased at low drain voltages is investigated. The experimentally observed relative noise in the drain current S_I/I² versus the effective gate voltage V_G=V_GS-V_off shows three regions which are explained. The observed dependencies are S_I/I²∝V_G ^m with the exponents m=-1, -3, 0 with increasing values of V_G. The model explains m =-1 as the region where the resistance and the 1/f noise stem from the 2-D electron gas under the gate electrode; the region with m=0 at large V_G or V_GS≅0 is due to the dominant contribution of the series resistance. In the region at intermediate V_G , m=-3, the 1/f noise stems from the channel under the gate electrode, and the drain-source resistance is already dominated by the series resistance     

Temperature dependence of common-emitter I-V andcollector breakdown voltage characteristics in AlGaAs/GaAs andAlInAs/GaInAs HBT's grown by MBE

Temperature-dependent measurements from 25 to 125°C have been made of the DC I-V characteristics of HBTs with GaAs and In_0.53Ga_0.47As collector regions. It was found that the GaAs HBTs have very low output conductance and high collector breakdown voltage BV_CEO>10 V at 25°C, which increases with temperature. In striking contrast, the In_0.53Ga_0.47As HBTs have very high output conductance and low BV_CEO~2.5 V at 25°C, which actually decreases with temperature. This different behavior is explained by the >10⁴ higher collector leakage current, I_CO, in In_0.53Ga_0.47As compared to GaAs due to bandgap differences. It is also shown that device self-heating plays a role in the I-V characteristics     

Modeling the gate I/V characteristic of a GaAsMESFET for Volterra-series analysis

The authors show that the Taylor-series coefficients of a FET's gate/drain I/V characteristic, which is used to model this nonlinearity for Volterra-series analysis, can be derived from low-frequency RF measurements of harmonic output levels. The method circumvents many of the problems encountered in using DC measurements to characterize this nonlinearity. This method was used to determine the incremental gate I/V characteristic of a packaged Aventek AT10650-5 MESFET biased at a drain voltage of 3 V and drain current of 20 mA. The FET's transconductance was measured at DC, and its small-signal equivalent circuit (including the package parasitics) was determined by adjusting its circuit element values until good agreement between calculated and measured S parameters was obtained. The FET was then installed in a low-frequency test fixture. Excellent results were obtained     

DC I-V characteristics of field emitter triodes

A simple model that is applicable to Spindt-type emitter triodes is presented. Experimentally, it has been observed that the gate current at zero collector voltage follows the same Fowler-Nordheim law as the collector current at high collector voltage, and that for low emission current densities, the sum of gate and collector currents is constant for any collector voltage and is given by the Fowler-Nordheim current I_FN. Based on these observations, a simple model has been developed to calculate the I-V characteristics of a triode. By measuring the Fowler-Nordheim emission, emission area and field enhancement can be obtained assuming a value for the barrier height. Incorporating the gate current, the collector current can be calculated from I_c=I_FN-I_g as a function of collector voltage. The model's accuracy is best at low current density. At higher emission currents, deviations occur at low collector voltages because the constancy of gate and collector currents is violated     

Interpretation and control of C-V measurementsusing pattern recognition and expert system techniques

The authors demonstrate how a pattern-recognition system can be applied to the interpretation of capacitance-voltage (C-V ) curves on an MOS test structure. By intelligently sequencing additional measurements it is possible to accurately extract the maximum amount of information available from C-V and conductance-voltage (G-V) measurements. The expert system described, (CV-EXPERT), is completely integrated with the measurement, instrumentation, and control software and is thus able to call up a sequence of individually tailored tests for the MOS test structure under investigation. The prototype system is able to correctly identify a number of process faults, including a leaky oxide, as shown. Improvements that could be gained from developing rules to coordinate G-V, capacitance-time, and doping profile measurements simply by recognizing the important factors in the initial C- V measurement are illustrated     

Modeling MESFETs for intermodulation analysis of mixers andamplifiers

The problem of modeling GaAs MESFETs for calculations of intermodulation and spurious responses is examined. It is shown that an adequate model must express not only the absolute I/V characteristics of the device, but also the derivatives of those characteristics. It is demonstrated that these derivatives are dominant in determining intermodulation levels, and that the common approaches to modeling MESFETs do not model those derivatives very well. Finally, a new model for the MESFET gate I/V characteristic (the dominant nonlinearity in most FETs) that is accurate through at least the third derivative is proposed     

Threshold voltage and C-V characteristics of SOIMOSFET's related to Si film thickness variation on SIMOX wafers

C-V characteristics of fully depleted SOI MOSFETs have been studied using a technique for measuring silicon-film thickness using a MOSFET. The technique is based on C-V measurements between the gate and source/drain at two different back-gate voltages, and only a large-area transistor is required. Using this technique, SOI film thickness mapping was made on a finished SIMOX wafer and a thickness variation of ±150 Å was found. This thickness variation causes as much as a 100-mV variation in the device threshold voltage. The silicon-film thickness variation and threshold-voltage variation across a wafer shows a linear correlation dependence for a fully depleted device. C-V measurements of the back-gate device yield the buried-oxide thickness and parasitic capacitances. The effects of GIDL (gate-induced drain leakage) current on C-V characteristics are also discussed     

Parameter extraction from I-V characteristics ofsingle MOSFETs

A method is presented to extract the bias-dependent series resistances and intrinsic conductance factor of individual MOS transistors from measured I-V characteristics. If applied to groups of scaled channel length devices, it also allows determination of the effective channel length together with the transversal field dependence of the carrier mobility. The method is exactly derived from conventional MOS theory based on the gradual channel approximation, and the deviations from such an ideal case are studied by means of two-dimensional device simulations. Experimental results obtained with n- and p-channel transistors of conventional as well as LDD type are presented to show the correctness of the proposed extraction procedure     

Electrical transport properties of crystalline siliconcarbide/silicon heterojunctions

The electrical transport properties of β-SiC/Si heterojunctions were investigated using current-voltage (I-V) and capacitance-voltage (C-V) characteristics. The heterojunctions were fabricated by growing n-type crystalline β-SiC films on p-type Si substrates by chemical vapor deposition (CVD). The I-V data measured at various temperatures indicate that at relatively high current, the heterojunction forward current is dominated by thermionic emission of carriers and can be expressed as exp(-qV_bi/kT ) exp(V/ηkT), where V_bi is the built-in voltage of the heterojunction and η(=1.3) is a constant independent of voltage and temperature. At lower current, defect-assisted multitunneling current dominates. The effective density of states and the density-of-states effective mass of electrons in the conduction band of SiC are estimated to be 1.7×10²¹ cm ^-3 and 0.78m₀, respectively. This study indicates that the β-SiC/Si heterojunction is a promising system for heterojunction (HJ) devices such as SiC-emitter heterojunction bipolar transistors (HBTs)