Asynchronous, all-optical signal processing based on the self-frequency shift of a gigahertz Raman soliton

Ultrafast asynchronous all-optical signal processing is experimentally demonstrated. It is based on the intensity-dependent, self-frequency shift of a gigahertz Raman soliton. We demonstrate error-free, asynchronous, all-optical, bit-by-bit, self-signal recognition and demultiplexing from contended optical packets without use of an optical buffer, control pulse, or bit-phase synchronization. Fourfold, contended, 9.95-Gbit/s optical packets are transmitted through a conventional repeater span of 80 km and simultaneously demultiplexed to multiwavelength 9.95-Gbit/s optical packets with 0.5-dB processing sensitivity. Furthermore, we successfully accomplish demultiplexing from overlapping signals in contended optical packets with better than 3-dB recognition sensitivity. We confirm the capability of realizing a 3x cascade operation from bit-error-rate measurements.     

Asymmetric optical loop mirror: analysis of an all-optical switch

We present an analysis of the optical loop mirror in which a nonlinear optical element is asymmetrically placed in the loop. This analysis provides a general framework for the operation of a recently invented ultrafast all-optical switch known as the terahertz optical asymmetric demultiplexer. We show that a loop with small asymmetry, such as that used in the terahertz optical asymmetric demultiplexer, permits low-power ultrafast all-optical sampling and demultiplexing to be performed with a relatively slow optical nonlinearity. The size of the loop is completely irrelevant to switch operation as long as the required degree of asymmetry is accommodated. This is therefore the first low-power ultrafast all-optical switch that can be integrated on a single substrate.     

Integrated all-optical logic and arithmetic operations with the help of a TOAD-based interferometer device--alternative approach

Interferometric devices have drawn a great interest in all-optical signal processing for their high-speed photonic activity. The nonlinear optical loop mirror provides a major support to optical switching based all-optical logic and algebraic operations. The gate based on the terahertz optical asymmetric demultiplexer (TOAD) has added new momentum in this field. Optical tree architecture (OTA) plays a significant role in the optical interconnecting network. We have tried to exploit the advantages of both OTA- and TOAD-based switches. We have proposed a TOAD-based tree architecture, a new and alternative scheme, for integrated all-optical logic and arithmetic operations.     

Bit-level packet-switching all-optical multihop shuffle networks with deflection routing

We propose an all-optical packet-switching scheme in multihop shuffle networks in which deflection routing is used as its contention-resolution principle. In our scheme only partial address information in the packet header is read before a routing decision is made. Because the new scheme does not involve a time-consuming look-up table, extremely low latency operation is possible at each node. Moreover, because the number of demultiplexers at each node can be kept constant even though the network size changes, cost-effective design of a node is possible.     

Integrated model for performance analysis of all-optical multihop packet switches

The overall performance of an all-optical packet switching system is usually determined by two criteria, i.e., switching latency and packet loss rate. In some real-time applications, however, in which packets arriving later than a timeout period are discarded as loss, the packet loss rate becomes the most dominant criterion for system performance. Here we focus on evaluating the performance of all-optical packet switches in terms of the packet loss rate, which normally arises from the insufficient hardware or the degradation of an optical signal. Considering both aspects, we propose what we believe is a new analysis model for the packet loss rate that reflects the complicated interactions between physical impairments and system-level parameters. On the basis of the estimation model for signal quality degradation in a multihop path we construct an equivalent analysis model of a switching network for evaluating an average bit error rate. With the model constructed we then propose an integrated model for estimating the packet loss rate in three architectural examples of multihop packet switches, each of which is based on a different switching concept. We also derive the bounds on the packet loss rate induced by bit errors. Finally, it is verified through simulation studies that our analysis model accurately predicts system performance.     

Energy and Timing Measurement with Time-Based Detector Readout for PET Applications: Principle and Validation with Discrete Circuit Components

A new signal processing method for PET application has been developed, with discrete circuit components to measure energy and timing of a gamma interaction based solely on digital timing processing without using an amplitude-to-digital convertor (ADC) or a constant fraction discriminator (CFD). A single channel discrete component time-based readout (TBR) circuit was implemented in a PC board. Initial circuit functionality and performance evaluations have been conducted. Accuracy and linearity of signal amplitude measurement were excellent, as measured with test pulses. The measured timing accuracy from test pulses reached to less than 300 ps, a value limited mainly by the timing jitter of the prototype electronics circuit. Both suitable energy and coincidence timing resolutions (~18% and ~1.0 ns) have been achieved with 3 × 3 × 20 mm(3) LYSO scintillator and photomultiplier tube-based detectors. With its relatively simple circuit and low cost, TBR is expected to be a suitable front-end signal readout electronics for compact PET or other radiation detectors requiring the reading of a large number of detector channels and demanding high performance for energy and timing measurement.     

On economical timing-error detectors for QAM receivers

This paper deals with timing jitter reduction in the timing recovery loop of a digital QAM receiver. The main contribution, which is derived analytically, is an economical prefilter to reduce the timing jitter in timing recovery loops containing either the early-late or the Gardner timing-error detector (TED). The proposed prefilter has the advantage of being an infinite impulse response filter that is placed inside the TED and runs at the symbol rate. For small roll off factors, it is shown with a computer simulation that a single-pole filter placed inside either the early-late or the Gardner detector is quite effective in reducing the timing jitter.     

A 1.5 GHz phase-locked loop with leakage current suppression in 65 nm CMOS

In the nanoscale CMOS process, the problem of leakage current causes the performance of the analog circuits to degrade. The leakage current of a loop filter, which is realised by MOS capacitors, significantly degrades the jitter performance of a phase-locked loop. A leakage suppression circuit is presented by using a combination of switchable varactors and current sources to compensate the leakage of MOS capacitors in a loop filter. This PLL has been fabricated in a 65 nm CMOS process and the core area is 0.4 X 0.5 mm². With the leakage suppression circuit, the peak-to-peak jitter and the rms jitter are 43 and 5.36 ps, respectively.The power is 17 mW for a 1.2 V supply.     

A Multihit Time-to-Digital Converter Architecture on FPGA

We present a multihit time-to-digital converter (TDC) architecture implemented in a field-programmable gate array (FPGA) with minimized timing overhead. The TDC circuit provides two-level fine-time interpolation. The fine interpolator is a matrix of Vernier delay cells interconnected in a topology to provide two propagation paths for the incoming data pulse. Two methods of calibration are presented to estimate the component delays. The TDC circuit achieves time measurements with a resolution of 75 ps with an average precision of $sim$300 ps and is capable of detecting incoming pulses at a distance of 7.5 ns or more from each other.      

Tenth-order rational-harmonic frequency multiplication and detuning of optical pulse injection-locked erbium-doped fiber laser

The jitter and frequency-detuning dynamics of a 10-GHz rational-harmonic frequency-multiplied pulse train generated from an erbium-doped fiber laser (EDFL) is studied. The EDFL is self-feedback seeded and optically injection locked by a gain-switched laser diode (GSLD) with a pulse width and an average power of 17.6 ps and 0.2 mW, respectively, at a repetition frequency of 1 GHz. The repetition frequency of the optical pulse train can be tenth-order multiplied by a slight detuning of the repetition frequency of the GSLD to match the rational-harmonic injection-locked condition of the EDFL. As the repetition frequency is multiplied from 1 to 10 GHz, the peak power, the pulse width, and the frequency-detuning bandwidth of the injection-locked EDFL pulses decrease from 1.2 to 0.3 W, from 40 to 21 ps, and from 40 to 9 kHz, respectively. The timing jitter of the injection-locked EDFL repeated at 1 GHz remains unchanged (< 0.5 ps) within the detuning bandwidth, which inevitably increases to 1.2 ps after tenth-order multiplication.     

Jitter smoothing and traffic modeling for MPEG-2 video transport over ATM networks

In this article, we study how to deal with jitter when a variable-bit-rate (VBR) MPEG-2 video is delivered through asynchronous transfer mode (ATM) networks. First, the MPEG-2 system and its timing model are reviewed and difficulties introduced by ATM cell delay jitter are elucidated. Second, approaches to smoothing network jitter for both constant-bit-rate and VBR traffic are reviewed. A novel approach to modeling the end-to-end MPEG-2 packet generation and arrival process in the presence of network jitter is next presented. Based on this model, the buffer behavior of the MPEG-2 transport stream system target decoder is simulated. Simulation results show that jitter significantly affects the required decoder buffer size and packet loss ratio. © 1998 John Wiley & Sons, Inc. Int J Imaging Syst Technol, 9, 332–339, 1998     

Performance effect in optical-communication systems caused by phase ripples of dispersive components

We develop a simple theory that relates the performance of an optical component to the variance of the amplitude of its phase ripple that has been weighted by the incoming signal spectrum. Comparisons of model predictions for chirped fiber gratings with 10-Gbit/s test-bed simulations and measurements agree.     

Optical signal processing using integrated multi-element SOA-MZI switch arrays for packet switching

The use of discrete but interconnected SOA-MZI switches for performing logical and highly functional processing tasks, demonstrating the multi-functional potential of the photonic switching elements is discussed. An all-optical 3R burst-mode receiver consisting of four SOA-MZI switches and operating error-free with 40-Gb/s optical bursts, proving that interconnection of multiple switching units can lead to the realisation of key network node functionalities offering increased intelligence at the physical layer is presented. In order to allow for easier interconnectivity between the SOA-MZI switches and to provide compactness and cost effectiveness to the developed subsystems, the integration of multiple switches into the same platform is proposed. To this end, the implementation of the first integrated quadruple SOA-MZI switch array is reported, increasing the integration density level and reducing packaging and pigtailing costs. Finally, possible applications of integrated multiple switch arrays are discussed, indicating their suitability for producing compact circuits performing common processing tasks in a multi-wavelength environment, as well as their potential to lead to the development of an all-optical high-speed packet switched node by implementing critical packet switching functionalities in a compact and efficient way.     

All-optical packet-switched interconnection network based on modular photonic digital processing

Future interconnection networks will be required to achieve ultra-high bandwidth and low latency communications to cope with the increasing performance requirements of backbone routers, large data storage systems and supercomputing systems. Aiming at achieving ultra-high bandwidth communications and approaching optical time-of-flight processing latency while being robust to cascade impairments, the authors propose an all-optical packet-switched interconnection network, where not only the actual packet switching but also the packet processing is performed in the photonic domain. The authors present two modular architectures, based on the crossbar and the Batcher?Banyan topologies, capable of forwarding fixed-length packets with two classes of service. Both use photonic digital-processing subsystems built by combining a single integrable module which exploits cross gain modulation in a semiconductor optical amplifier. System level simulations on the crossbar switch controller guarantee that the control signals maintain an acceptable quality during the processing. Moreover, the Batcher? Banyan configuration is more cost-effective than the crossbar for increasing port count, while effective network performance in terms of packet loss rate can be obtained by adding just few recirculating delay lines.     

基于多字节流水线的POS信号IP包提取算法

针对当今骨干网传输速率较高,现有的硬件设备很难对POS信号直接进行面向字节的IP包提取的问题,本文提出了一种便于FPGA(Field Programmable Gate Array)实现的基于多字节流水线的IP包提取算法,实现了对骨干网POS信号的线速处理.理论分析和实际测试都表明,该方法适应了骨干网数据的高速、大容量的特点,能够满足当前以及今后高速光纤通信中数据提取的需要.     

Optical demultiplexer using a silicon concave diffraction grating

A demultiplexer composed of a concave diffraction grating and a multimode slab waveguide is attractive since it has many advantageous features. However, this type of demultiplexer has had high demultiplexing losses until now, because the concave diffraction gratings used had poor diffraction efficiency. A silicon concave diffraction grating has been developed to overcome this problem, manufactured by cylindrically bending a thin silicon plane diffraction grating. The diffraction efficiency of this grating was 82% at a blaze wavelength. The five-channel demultiplexer was assembled with this grating as well as with a multimode slab waveguide and a fiber array. Its branching loss was in the 1.4-1.8-dB range.     

Fabrication of a multichannel wavelength-division multiplexing-passive optical net demultiplexer with arrayed-waveguide gratings and diffractive optical elements

A novel, to our knowledge, integrated wavelength-division multiplexing-passive optical net demultiplexer that uses an arrayed-waveguide grating and diffractive optical elements is presented. The demultiplexer is used to distribute 1.3-mum wavelength signals and to multiplex an eight-channel wavelength-division multiplexer spectrum at a 1.55-mum wavelength. The device shows high functionality and good optical performance. The measured cross talk was less than -21 dB, and the 3-dB bandwidth was determined to be 97 GHz, which is close to the theoretical value of 93 GHz. Average losses of 4.5 and 8 dB were measured for the 1.3- and the 1.55-mum signals, respectively.     

Packet communications via satellite with buffer and multiple downlinks

Abstract

Previous results on packet communications via a processing satellite with n slotted ALOHA uplinks and m TDM downlinks are extended to include a buffer in the switching node. Throughput and delay at equilibrium are obtained, and an alternative derivation for the expected number of retrials for any packet is also given. It is demonstrated through examples that on‐board storage provides results equivalent to multiple uplinks in obtaining gains in throughput, efficiency, and margin against instability. The analysis of system performance with respect to the number of uplinks, the number of downlinks, and the size of the on‐board storage is now complete.     

QoS Model of a Router with Feedback Control

The Internet has evolved into a shared, integrated platform of a broad range of applications with different Quality‐of‐Service (QoS) requirements. Routers are an important part of the Internet and play a critical role in assuring QoS. A router is usually placed between two networks to receive data packets from one network and then transmit those data packets to another network if necessary. Data packets are the actual units of data traveling on computer networks. A data packet has two parts: header and data. The data carries messages, such as e‐mail text, from computer applications. The header carries information that is required to control and manage the transmission of the data packet on computer networks. Existing approaches for providing QoS involve prediction or estimation for traffic characterization to determine parameters required of static traffic admission control. However, prediction or estimation inaccuracy in traffic characterization can result in inappropriate parameter settings for static admission control and, in turn, compromise QoS or resource utilization. This study presents a QoS model of a router with feedback control that monitors the state of resource usage and adaptively adjusts parameters of traffic admission control to overcome prediction or estimation inaccuracy and achieve a balance between QoS and resource utilization. The QoS model of a router with feedback control is simulated to test its performance on QoS and resource utilization in both heavy and light traffic conditions. The performance of the QoS model of a router with feedback control is also compared with that of two basic QoS models of a router with static admission control using admission control parameters resulting from over‐ and under‐characterization of traffic, respectively. The simulation results show that the QoS model of a router with feedback control achieves a better balance between QoS and resource utilization than the basic QoS models with over‐ and under‐characterizations of traffic in the heavy traffic condition. This study also shows that the three models of routers demonstrate similar QoS performances and resource utilization in the light traffic condition. Copyright © 2005 John Wiley & Sons, Ltd.     

Performance evaluation of bufferless optical packet switches supporting quality of service

The author evaluates the performance of bufferless optical packet switches equipped with shared tuneable optical wavelength converters (TOWC) and supporting the quality of service (QoS). The TOWCs are shared per output fibre and, hence each output fibre has a dedicated pool of TOWCs. The TOWCs are not completely shared within the node. The QoS, expressed in terms of the packet loss probability, is differentiated by giving the packets different priorities in accessing both the output wavelengths and the TOWCs. A scheduling algorithm is proposed and its complexity is evaluated. The QoS technique?s effectiveness is studied by means of an analytical model based on a probabilistic approach and validated by simulation results. The results show that the proposed technique to support the QoS facilitates a good differentiation of the QoS offered to packets.