System-level reliability assessment of mixed-signal convergent microsystems

The next-generation convergent microsystems, based on system-on-package (SOP) technology, require up-front system-level design-for-reliability approaches and appropriate reliability assessment methodologies to guarantee the reliability of digital, optical, and radio frequency (RF) functions, as well as their interfaces. Systems approach to reliability requires the development of: i) physics-based reliability models for various failure mechanisms associated with digital, optical, and RF Functions, and their interfaces in the system; ii) design optimization models for the selection of suitable materials and processing conditions for reliability, as well as functionality; and iii) system-level reliability models understanding the component and functional interaction. This paper presents the reliability assessment of digital, optical, and RF functions in SOP-based microsystems. Upfront physics-based design-for-reliability models for various functional failure mechanisms are presented to evaluate various design options and material selection even before the prototypes are made. Advanced modeling methodologies and algorithms to accommodate material length scale effects due to enhanced system integration and miniaturization are presented. System-level mixed-signal reliability is discussed thorough system-level reliability metrics relating component-level failure mechanisms to system-level signal integrity, as well as statistical aspects.     

System ESD robustness by co-design of on-chip and on-board protection measures

System-level ESD robustness is a crucial feature for any electronic system. However, a consistent design methodology including IC-level protection, on-board protection and physical design of the module is still missing. The idea of a simple correlation between IC-level and system-level ESD robustness levels is misleading. A thorough characterization of the high current behaviour of IO circuit and on-board protection elements provides the necessary data for a simulation based co-design of on-chip and on-board protection measures. The constraints for characterization and modelling are discussed and the various protection measures for improved system-level ESD robustness are presented. Applying this methodology allows the development of a cost optimized system-level ESD protection throughout the stages of a system design.     

微机电系统实验建模研究

获得精确的微机电系统模型是实现系统高精度控制的前提条件，但微系统某些固有特性给系统理论建模带来一定困难。本文以微加速度传感器为例，提出一种理论分析和实验相结合的建模方法，并给出了相应的实验电路。     

A Geometric-Statistic Channel Model for THz Indoor Communications

The eventual practical deployment of a terahertz (THz) wireless communication system requires a proper channel model. By considering the unique characteristics of THz propagation, this paper proposes a geometric-statistic channel model for system-level simulation. This work also provides an evaluation methodology for investigating the system performance. Numerical results reveal that the proposed channel model is not only suitable to describe the physical characteristics of the THz channel, but also to investigate system-level performance.     

A physical large-signal model for GaN HEMTS including self-heating and trap-related dispersion

We show results of a self-consistent large-signal electro-thermal GaN HEMT model that includes trap-related and self-heating dispersion effects. Both self-heating and trap dynamics are treated with a strictly physical approach that makes it easier to link the model parameter with the physical HEMT structure and material characteristics. The model, implemented in ADS, is applied to measured DC data taken at ambient temperatures between 200 K and 400 K, with excellent results. Several examples are given of dynamic HEMT simulation, showing the co-existence and the interaction of temperature- and trap-related dispersive effects.     

An Application Specific Design Methodology for Microsystems

A fundamental approach to a coherent design strategy for microsystems is presented in this paper. Establishing such a concept can provide undeniable advantages concerning manpower, technical resources and development time. Prevalent design steps are discussed in detail, referring to the suggested ideas. Several microsystem applications and software tools are taken into account to illustrate the main aspects of a consistent design flow.The approach of behavioral physical modelling in combination with model based design optimization applying efficient and robust numeric methods in both fields allows pre-production optimization. Thus, overall development and redevelopment effort can be reduced significantly.     

Thermoelectrical modelling and simulation of devices based on VO2

Limits of development of conventional silicon-based integrated circuits get closer. More and more effort is done to develop new devices for integrated circuits. A promising structure is based on the semiconductor-to-metal phase change of vanadium-dioxide at about 67 °C. In these circuits the information is carried by combined thermal and electrical currents. For device modelling and circuit design, accurate distributed electro-thermal transient simulation is mandatory. This paper is the first one to present an electro-thermal transient simulation method for VO₂ devices operating in real-world conditions. The paper presents three VO₂ material models, the algorithmic extension of an electro-thermal field simulator to be able to handle hysteresis and the transient simulation issues of VO₂ and the modelling of VO₂ based devices. The paper compares measured and simulated device characteristics.     

3D electro-thermal investigations for reliability of ultra low ON state resistance power MOSFET

This paper presents a methodology and tool based on 3D electro-thermal finite elements modeling intended to analyze the sequence of the events after emergence of defects in automotive power MOSFETs. Finite element modeling of power device and its nearby environment is detailed. The effects of delamination and bonding wire lift off on device transient electro-thermal behavior are investigated during a short circuit mode. Thus it helps to quantify the electro-thermal impact of the damages. Such modeling is useful for optimization of structure design to guarantee a longer lifespan.     

A smart capacitive angle sensor

This paper presents a smart capacitive angle sensor suited for automotive and industrial use. To comply with tough constraints of such applications in terms of environmental conditions, unit costs, and physical size, a fully integrated solution is mandatory. However, the limitations and capabilities of a single mixed-signal integrated circuit have considerable impact not only on the hardware architecture of the digital and analog system components, but also on the feasible measurement algorithm. A thorough investigation of all major nonlinear effects leads to an accurate system-level model of the sensor which is used to design a robust and reliable fully integrated sensor system capable of handling signal offset and amplitude variations. In addition, the proposed system recognizes and reacts on electromagnetic disturbances. Measurements taken from a final prototype comply with the simulation results.     

Modelling of thermal failure of metallic interconnects under electrostatic discharge transients

Temperature dependence of metal electrical resistivity is taken into account in modelling of thermal failure of metallic interconnects under electrostatic discharge (ESD) events. SPICE-based electro-thermal modelling is used to calculate the maximum temperature rise in the interconnect during stress. New ESD design guidelines for interconnects, based on the threshold temperature of latent failure, are proposed to optimise the interconnect width.     

Guest Editorial Body Sensor Networks: From Theory to Emerging Applications

The use of sensor networks for healthcare, well-being, and working in extreme environments has long roots in the engineering sector in medicine and biology community. With the maturity of wireless sensor networks, body area networks (BANs), and wireless BANs (WBANs), recent efforts in promoting the concept of body sensor networks (BSNs) aim to move beyond sensor connectivity to adopt a system-level approach to address issues related to biosensor design, interfacing, and embodiment, as well as ultralow-power processing/communication, power scavenging, autonomic sensing, data mining, inferencing, and integrated wireless sensor microsystems. As a result, the system architecture based on WBAN and BSN is becoming a widely accepted method of organization for ambulatory and ubiquitous monitoring systems. This editorial paper presents a snapshot of the current research and emerging applications and addresses some of the challenges and implementation issues.      

一种基于非均匀电导率的电热耦合数值算法

由于集成电路及其封装工艺的不断发展,其功率传输网络中的功率密度和电流密度日益增加,因此需要在集成电路的设计中考虑焦耳热效应和材料电导率性质相互耦合的影响.文中实现了基于有限元算法的电热耦合数值方法,并计算了集成电路的功率传输网络中考虑电和热相互作用时功率传输中产生的压降.但是在电热耦合计算中出现了由于某些边界条件设置而导致的电导率及其他物理参数分布不均匀情况,为了解决此问题,提出了非均匀参数的思想和向量化参数更新方法,在充分考虑非均匀的物理量之间的迭代耦合关系情况下,计算得到了功率传输中的非均匀温度分布和电势分布.同时,通过与其他两款商业软件对比,文中算法程序体现出了更高的时间效率,为集成电路的设计提供了基本的参考.     

Real-time application to multiprocessor-system-on-chip mapping strategy for system-level design tool

A new static mapping technique is presented that can be integrated in a system-level design tool for modelling and simulating real-time applications onto an embedded multiprocessor system. The results of preliminary experiments indicate that the proposed two-phase mapping approach can achieve a good trade-off between the efficiency in resource usage and processor load balancing, as well as the minimisation of the inter-processor communication cost.     

Comprehensive physical analysis of bond wire interfaces in power modules

Power modules based on insulated gate bipolar transistors have become very widely used units in energy technology. Handling large currents and high voltages at high switching frequencies leads to degradation of materials in the devices, especially at interfaces and interconnections, eventually causing failures. In this paper we present a review on the set of our experimental and theoretical studies allowing comprehensive physical analysis of changes in materials under active power cycling with focus on bond wire interfaces and thin metallisation layers. The developed electro-thermal and thermo-mechanical models that can be applied to mimic the device under particular operation conditions and to evaluate stress factors related to heat dissipation are briefly presented. The results of modelling, which predict materials degradation, are compared with a few exemplary cases obtained using the micro-sectioning combined with optical microscopy and scanning electron microscopy assisted by focused ion beam milling. These experimental results show very good agreement with wear out effects predicted by simulations. Additionally, measurements of resistance using four-point probe method are demonstrated to be a very powerful tool to map the degradation of individual components and interfaces.     

Quasi-3D simulation approach for comparative evaluation of triggering ESD protection structures

A 2D simulation approach that takes into account the 3D effects of electro-thermal instability during electrostatic discharge (ESD) operation, is presented. The method is used to provide physical evaluation of a safe operation regime for BiCMOS ESD protection structures and circuits. The methodology is demonstrated through the application to Si–Ge NPN bipolar transistors, snapback NMOS and LVTSCR structures.     

Grounded-gate nMOS transistor behavior under CDM ESD stressconditions

This paper contains a systematic study into the effects of design and process variations on the behavior of the grounded-gate nMOS transistor under CDM ESD stress conditions. The correlation of both electrical behavior and physical failure is evaluated for socketed CDM, nonsocketed CDM, and HBM ESD stress models. It is shown that a new compact transistor model, concerning its application for the simulation of CDM behavior, is employed in electro-thermal simulation to explain the experimental results     

Electro-thermal simulation including a temperature distribution inside power semiconductor devices

The idea of including non-uniform temperature distribution into power semiconductor device models is not new, as accurate electro-thermal simulations are required for designing compact power electronic systems (as integrated circuits or multi-chip modules). Electro-thermal simulations of a PIN-diode based on the finite-element method, show a non-uniform temperature distribution inside the device during switching transients. Hence the implicit assumption of a uniform temperature distribution when coupling an analytical electrical model and a thermal model yields inaccurate electro-thermal behaviour of the PIN-diode so far. If literature reports procedures regarding complex thermal network modelling, few papers address the problem of mixing adequately electrical and thermal issues. Instead of using a one-dimensional finite difference or element method, the bond graphs and the hydrodynamic method are used to build a 1D electro-thermal model of the PIN-diode. The paper focuses on electrical issues and the proper expression and localization of power losses to feed the thermal network model. The results by this original technique are compared with those given by a commercial finite-element simulator. The results are similar but the computation effort attached to the proposed technique is a fraction of that required by finite-element simulators. Moreover the proposed technique may be applied easily to other power semiconductor devices.     

Failure-relevant abnormal events in power inverters considering measured IGBT module temperature inhomogeneities

In this work, temperature inhomogeneities inside IGBT modules are measured to assess their relevance for the component reliability. Such issue has not been considered in many previous studies, since it is often assumed that the electro-thermal characteristics of IGBTs compensate for such temperature differences. Starting from real temperature measurements, this work discusses such aspect aided by electro-thermal simulations. This method provides useful information for the reliable thermal design of power modules, also considering the actual cooling system.     

Optical network testbed-key enabler in developing current and future network solutions

The all-optical network (AON) demonstrator is a trial system-level testbed for the validation and verification of key network building blocks, scalable architectures, as well as control and management solutions for next-generation wavelength division multiplexing (WDM) networks. Developed at the Communications Research Centre (CRC) in Ottawa, ON, Canada, the AON testbed has already validated certain system-level concepts at the physical and upper layers. The paper describes the crucial role of the AON testbed in research, development, and "proof of concept" for both emerging optical technologies at the physical layer (performance characterization) and customer-managed networks at the upper layer (network management). Moreover, it is expected that the AON testbed will continue to be a valuable playground for future developments of emerging technologies, solutions, and applications.