Failure analysis and stress simulation in small multichip BGAs

This paper examines one of the common modes of structural failure in multichip ball grid arrays (BGAs), determines its locations within the package structure, relates it to the stresses generated in the reliability tests under which it occurs, and by finite element simulations, determines an explanation for the failure, and finally proposes a method to avoid this failure mechanism. Several designs of multichip BGA substrates were manufactured and production silicon assembled into them. These were all 14 mm×22 mm 119 ball PBGAs. These were subjected to a set of package reliability tests, until some units failed electrical test. The failed units were analyzed and the physical location and shape of the failure was determined in many cases. From this information, the mechanical mode of failure for each unit was determined. In addition there was sufficient information in some of the analyses to provide definite suggestions as to the mechanism of failure. Meanwhile, finite element analysis was performed using simplified representations of the multichip BGAs, in order to find the locations of highest stress, and the expected modes of failure. This data was matched to the failure modes found in the physical analysis. Some novel failure analysis techniques were used to expose the damage in the failed units. A particular failure mode occurred frequently in temperature cycle, and the sites of failure were located by failure analysis. The failure was due to open circuit in the copper tracks in the top layer of the substrate caused by cracking in the solder resist directly underneath the edge of the die attach fillet. Finite element analysis was carried out and the location of the actual failures was found to be a local zone of high tensile stress in the solder resist     

Board level solder joint reliability analysis of stacked die mixed flip-chip and wirebond BGA

Stacked die BGA has recently gained popularity in telecommunication applications. However, its board level solder joint reliability during the thermal cycling test is not as well-studied as common single die BGA. In this paper, solder joint fatigue of lead-free stacked die BGA with mixed flip-chip (FC) and wirebond (WB) interconnect is analyzed in detail. 3D fatigue model is established for stacked die BGA with considerations of detailed pad design, realistic shape of solder ball, and non-linear material properties. The fatigue model applied is based on a modified Darveaux’s approach with non-linear viscoplastic analysis of solder joints. Based on the FC–WB stack die configuration, the critical solder ball is observed located between the top and bottom dice corner, and failure interface is along the top solder/pad interface. The modeling predicted fatigue life is first correlated to the thermal cycling test results using modified correlation constants, curve-fitted from in-house lead-free TFBGA46 (thin-profile fine-pitch BGA) thermal cycling test data. Subsequently, design analyzes are performed to study the effects of 20 key design variations in package dimensions, material properties, and thermal cycling test conditions. In general, thinner PCB and mold compound, thicker substrate, larger top or bottom dice sizes, thicker top die, higher solder ball standoff, larger solder mask opening, smaller PCB pad size, smaller thermal cycling temperature range, longer ramp time, and shorter dwell time contribute to longer fatigue life. SnAgCu is a common lead-free solder, and it has much better board level reliability performance than eutectic solder based on modeling results, especially low stress packages.     

Ball-grid-array solder joint model for assembly-level impact reliability prediction

It has been well established that lead-free solder underperforms conventional leaded solder in reliability under dynamic impact. Common failures observed on ball-grid-array (BGA) solder balls on chip under board level impact include bulk solder ductile failure, intermetallic (IMC) layer crack and pad-lift. In this work, a finite element modeling approach was proposed to model bulk solder ductile failure and intermetallic layer crack. The use of beam elements and connector elements to represent the bulk solders and board/component side intermetallic layers, respectively, offers the advantage of simplicity over the use of continuum elements and cohesive elements for solder joints. This approach enables the modeling of assembly level impact with significantly less computational resources. The model was verified by comparing its prediction of BGA solder reliability against actual test results in a dynamic four-point bend test. The physical tests consist of ball impact at varying heights on a board with a mounted chip, and the subsequent analysis of the failure modes of the BGA solder joints. Simulation results were in good agreement with test results. The study shows that it is feasible to model BGA solder joint ductile failure and intermetallic layer crack under impact with simple elements with reasonable accuracy.     

Impact of laminate cracks under solder pads on the fatigue lives of ball grid array solder joints

This paper reports how the solder joint fatigue lives of three types of lead free plastic BGA components were affected by cracks formed in the printed PCB laminate during a thermal cycling test. The investigation showed that cracks were formed in the laminate for all three tested components. For one of the components having a large chip with solder joints located under the chip, very large cracks were formed in the PCB laminate beneath some solder pads.For lead-free solder joints to BGA components consisting of near eutectic solders based on tin, silver and copper, a large fraction of the solder joints may consist of one single tin grain. Due to anisotropy of tin grains, each solder joint to a BGA component will experience a unique stress condition which will make laminate cracking more likely under certain solder joints.The laminate cracks increased the flexibility of the joints and thereby improved the fatigue lives of the solder joints. Therefore, an estimation of the fatigue lives of solder joints to BGA components based on the results from a thermal cycling test may lead to an overestimation of the fatigue lives if products will be exposed to smaller temperature changes in the field than in the test.If cracks are not formed in the PCB laminate, or if the extent of cracking is small, single-grained solder joints can be expected to result in a high spread in failure distribution with some quite early failures.     

Effect of (Au, Ni)Sn 4 Evolution on Sn-37Pb/ENIG Solder Joint Reliability Under Isothermal and Temperature-Cycled Conditions

The ternary intermetallic compound Au_0.5Ni_0.5Sn₄ forms at the Sn-37Pb/ENIG solder interface during aging and temperature cycling, leading to increased interfacial cracking and a corresponding decrease in solder joint reliability for 15 mm ball grid array (BGA) structures. (Au,Ni)Sn ₄ forms at both the board finish (bottom) and component side (top) of the solder joint for isothermally aged, temperature-cycled, and (aged + cycled) joints. For control specimens (reflow only), no cracks or interfacial Au are observed. For isothermally aged joints (170 and 340 h at 125degC), a broken, discontinuous layer of (Au,Ni)Sn₄ is present, but no cracking. For temperature-cycled joints, lowered reliability and interfacial cracking occurs along a continuous (Au,Ni)Sn₄ intermetallic layer on the solder side of the interface after ~450 h of cycling. Aging + cycling did little to inhibit cracking or formation of (Au,Ni)Sn₄. Development of a continuous (Au,Ni)Sn₄ film at the interface is the key failure mechanism. At low cycle numbers where high joint reliability is observed, the (Au,Ni)Sn₄ layer is discontinuous and not fully developed. At higher cycle numbers and longer aging times, the (Au,Ni)Sn ₄ layer becomes continuous and encourages crack growth along the intermetallic interface and consequent lower reliability. The correlation of interfacial smoothness with lowered reliability is consistent with recent work showing that, when intermetallic compounds form smoothly at the solder interface, the mechanical properties are degraded (compared to a rough intermetallic) due to the decreased resistance to shear along the interface     

Board level solder joint reliability analysis and optimization of pyramidal stacked die BGA packages

Due to requirements of cost-saving and miniaturization, stacked die BGA has recently gained popularity in many applications. However, its board level solder joint reliability during the thermal cycling test is not as well-studied as common single die BGA. In this paper, solder joint fatigue of wirebond stacked die BGA is analyzed in detail. 3D fatigue model is established for stacked die BGA with considerations of detailed pad design, realistic shape of solder ball, and non-linear material properties. The fatigue model applied is based on a modified Darveaux's approach with non-linear viscoplastic analysis of solder joints. The critical solder ball is observed located between the top and bottom dice corner, and failure interface is along the top solder/pad interface. The modeling predicted fatigue life is first correlated to the thermal cycling test results using modified correlation constants, curve-fitted from in-house TFBGA (thin-profile fine-pitch BGA) thermal cycling test data. Subsequently, design analyses are performed to study the effects of 16 key design variations in package dimensions, material properties, and thermal cycling test conditions. In general, smaller top and bottom dice sizes, thicker top or bottom die, thinner PCB, thicker substrate, higher solder ball standoff, larger solder mask opening size, smaller maximum ball diameter, smaller PCB pad size, smaller thermal cycling temperature range, longer ramp time, and shorter dwell time contribute to longer fatigue life. The effect of number of layers of stacked-die is also investigated. Finally, design optimization is performed based on selected critical design variables.     

Reliability study of package-on-package stacking assembly under vibration loading

The vibration reliability of lead-free solder joints of Package-on-Package (PoP) is investigated by experimental tests and finite element method (FEM) simulations in this paper. A 14 × 14 mm two-tier PoP module was selected for this study. The natural frequencies and modes were determined by FEM and verified by experimental tests. The printed circuit board (PCB) assemblies are tested under harmonic vibration. Vibration test results show that the vibration reliability of top package is better than the bottom package, and the outermost corner solder joints of the bottom package are the critical solder joints for the PoP under vibration loading. The stress characteristics of solder joints obtained by FEM are well correlated with the experimental results. Failure mechanism analysis indicates that the bottom solder joints become the most vulnerable part of the PoP under vibration due to the bigger relative displacements between the PCB and the bottom package. The micro-structural analysis indicates that cracks usually originate in the bottleneck position of the solder balls, extend within bulk solder and then propagate along the interface between the IMC layer and the bulk solder. The influence of bottom solder joints standoff for vibration reliability was analyzed by FEM as well. Results show that the higher the bottom solder joints' standoff, the more difficult the failure for the PoP assembly.     

A Novel Design Structure for WLCSP With High Reliability, Low Cost, and Ease of Fabrication

Wafer level chip scale packaging (WLCSP) has some advantages, such as real die size packaging, high electrical performance, and low manufacturing cost. However, because the mechanical reliability of a large die can not be guaranteed due to the coefficient of thermal expansion (CTE) mismatch between silicon and organic printed circuit board (PCB), WLCSP technology is still not fully accepted. We have developed a new solder joint protection-WLCSP (SJP-WLCSP) structure with a delamination layer interposed between the top layer of the chip and the bottom insulating layer of the metal redistribution traces. The stress on the solder joints can be released by the cracks forming in the delamination layer, which protects the solder joints from cracking. Since the cracking of the delamination layer is irrelevant to the electrical circuits of the packaging, the packaged integrated circuits (IC) device remains functional. One of the possibilities for processing the SJP-WLCSP was implemented and validated successfully in the SiLK-wafer samples. The board level packaging samples, using the daisy chain resistance measurement passed 1000 cycles of the temperature cycling testing.     

Reliability Investigation of Mixed BGA Assemblies

The effect of different reflow profiles on the reliability of lead-free (LF) Sn-3.0 Ag-0.5 Cu (wt.%) (SAC 305) ball grid array (BGA) devices assembled with a SnPb eutectic paste was investigated. The memory modules in a back-to-back configuration were reflowed on standard graphic cards finished with immersion silver (IAg) or hot air solder leveling (HASL) coatings. The reflow peak temperatures ranged from 209$^circ$C to 227$^circ$C, while the time above liquidus (TAL) varied from 45 to 80 s. Depending on the reflow conditions, the solder interconnects displayed varied degrees of SnPb and LF solders intermixing. It was established that in order to receive a homogeneous solder alloy, the reflow peak temperature had to be in the 218$^circ$C–222$^circ$C range. The reliability of solder interconnects of memory modules was assessed by subjecting the cards to 1500 cycles of accelerated thermal-cycling with a profile from 0$^circ$C to 100$^circ$C. It was found that the control SnPb/SnPb assemblies displayed superior reliability to that of the mixed assemblies. Regardless of the degree of homogeneity of the BGA balls, the predominant failure mode of the mixed solder joints was interfacial cracking through a Pb-rich phase near the intermetallic layer. In contrast, only partial cracks propagating diagonally through the bulk solder were present on the control boards. It was concluded that a combination of state of stress and segregation of the Pb-rich phase at the interface was responsible for the shortened thermal–mechanical fatigue life of the mixed solder interconnects.     

双面贴装电路板上BGA焊点的潜在失效机理

采用双面贴装回流焊工艺在FR4基板表面贴装Sn3.0Ag0.5Cu(SnAgCn)无铅焊点BGA器件,通过对热应力加速实验中失效的SnAgCu无铅BGA焊点的显微结构分析和力学性能检测,研究双面贴装BGA器件的电路板出现互连焊点单面失效问题的原因,单面互连焊点失效主要是由于回流焊热处理工艺引起的.多次热处理过程中,NiSnP层中形成的大量空洞是导致焊点沿(Cu,Ni)6Sn5金属间化合物层和Ni(P)镀层产生断裂失效的主要因素.改变回流焊工艺是抑制双面贴装BGA器件的印制电路板出现互连焊点单面失效问题的关键.     

Experimental and numerical analysis of BGA lead-free solder joint reliability under board-level drop impact

Board-level solder joint reliability is very critical for handheld electronic products during drop impact. In this study, board-level drop test and finite element method (FEM) are adopted to investigate failure modes and failure mechanisms of lead-free solder joint under drop impact. In order to make all ball grid array (BGA) packages on the same test board subject to the uniform stress and strain level during drop impact, a test board in round shape is designed to conduct drop tests. During these drop tests, the round printed circuit board assembly (PCBA) is suffered from a specified half-sine acceleration pulse. The dynamic responses of the PCBA under drop impact loading are measured by strain gauges and accelerometers. Locations of the failed solder joints and failure modes are examined by the dye penetration test and cross section test. While in simulation, FEM in ABAQUS software is used to study transient dynamic responses. The peeling stress which is considered as the dominant factor affecting the solder joint reliability is used to identify location of the failed solder joints. Simulation results show very good correlation with experiment measurement in terms of acceleration response and strain histories in actual drop test. Solder joint failure mechanisms are analyzed based on observation of cross section of packages and dye and pry as well. Crack occurred at intermetallic composite (IMC) interface on the package side with some brittle features. The position of maximum peeling stress in finite element analysis (FEA) coincides with the crack position in the cross section of a failed package, which validated our FEA. The analysis approach combining experiment with simulation is helpful to understand and improve solder joint reliability.     

Structural reliability assessment of multi-stack package (MSP) under high temperature storage (HTS) testing condition

Wire ball open failure at the interface of the gold wire and bonding pad of a multi-stack package (MSP) under high temperature storage (HTS) condition of 150 °C is studied. Failure analysis using FIB-SEM was conducted by in-plane moiré interferometry and FEA to clarify the failure mechanism. The ball open failure due to Kirkendall void that results from metal diffusion at high temperature was accelerated by the tensile stress imposed at the gold wire. The tensile stress developed at the gold wire when packages showing different warpage behaviours were stacked. Mechanical interaction between top and bottom packages caused unstable warpage, readily twisted and saddled. The wire came in contact with the photo-sensitive solder resist (PSR) dam because of the unstable warpage and this contact resulted in tensile stress at the gold wires. Solder flux residues reacted with the encapsulant, and as a result, the encapsulant of the top package adhered to the chip of the bottom package, and this adherence created additional tensile stress at the gold wires. To reduce the tensile stress at the wires, the PSR dam was removed, loop shape was altered from 45° to 90°, water soluble flux was applied, and cleaning process was added. HTS reliability was significantly improved and guaranteed after reducing the tensile stress at the wires.     

银含量对随机振动条件下无铅焊点可靠性的影响

为了探究银含量对无铅焊点在随机振动条件下的可靠性的影响,对Sn-3.0Ag-0.5Cu、Sn-1.0Ag-0.5Cu和Sn-0.3Ag-0.7Cu三种不同Ag含量材料的焊点做窄带范围内的随机振动疲劳实验,并对失效焊点进行分析。结果表明:三种材料焊点的失效位置基本都在靠近PCB侧,最外围焊点最容易失效,失效模式均为脆性断裂,并且随着Ag含量的降低,金属间化合物的厚度逐渐减小,焊点的疲劳寿命逐渐延长。     

Thermomechanical reliability of underfilled BGA packages

The effect of underfill on various thermomechanical reliability issues in super ball grid array (SBGA) packages is studied in this paper. Nonlinear finite element models with underfill and no underfill are developed taking into consideration the process-induced residual stresses. In this study, the solder is modeled as time and temperature-dependent, while other materials are modeled temperature and direction-dependent, as appropriate. The stress/strain variations in the package due to thermal cycling are analyzed. The effect of underfill is studied with respect to magnitude and location of time-independent plastic strain, time-dependent creep strain and total inelastic strain in solder balls. The effect of copper core on the solder ball strains is presented. The possibility of delamination at the interposer-underfill interface as well as substrate-underfill interface is studied with the help of qualitative interfacial stress analysis. Results on SBGA packages indicate that the underfill does not always enhance BGA reliability, and that the properties of the underfill have a significant role in the overall reliability of the BGA packages. The predicted number of thermal cycles to solder joint fatigue are compared with the existing experimental data on similar nonunderfilled BGA packages.     

Comparison of Extensive Thermal Cycling Effects on Microstructure Development in Micro-alloyed Sn-Ag-Cu Solder Joints

Pb-free solder alloys based on the Sn-Ag-Cu (SAC) ternary eutectic have promise for widespread adoption across assembly conditions and operating environments, but enhanced microstructural control is needed. Micro-alloying with elements such as Zn was demonstrated for promoting a preferred solidification path and joint microstructure earlier in simple (Cu/Cu) solder joints studies for different cooling rates. This beneficial behavior now has been verified in reworked ball grid array (BGA) joints, using dissimilar SAC305 (Sn-3.0Ag-0.5Cu, wt.%) solder paste. After industrial assembly, BGA components joined with Sn-3.5Ag-0.74Cu-0.21Zn solder were tested in thermal cycling (−55°C/+125°C) along with baseline SAC305 BGA joints beyond 3000 cycles with continuous failure monitoring. Weibull analysis of the results demonstrated that BGA components joined with SAC + Zn/SAC305 have less joint integrity than SAC305 joints, but their lifetime is sufficient for severe applications in consumer, defense, and avionics electronic product field environments. Failure analysis of the BGA joints revealed that cracking did not deviate from the typical top area (BGA component side) of each joint, in spite of different Ag₃Sn blade content. Thus, SAC + Zn solder has not shown any advantage over SAC305 solder in these thermal cycling trials, but other characteristics of SAC + Zn solder may make it more attractive for use across the full range of harsh conditions of avionics or defense applications.     

BGA焊点纳米压痕实验有限元模拟分析

采用有限元方法模拟了BGA焊点的纳米压痕实验的加、卸载过程,并根据得出的应力应变分布云图,通过分析从各关键部位提取的应力应变随时间变化的关系,对焊点发生失效的位置及蠕变特征进行了讨论。首先建立BGA单个焊点的模型,设定其几何参数、边界条件、材料特性与加载方式,然后利用有限元分析工具MARC进行计算与标准试样实验结果相比较,通过反复修正应力-应变关系曲线,直至分析所得载荷-位移曲线与试验曲线很好地吻合,证实了模拟的可靠性,研究结果对焊点的可靠性评估有一定的指导意义。     

Reliability of lead-free interconnections under consecutive thermal and mechanical loadings

To simulate more realistically the effects of strains and stresses on the reliability of portable electronic products, lead-free test assemblies were thermally cycled (−45°C/+125°C, 15-min. dwell time, 750 cycles) or isothermally annealed (125°C, 500 h) before the standard drop test. The average number of drops to failure increased when the thermal cycling was performed before the drop test (1,500 G deceleration, 0.5 ms half-sine pulse). However, the difference was not statistically significant due to the large dispersion in the number of drops to failure of the assemblies drop tested after the thermal cycling. On the other hand, the average number of drops to failure decreased significantly when the isothermal annealing was carried out before the drop test. The failure analysis revealed four different failure modes: (1) cracking of the reaction layers on either side of the interconnections, (2) cracking of the bulk solder, (3) mixed mode of component-side intermetallic and bulk solder cracking, and (4) voidassisted cracking of the component-side Cu₃Sn layer. The assemblies that were not thermally cycled or annealed exhibited only type (1) failure mode. The interconnections that were thermally cycled before the drop test failed by mode (2) or mode (3). The drop test reliability of the thermally cycled interconnections was found to depend on the extent of recrystallization generated during the thermal cycling. This also explains the observed wide dispersion in the number of drops to failure. On the other hand, the test boards that were isothermally annealed before the drop testing failed by mode (4).     

弯曲应力状况下微型BGA封装可靠性比较研究

微型球栅阵列（μBGA）是芯片规模封装（CSP）的一种形式,已发展成为最先进的表面贴装器件之一。在最新的IxBGA类型中使用低共晶锡．铅焊料球,而不是电镀镍金凸点。采用传统的表面贴装技术进行焊接,研讨μBGA的PCB装配及可靠性。弯曲循环试验（1000～1000με）,用不同的热因数（Qη）回流,研究μBGA、PBGA和CBGA封装的焊点疲劳失效问题。确定液相线上时间,测定温度,μBGA封装的疲劳寿命首先增大,接着随加热因数的增加而下降。当Q。接近500S·℃时,出现寿命最大值。最佳Qη范围在300-750s·℃之间,此范围如果装配是在氮气氛中回流,μBGA封装的寿命大于4500个循环。采用扫描电子显微镜（SEM）,来检查μBGA和PBGA封装在所有加热N数状况下焊点的失效。每个断裂接近并平行于PCB焊盘,在μBGA封装中裂纹总是出现在焊接点与PCB焊盘连接的尖角点,接着在Ni3Sn4金属间化合物（IMC）层和焊料之间延伸。CBGA封装可靠性试验中,失效为剥离现象,发生于陶瓷基体和金属化焊盘之间的界面处。     

冷热冲击下BGA焊接失效的分析研究

采用冷热冲击的方法,以温度改变率为90℃/min,温度循环范围为–65~+125℃,高低温段停留时间为15 min的条件对无铅焊接的BGA焊接位置进行可靠性测试,用金相显微镜,SEM和EDS进行表征分析。结果表明,冷热冲击下BGA的失效点多集中于焊料与焊盘间。SnAgCu焊料与焊盘以及形成的IMC之间的热膨胀系数(CTE)不匹配,还有IMC被氧化是导致在冷热冲击下BGA焊接位置失效的主要原因。