mMIMO毫米波高速通信系统强鲁棒性技术研究综述

mMIMO毫米波高速通信系统是未来人类社会构建更好通信体验的关键基础.受限于集成电路制造过程中存在的较大随机偏差和失配,弱鲁棒性问题成为制约高速通信系统规模化推广应用的主要瓶颈.本文深入挖掘影响mMIMO毫米波高速通信系统性能的关键因素,并对收发链路I/Q失配校准、数/模混合波束合成收发链路多通道幅相失配校准、发射阵列非线性失真补偿等算法进行归纳和总结,为未来构建沉浸化、智慧化、全域化的高速通信场景提供坚实技术支撑.     

一种应用于IEEE 802.11 b/g/n无线局域网收发机的CMOS模拟基带电路

本文提出了一种应用于直接变频无线局域网收发机的模拟基带电路,该电路采用标准的0.13微米CMOS工艺实现,包括了采用有源RC方式实现的接收4阶椭圆低通滤波器、发射3阶切比雪夫低通滤波器、包含直流失调消除伺服环路的接收可变增益放大器及片上输出缓冲器。芯片面积共1.26平方毫米。接收基带链路增益可在-11dB至49dB间以2dB步长调节。相应地,基带接收输入等效噪声电压（IRN）在50 nV/sqrt(Hz) 至30.2 nV/ sqrt(Hz)间变化而带内输入三阶交调（IIP3）在21dBm至-41dBm间变化。接收及发射低通滤波器的转折频率可在5MHz、10MHz及20MHz之间选择以符合包含802.11b/g/n的多种标准的要求。接收基带I、Q两路的增益可在-1.6dB至0.9dB之间以0.1dB的步长分别调节以实现发射IQ增益失调校正。通过采用基于相同积分器的椭圆滤波器综合技术及作用于电容阵列的全局补偿技术,接收滤波器的功耗显著降低。工作于1.2V电源电压时,整个芯片的基带接收及发射链路分别消耗26.8mA及8mA电流。     

针对时间交织采样的后台自适应频域校准技术

针对高速双通道时间交织采样(Time-interleaved Analog-to-Digital Converter, TIADC)系统通道失配的问题,提出了一种后台自适应频域校准技术。该技术采用数字混频+低通滤波技术,将失配镜像点搬移至零频,并形成I/Q复数信号;然后基于信号统计学进行校准系数计算,并利用该系数完成共轭对消校准;最后将校准后信号通过数字混频搬移回原始频率,完成整个校准过程。进一步提出了基于FPGA/ASIC的算法实现电路。经实物测试验证,在6 Gsample/s双通道TIADC系统中,该技术能够优化失配比达33.3 dBc以上,失配优化程度高,同时具有全流水实时后台处理特性,且不需要增加额外系统资源。     

TDD-MIMO系统中由I/Q不平衡引起的信道非互易性补偿方法

分析了I/Q不平衡引起的信道互易性丧失对系统容量的影响,提出了一种基于信道状态测量的补偿算法。该算法中基站(BS)和移动台(MS)各自对接收信道进行测量而得到上下行链路的信道状态信息(CSI),然后将2条链路的CSI汇集到BS处,BS计算出分别用于BS和MS的校准矩阵。仿真结果表明所提算法能够有效地对I/Q不平衡进行校准,使信道互易性得到保持,从而使系统容量的损失得以弥补。     

MB-OFDM超宽带系统中模拟前端非理想因素的估计与补偿

解决模拟前端非理想因素:载波频率偏差、采样频率偏差以及I/Q失配对多带-正交频分复用超宽带系统的影响.提出时域载波频偏和I/Q失配估计和补偿方案.该方案包括一种能有效对抗大范围I/Q失配的数据辅助载波频偏估计算法,一种时域I/Q失配估计算法和一种2步式载波频偏、I/Q失配补偿算法.在频域,利用超宽带数据帧头的时域扩展特性进行残余载波频偏和采样频偏估计.仿真结果表明,即使存在较大非理想因素的情况下,提出的估计与补偿方案仍然能提供较好的系统误码性能.     

手机维修，发射电路篇

手机发射电路的作用是将进入信道的数字已调信号(四路I/Q基带信号加载)通过天线发射到空中，从而完成无线通信。     

TDD射频收发机中本振泄漏片上数字补偿

提出了一种应用于TDD射频收发机的本振泄漏片上数字补偿技术。在发射机中数模转换器前级的数字模块中插入一个数字预补偿单元,结合数字模块中的直流测量电路和补偿参数检测控制电路,构建了对发射机的本振泄漏进行补偿的负反馈回路。上电初始化校准模式下,在数字域中对本振泄漏信号进行功率检测,采用逐次逼近算法精确提取了补偿参数。应用该数字补偿技术,采用IBM 0.13 μm RF CMOS工艺实现了一种直接变频结构TDD-LTE射频收发芯片。仿真和测试结果表明,该射频收发芯片的本振泄漏抑制达到61 dB。     

适用于宽带射频收发芯片的矢量校准技术

本文提出了一种利用己知训练序列数据进行辅助的适用于宽带射频收发芯片的矢量校准方案,采用事前校准,克服了传统校准技术计算难度大、电路结构复杂难以实现的困难.在接收机工作前,先输入一段正余弦信号为测试信号,计算出接收机I/Q失配的参数大小,将其存入寄存器中;当接收机工作时,再将输入信号与寄存器中的值进行计算,求出补偿后的I...     

正交调制器的校准设计

在当前许多复杂调制射频信号源中,随着数字基带信号越来越多的加入．需要正交凋制器将其调制到需要的载波信号上。正交调制器原理简单：将生成好的I/Q两路基带信号调制到两路正交的载波上,合路后输出。但是在实现时,想获得好的指标就需要考虑载波相位误差,I/Q基带信号幅度不平衡以及载波泄漏等问题。文章给出了一种正交调制器的校准方案,可以减少和模拟以上三种现象造成的调制误差,并给出自动校准和手动校准两种方法。     

世界上首只CMOS TD-SCDMA收发机

Complent Technology公司宣布已开始试验用于TD-SCDMA的采用先进CMOS工艺的RF IC收发机和模拟基带(ABB)芯片组,并声称这是世界上首部CMOS TD-SCDMA收发机。该公司3G收发机的设计清楚地表明,近年中国的设计厂家迅速熟悉了高端芯片的结构性能。上述芯片组包括一个单芯片收发机CL4     

一种无线宽带收发机载波泄漏校准和补偿技术

A carrier leakage calibration and compensation technique based on digital baseband for a wideband wireless communication transceiver is proposed. The digital baseband transmits a calibration signal, samples the signal which passes through the transmitter path and the calibration loop in the RF chip, measures the carrier leakage by analyzing the sampled data and compensates it. Compared with a self-calibration technique in the RF chip, the proposed technique saves area and power consumption for the wireless local area network （WLAN） solution. This technique has been successfully used for 802.1 In system and satisfies the requirement of the standard by achieving over 50 dB carrier leakage suppression.     

RF I/Q Downconverter With Gain/Phase Calibration

We propose an RF I/Q downconverter including a calibration procedure to compensate for gain and phase mismatch errors. The indirect compensation technique is based on the use of the local oscillator (LO) signal as reference for error measurements. A number of mismatch parameters are first estimated by an algorithm running in the digital signal processing processor following the analog-to-digital converter and then used to correct the downconverted I/Q signals digitally during normal operation. The downconverter has been designed in 0.13-mum CMOS technology. The analog part of the system for calibration adds a negligible area and power consumption with respect to the front-end building blocks. Test results exhibit an image-rejection ratio IRRges48.8 dB for I/Q phase errors up to 15deg and for LO I/Q amplitude and mixer gain mismatch errors up to 10%     

The application of complex quantized feedback in integrated wireless receivers

Integrated wireless receiver architectures, such as direct-conversion receivers, offer many advantages over the conventional heterodyne receivers including smaller size, lower cost, and reduced power consumption. However, the design of monolithic receivers, using direct-conversion, involves many challenges including dealing with low-frequency disturbances, namely, dc-offset and 1/f noise (especially in CMOS implementations), in-phase (I) and quadrature (Q) amplitude and phase mismatch, local oscillator (LO) leakage, and even-order distortions. A cost-effective method to minimize the low-frequency disturbances is to use ac-coupling in the baseband signal path. However, it results in baseline wander effects, especially in spectrally efficient modulation schemes such as quadrature amplitude modulation (QAM) where the baseband signal spectrum contains a significant amount of energy near dc. A system solution to mitigate the effects of low-frequency disturbance is presented in this paper. The quantized feedback (QFB) technique is used in conjunction with ac-coupling to minimize the baseline wander effects. A cross-coupled (CC) QFB extension to compensate for the receiver local oscillator phase error as well as the IQ mismatch is also described. Simulation results are presented to demonstrate the effectiveness of this complex QFB technique.     

On the RF/DSP design for efficiency of OFDM transmitters

In this paper, a system-level RF/digital signal processing (DSP) design approach of power-efficient orthogonal frequency-division multiplexing (OFDM) transmitters is proposed. A DSP-based low-IF architecture, which allows a significant enhancement of their power and spectrum efficiencies, is proposed. The cascade of the peak-to-average power ratio (PAPR) reduction technique, predistortion technique, and the in-phase and quadrature modulation led to impressive improvement in the power efficiency and effective linear output power of the OFDM transmitter. Measurement results carried out on an IEEE 802.11a transmitter designed and built for this experiment are presented in terms of error vector magnitude (EVM), adjacent channel leakage ratio, and power efficiency. The power stage of this transmitter uses a heterojunction bipolar InGaP transistor operating in a deeply class AB. The cascade of the PAPR reduction and baseband predistortion processing modules results in the reduction of the power backoff operation point by approximately 10 dB accompanied by a relative increase in the wireless local area network transmitter power efficiency by roughly 400% while meeting the emission mask spectrum and EVM levels demanded by the 802.11a standard.     

用LMS算法消除开关纹波对WiFi接收机的影响

针对开关电源应用于射频前端模拟电路时的纹波问题,文中提出在数字基带部分采用自适应滤波法消除纹波的方案。在Simulink环境下搭建基于IEEE802.11b无线通信协议的WiFi收发系统,并在数字基带部分使用LMS自适应滤波器来抑制纹波。系统仿真结果表明,自适应滤波器能明显改进信号质量,当纹波幅度低于150 mV时,接收信号能达到协议要求。在此基础上,对自适应滤波器进行了完整的前端及版图设计,并进行功耗分析,最终自适应滤波器在33 MHz时钟频率、1.98 V电源电压的工作条件下功耗仅为1.35 mW,证明了利用开关电源为WiFi接收机供电以节约功耗的可行性。     

Linearisation of RF PA by even-order nonlinear baseband signal processed in digital domain

This paper represents, for the first time, the linearisation method of RF power amplifiers, which is based on using the second- and fourth-order nonlinear signals shaped by digital signal processing in a baseband domain. The linearisation signals are generated by the second- and fourth-order nonlinear modifications of the baseband signal in the proposed manners. The composite second- and fourth-order linearisation signals modulate carrier second harmonics, and the modulated signals are then driven to the gate and drain of the amplifier transistor. The linearisation effects of the proposed method are evaluated on a single stage power amplifier for the simulated QAM and OFDM digitally modulated signals at diverse input power levels up to the 1 dB compression point. Moreover, the FPGA implementation of a system for the generation and processing of the fundamental signal, and the second-order linearisation signals is presented in the paper, and the proposed technique is verified for the generated QAM signal. In addition, the linearisation of the two-way asymmetrical Doherty amplifier is performed in the experiment by using software defined radio platforms for synthesising the fundamental signal and the second-order linearisation signals.     

一种宽频带可配置数字射频调制的实现方法

针对航空电子系统能力提升和体积重量功耗的矛盾,提出了一种宽频带可配置数字射频调制的设计与实现方法,使用数字信号处理的方法实现调制和上变频,将数字化推进到天线接口单元.首先,对比分析了3种发射信道的实现架构;其次,基于数字射频调制信道架构设计了宽频带可配置发射信道;然后,针对宽频带可配置数字射频调制在实现过程遇到的问题,一一给出了解决方法,即N次谐波调制技术、多相采样降速技术、最优本振选择方法.实现结果表明,相比传统二次发射信号的产生方案,本设计能够产生高质量的射频发射信号,幅度误差仅为1.7%RMS(Percent Root Mean Square),相位误差小于1°,误差向量幅度(EVM)仅为2.345%RMS,并具有宽频带优良的谐杂波抑制能力.     

Multidimensional Adaptive Power Management for Low-Power Operation of Wireless Devices

Currently, wireless circuits are designed to meet minimum quality-of-service requirements under worst case wireless link conditions (interference, noise, multipath effects), leading to high power consumption when the channel is not worst case. In this work, we develop a multidimensional adaptive power management approach that optimally trades-off power versus performance across temporally changing operating conditions by concurrently tuning control parameters in the RF and digital baseband components of the wireless receiver. Simulation and hardware results indicate significant power savings in the receiver using the proposed approach while maintaining the system bit error rate specification.      

基于GP2010的移动GPS射频前端设计

对GPS射频前端进行了研究与设计,实现了GPS信号射频到数字中频的转化过程。应用GP2010芯片设计出了符合要求的GPS射频前端,包括前端滤波器、低噪声放大器,以及中频滤波器。介绍测试系统的搭建,对实际制作的电路板进行调试,并得出测试结果,为后期基于FPGA实现GPS基带数字信号处理提供GPS数字中频信号,为自主设计GPS接收机奠定了基础。     

Analysis and design of a frequency-hopped spread-spectrumtransceiver for wireless personal communications

Personal communications services (PCS) require low-power radio technologies. One such transceiver architecture employing frequency-hopped spread-spectrum techniques is presented. System features such as antenna diversity with equal-gain combining and sequential hop combining are incorporated into the transceiver design to achieve robust wireless digital data transmission over fading channels. A direct-conversion architecture from radio frequency (RF) to baseband reduces the overall power consumption by eliminating intermediate frequency (IF) components. High-rate frequency hopping with frequency-shift keying (FSK) modulation is implemented using a direct digital frequency synthesis technique. A multiplierless correlation FSK detector, suitable for direct-conversion receivers, has been designed for quadrature noncoherent detection. Robust acquisition algorithms based on energy detection and pattern matching and tracking architectures using digital phase-locked loops are also described for system synchronization. The proposed transceiver is well-suited for low-power PCS applications and other portable wireless communications