Negative resistance in p-n junctions under avalanche breakdown conditions, part II

The small-signal impedance of the space-charge region of p-n junctions under avalanche breakdown conditions is calculated using reasonably realistic dependences of electron and hole ionization rates and drift velocities upon electric field. Two structures are analyzed: one is p⁺νn⁺structure which has a fairly uniform distribution of avalanche multiplication, and the other is a singly diffused junction which is a hybrid of an abrupt and a linear graded junction. Both structures show negative resistance when the transit time of carriers becomes appreciable. A computer program was evolved which requires, as input, the impurity profile and field dependences of ionization rates and drift velocities. The program first calculates the dc field and electron and hole currents and then solves the ac small-signal problem. Both the ac small-signal impedance and theQof the diode are calculated.     

Negative resistance and filamentary currents in avalanching silicon p+-i-n+junctions

Space-charge effects in avalanching p⁺-i-n⁺diodes give rise to a current-controlled bulk negative resistance. It is shown that this negative resistance gives rise to an instability which tends to lead to the formation of current filaments. A steady state can be found in which the generation of carriers in the filament by impact ionization is balanced by radial diffusion of carriers. We present the results of approximate numerical calculations of filament current-density profiles and total filament current as a function of applied voltage. The total filament current is a decreasing function of the applied voltage; thus, the diode exhibits a quasistatic negative external resistance. It is suggested that this negative resistance may be used to interpret observed sub-transit-time oscillations of p⁺-i-n⁺structures.     

Computer calculation of silicon avalanche diodes

The efficiency η and output power P per unit area were computed for silicon p-n-n⁺avalanche diodes having an active region of 5 microns. The condition for making both η andPmaximum is that the field at the n-n⁺interface generated by impurity and bias voltage is about one fourth of that at the junction under oscillation conditions. The maximum η andPwere calculated to be about 20.5 per cent and 53 kW/cm². Dc current density J0for maximumPwas about 4200 A/cm². On the other hand, J0for maximum η was calculated to be about 800 A/cm². It was found that a diode having an abrupt type junction is the best. The condition under which a diode is represented by use of a diode with abrupt type junction is that the region of a homogeneous field near the junction is less than one fifth of the space-charge region.     

Evaluation of voltage dependent series resistance of epitaxial varactor diodes at microwave frequencies

The series resistance of a high-quality varactor diode is primarily determined by the resistance of the semiconductor material close to the junction. With increasing reverse bias, the width of the space-charge region becomes greater, and the series resistance decreases. Theoretical models of graded and step junctions have been assumed, and calculations have been made of the series resistance as a function of bias. Epitaxial silicon diodes have been measured for series resistance as a function of bias by using the transmission loss method at 6 to 12 Gc/s, with the diode mounted across a reduced-height waveguide. The variation of series resistance with bias agrees well with the theoretical calculations. By measuring of the 3-dB bandwidth of the series resonance of the diode mounted in the reduced-height waveguide, the junction capacitance and the effective series inductance of the package also can be determined. Because the width of the space-charge region must vary with applied voltage in order to obtain the varactor characteristic, the diode cannot have zero-series resistance at zero-volt bias. The minimum possible series resistance is a function of the breakdown voltage and increases with increasing breakdown voltage. Calculations of the maximum possible cutoff frequency as a function of the diode breakdown voltage are presented for both graded and step junction silicon varactors. A plot of series resistance vs. reverse bias can be used to determine the impurity concentration profile in the epitaxial film. The impurity concentration profile can also be determined by measuring the capacitance vs. reverse bias, a technique which has been in use for some time. However the former method appears to be more accurate in that it is independent of junction area.     

Triggering phenomena in avalanche diodes

The operation of a small area p-n junction diode above the breakdown voltage is analyzed. A new formulation in terms of ionization probability is used to derive the rate of turn-on of current in such structures. Two differential equations are given which may be used to compute the probability that a carrier swept into or generated within the space-charge region triggers avalanche breakdown. For a 27-V n⁺-p diode biased 1 V above breakdown, this probability is close to 0.5 for an electron entering from the p side, or 0.1 for a hole entering from n side. Experimental measurements are in good agreement with the theoretical predictions.     

Space-charge-induced negative resistance in avalanche diodes

With a realistic and accurate model and the use of numerical techniques to solve the diode equations, it is shown that certain p⁺-n-n⁺diodes exhibit a static negative resistance that is due to space-charge effects. The magnitude of this resistance and the value of current density at which negative resistance appears depend on several device parameters. The dependence of the diode characteristics on these device parameters is presented for several examples. The characteristics of these devices at high frequencies are also discussed, and the possibility of high-powers high-efficiency operation as an oscillator is briefly treated.     

A mechanism for catastrophic failure of avalanche diodes

A simple computer model of the dc electrical-thermal behavior of a Schottky-barrier GaAs IMPATT diode has been modified to include the effects of temperature-dependent thermal resistance. This has made possible the computation of dc V-I characteristics for various IMPATT diode designs and parameters. Computed terminal V-I characteristics, as well as E-J characteristics for points within the depletion layer invariably have shown successive regions of increasing, then decreasing, positive differential resistance, culminating in a region of negative differential resistance. According to an analysis of differential negative resistance appearing in the literature [5], it is a natural consequence of operation in a negative resistance region for high-current filaments to form. Furthermore, a phenomenological argument is cited to justify high-current filamentation in a region of decreasing positive resistance. Experimental evidence is advanced to support the contention that IMPATT shortouts are the natural consequence of diode operation beyond a differential resistance maximum, where the resistance, although positive, is decreasing and the formation of destructive high-current filaments is inevitable.     

Negative resistance in p-n junctions under avalanche breakdown conditions, part I

A one-dimensional, small-signal analysis of the space-charge region of a p-n junction in which avalanche occurs uniformly is presented. The impedance is found to have a negative real part. The impedance is Well represented by a parallel connection of the depletion layer capacitance, an inductance, and a negative resistance. The admittance of the latter two is proportional to the bias current. The magnitude of the negativeQis below ten. The negative resistance is due to an intrinsic instability in the avalanching electron-hole plasma. A discussion of the instability and a traveling-wave tube-like amplification is given.     

Carrier trapping and recombination in avalanche diodes

The differential equations describing an avalanching p⁺nn⁺junction in the presence of multiple-level carrier traps have been solved numerically for trap densities as high as two orders of magnitude greater than the n-region background doping. The results compare quantitatively with a number of past, as well as new, experimentally observed changes in avalanche microwave diode performance with neutron damage. In particular, trapped charge in the space-charge region tends to localize the avalanche region near the p⁺n junction, which raises the frequencies of operation. Carrier trapping at the edges of the space-charge region explains the increase in operating voltage and decrease in small-signal capacitance. The localization of the avalanche region, through carrier trapping in the space-charge region, and recombination effects at high avalanche current densities combine to cause eventual RF failure of IMPATT and TRAPATT diodes with neutron damage.     

Thermal characterization of thermally-shunted heterojunctionbipolar transistors

Heterojunction Bipolar Transistors (HBTs) are potentially useful in a number of microwave applications, but they are severely limited by a current distribution instability caused by electrothermal interaction and the use of a low thermal conductivity substrate. A novel thermal management technique called “thermal shunting” has been developed to reduce thermal resistance and junction temperature non-uniformity. Thermal resistance measurements for thermally-shunted devices are presented. Specific thermal resistance measurements as low as 2.6×10^-4°C-cm²/W (147°C/W at 0.1 W for a device with a 177 μm² emitter area) have been obtained. Thermal resistance values obtained for thermally-shunted HBTs are substantially lower than those reported for conventional HBTs     

High-frequency oscillations of p++-n+-n-n++avalanche diodes below the transit-time cutoff

According to Read, n⁺⁺-P⁺-i-P⁺⁺diodes should oscillate at special high frequencies determined by carrier transit time in the space-charge layer. Oscillations not affected by transit time were observed with p⁺⁺-n⁺- n-n⁺⁺silicon diodes. The corresponding current-voltage characteristic revealed a negative resistance setting in at a critical current. Theoretical considerations show that one-sided avalanche injection in n⁺⁺-p⁺-p⁺⁺structures may lead to a slight negative resistance for carrier concentrations smaller than the impurity concentration and for certain widths of the depletion layer. This type of negative resistance disappears in n⁺⁺-p⁺-i-P⁺⁺structures, but with increasing injection multiplication is induced in the intrinsic layer. Therefore the carrier space-charge is reduced and a negative resistance appears at a critical current density. The onset of this second injection is an upper current limit of the Read transit-time mode. The frequency range of oscillations due to avalanche space-charge feedback generally will not be separated from the range of transit-time oscillations. Thus, it must be judged carefully which mechanism is responsible for observed high-frequency oscillations. On the other hand, space-charge feedback may give additional stability to the transit-time mode.     

Unified treatment of small-signal space-charge dynamics in bulk-effect devices

Space-charge dynamics in semiconductors with negative differential mobility are discussed in a small-signal approximation taking account of the role of carrier diffusion and are shown to exhibit fundamentally four different properties. These differences originate from two conditions, one being the direction of propagation of the space-charge wave and the other being whether the space-charge wave is characterized by frequency-independent velocity (convective instability) or frequency-independent wavelength (absolute instability). These behaviors of space-charge waves have a great influence on the performance of bulk-effect devices and give rise to extremely different characteristics. When the space-charge wave is characterized by frequency-independent velocity, two-terminal impedance of bulk-effect devices shows the conventional transit-time effect. On the contrary, the property of space-charge waves characterized by frequency-independent wavelength gives rise to the static negative resistance in two-terminal impedance.     

LSA relaxation oscillator principles

Oversized n-GaAs diodes operating in the LSA mode with doping-to-frequency ratios in the 1-5×10⁵s/cm³range are investigated in circuits that contain a short-circuited high impedance transmission line foreshortened to resonate the electronic parallel capacitance of the diode. By comparing computer simulations with experiments, such diodes are shown to operate in a nonsinusoidal LSA relaxation mode which offers good efficiency, effective space-charge control, and a fast buildup of the oscillations; details of the computer program are also given. A simple analysis is developed which defines the inductive and capacitive time constants controlling the voltage waveshape and explains the frequency tuning with bias voltage and the effective space-charge control. The analysis is shown to be suitable for oscillator design purposes.     

Measurement of the electron drift velocity in avalanching GaAs diodes

The scattering-limited drift velocity vsnof electrons in an avalanching GaAs diode is estimated by measuring the space-charge resistance. The result shows a lower value of vsn(5.7 ± 0.3) × 10⁶cm/s than the generally accepted value 8 × 10⁶cm/s at room temperature. The temperature dependence of vsnis also measured.     

A method for heat flow resistance measurements in avalanche diodes

Avalanche transit time oscillators are operating at power densities approaching 10⁶W/cm², unprecedented in semiconductor device history. At such power densities, heat flow resistance problems at the interface between the flip-chip mounted silicon chips and the metal substrate, as well as between the package and the heat sink, are extremely critical. This paper describes a new, nondestructive and accurate method of measuring the heat flow resistance between junction and heat sink by utilizing the temperature dependent breakdown voltage Vb(T) as a conveniently built-in temperature sensor. Variations in junction temperature ΔT with power ΔP= VbΔI are, therefore, related to variations in breakdown voltage ΔVbwith current ΔI resulting in a contribution to the electrical small signal resistance of the diode. This thermal resistance contribution Rthcan be separated readily from spreading and space charge resistance Rapand Rscbecause of the frequency dependence of Rth(ω). Furthermore, the frequency dependence of Rth(ω) allows the separation of heat flow resistance contributions originating in the immediate vicinity of the junction (Si-metal interface) from contributions originating at a poor thermal contact between package and heat sink. In keeping with calculations on simplified geometrical configurations, for which analytical solutions of the frequency dependent heat flow in a distributed circuit could be obtained, experimental results are presented which indicate that both heat flow resistance contributions can be extracted and separated with sufficient accuracy from as few as three electrical resistance measurements, e.g., at dc, 100 Hz, and 1 MHz. The simplicity of such measurements and their evaluation make this technique ideal for in-line testing of production devices.     

Tunnel effect in GaInAsP/InP double heterostructure diode

Negative differential resistance in a GaInAsP/InP double heterostructure diode with a pn junction annealed at 550-600°C is demonstrated. It is found that negative differential resistance is caused by the diffusion of impurities, Zn and Te, into the undoped GaInAsP layer     

Lateral effects in high-speed photodiodes

The effect of the sheet resistance of the diffused region of a p-n junction photodiode on the diode response is discussed. A differential equation is obtained for diffused region potential in terms of its sheet resistance and the manner in which the diode is illuminated. For zero external bias and low light levels or for large back-bias, the differential equation is linear. The linear equation has been solved for steady illumination and for sinusoidally varying illumination, both falling uniformly on the diode. Current voltage equations and equivalent circuits are obtained for these cases. In the ac case, the equivalent series resistance due to the diffused region sheet resistance and equivalent junction capacitance are found to be frequency dependent. The frequency dependence is interpreted as a decrease in effective diode area at high frequencies. The frequency at which this effect begins to be important is the reciprocal of the product of the diffused region sheet resistance, the junction capacitance per unit area, and the square of the diode width. The effect is slightly dependent on diode and contact geometry; both linear and circular geometries are discussed.     

大功率肖特基SiC二极管热特性研究

基于小电流下肖特基结正向压降的温度特性,建立了温升测量系统。利用该系统对肖特基SiC二极管的瞬态温升进行了测量,结果显示瞬态温升曲线呈阶梯状变化。利用结构函数的方法对瞬态温升曲线进行处理,分析了肖特基SiC二极管在热流传输路径上的热阻构成。研究了三引脚封装的肖特基SiC二极管在相同大功率的条件下,两正极引脚单独使用和并联使用时的热阻特性,结果显示,在两正极引脚并联使用时,其热阻比单独作用时减少一半,这表明三引脚封装的肖特基SiC二极管的两个正极是并联的,并共用一个负极和散热片。     

Experimental and numerical approach on junction temperature of high-power LED

The understanding of thermal resistance and junction temperature is important in the area of designing efficient, long-lasting high-power Light Emitting Diodes (LEDs) and diode stacks. This paper developed a systematic evaluating program for investigating the effect of location and thickness on the thermal resistance and junction temperature of LED on an aluminum substrate. Structure function measurements were implemented by Thermal Transient Tester (T3ster) and Integrating Sphere on LED placed on an aluminum plate. The temperature distribution of LED was analyzed to understand the relationship between thermal resistance and location of the LED on the aluminum base. Meantime, to evaluate the validity of the test, the simulation is developed by considering structure properties. The simulation curve basically has a similarity with the experimental curve in the overall. It implies that the evaluating method can provide guidance in understanding thermal reliability of LED lamps and designing thermal management techniques.