Highly integrated InP HBT optical receivers

This paper presents two highly integrated receiver circuits fabricated in InP heterojunction bipolar transistor (HBT) technology operating at up to 2.5 and 7.5 Gb/s, respectively. The first IC is a generic digital receiver circuit with CMOS-compatible outputs. It integrates monolithically an automatic-gain-control amplifier, a digital clock and data recovery circuit, and a 1:8 demultiplexer, and consumes an extremely low 340 mW of power at 3.3 V, including output buffers. It can realize a full optical receiver when connected to a photo detector/preamplifier front end. The second circuit is a complete multirate optical receiver application-specific integrated circuit (ASIC) that integrates a photodiode, a transimpedance amplifier, a limiting amplifier, a digital clock and data recovery circuit, a 1:10 demultiplexer, and the asynchronous-transfer-mode-compatible word synchronization logic. It is the most functionally complex InP HBT optoelectronic integrated circuit reported to date. A custom package has also been developed for this ASIC     

1Gb/s CMOS调节型共源共栅光接收机

基于特许0.35μm EEPROM CMOS标准工艺设计了一种单片集成光接收机芯片,集成了双光电探测器(DPD)、调节型共源共栅(RGC)跨阻前置放大器(TIA)、三级限幅放大器(LA,limiting amplifier)和输出电路,其中RGCTIA能够隔离光电二极管的电容影响,并可以有效地扩展光接收机的带宽。测试结果表明,光接收机的3dB带宽为821MHz,在误码率为10-9、灵敏度为-11dBm的条件下,光接收机的数据传输速率达到了1Gb/s;在3.3V电压下工作,芯片的功耗为54mW。     

Monolithic integration of fully ion-implanted lateral GaInAs pin detector/InP JFET amplifier for 1.3-1.55 mu m optical receivers

An optical receiver front-end consisting of a lateral interdigitated GaInAs pin detector integrated with an InP JFET amplifier has been fabricated. This lateral detector structure simplifies the GaInAs material growth requirement to a single layer and provides low capacitance. A quasiplanar approach has been developed in conjunction with a two-level metallisation interconnect scheme. An optical sensitivity of -29 dBm was measured at 560 Mbit/s and 1.3 mu m wavelength.<>     

Vertical electrical interconnection of compound semiconductorthin-film devices to underlying silicon circuitry

A three-dimensional integration technology that electrically connects an independently optimized thin-film device layer to a Si circuitry layer is reported. An epitaxial liftoff GaAs thin-film optical detector is integrated directly on top of Si amplifier circuitry with a planarizing, insulating layer of polymide between the detector and the circuitry. The detector is virtually connected to the circuitry below through an electrical via in the insulator. This integration technology enables monolithic, massively parallel vertical interconnection between two independently optimized device layers. Systems such as image processing arrays should significantly benefit from this massively parallel integration technology     

近红外光学膜厚监控系统的研制

在光学真空镀膜膜厚监控过程中,近红外波段信号弱、外界干扰大、信噪比低,难于检测监控.运用相干检测、锁相放大原理,在光学真空镀膜机可见光波段监控系统的基础上,研制了锁相放大器和改装近红外探头组成的近红外光学膜厚监控系统,成功实现近红外膜厚监控信号的压噪、放大、滤波和检测监控.     

Y-junction power divider in InGaAsP-InP photonic integratedcircuits

A demonstration is presented of an InGaAsP-InP asymmetric waveguide Y junction with a power dividing ratio which is independent of the polarization of the input light. The Y junction is monolithically integrated with an active optical gain section by metalorganic chemical vapor deposition (MOCVD). The integrated chip represents a fundamental building block for photonic integrated circuits. Experimental results are in agreement with a theoretical analysis of the Y junction. The theory shows a low radiation loss (0.4 dB) and negligible power reflection (-63 dB) at the Y junction, which is ideal for monolithic integration with active devices. They also report on an integrated optical amplifier Y-junction-monitoring detector chip as an example of a photonic integrated circuit that employs the new Y-junction design. The estimated excess loss of the Y junction was 1.4 dB for the integrated chip, and the Y-junction reflectivity was found to be negligible     

光纤通信端机中用的混合集成AGC信号放大模块

本文报导了140Mb/s混合集成光接收机中所使用的AGC信号放大模块研制结果。此模块为二、三、四次群光通信接收机中的功能模块。它包括主放大器输出信号的平均值检波器、控制二极管衰减器的AGC信号放大器、接收机所接收到的光电平的指示器以及PIN-FET前置放大器过载指示器。该模块采用厚膜混合集成方法将电路密封在DHM24型24引线标准膜电路绝缘子壳内。外形尺寸32.9×20.2mm~2。它体积小,可靠性高,与PIN-FET前放。AGC主放大模块连接后,在实用化的586B线路码型四次群光纤通信系统中,在误码率为10~(-9)下,接收灵敏度为-39dBm,并得到较好的眼图。     

Optical input/output interface system for Josephson junctionintegrated circuits

An optical input/output interface system for a Josephson junction integrated circuit is fabricated and tested. The system consists of a superconducting optical detector, a dc powered Josephson circuit, a dc powered Josephson high voltage circuit, a liquid-He-cooled semiconductor amplifier, and a liquid-He-cooled semiconductor laser. Features of the system are use of an ultrathin NbN film for the optical detector and adoption of the dc powered Josephson circuits for logic operation circuits. Correct optical output signal is detected by a liquid-He-cooled semiconductor photodiode. The optical input/output interface has the advantage of low heat penetration and low crosstalk compared to the interface using conventional coaxial lines. Moreover, dc powered Josephson circuits have an advantage of low crosstalk from power supply lines compared to conventional Josephson circuits, which are driven by ac supply current     

Characterization of an InGaAsP semiconductor laser amplifier as amultifunctional device

Multifunctional properties of an InGaAsP semiconductor laser amplifier have been evaluated. A bit error rate of 10^-9 at 100 Mb/s was obtained using the amplifier as a detector at a received optical power of -27 dBm with simultaneous cavity gain of 16 dB. The bandwidth of the amplifier detector was 300 MHz and the maximum responsivity was 30 V/W. The amplifier had a maximum gain of 29 dB and a very large optical on/off ratio of 50 dB. When the amplifier was used as a switch the cavity gain was 19 dB and the extinction ratio was 22 dB     

二极管型非制冷红外探测器的前端电路设计

设计了一种二极管型非制冷红外探测器的前端电路,该电路采用Gm-C-OP积分放大器的结构,将探测器输出的微弱电压信号经跨导放大器(OTA)转化为电流信号,再经电容反馈跨阻放大器(CTIA)积分转化为电压信号输出。该OTA采用电流反馈型结构,可以获得比传统OTA更高的线性度和跨导值。输入采用差分结构,可以有效地消除环境温度及制造工艺对探测器输出信号的影响。电路采用0.35 m CMOS工艺进行设计并流片,5 V电源电压供电。Gm-C-OP积分放大器总面积0.012 6 mm2,当输入差分电压为0~5 mV时,测试结果表明:OTA跨导值与仿真结果保持一致,Gm-C-OP积分放大器可实现对动态输入差分信号到输出电压的线性转化,线性度达97%,输出范围大于2 V。     

Multiple-channel OSNR monitoring with a single detector

We report a multichannel optical signal-to-noise ratio (OSNR) monitoring method using the integrated planar lightwave circuit and fast Fourier transform techniques with a single detector. The OSNR of four-channel wavelength-division-multiplexing signals can be monitored for a dynamic range of 20 dB with an accuracy of /spl plusmn/1 dB. This method can further allow one to suppress the optical crosstalk in accordance with the requirements of OSNR accuracy and dynamic range.     

Up to 16 dB improvement in detected voltage using two-section semiconductor optical amplifier detector

A semiconductor optical amplifier detector with an improved responsivity, obtained using two contacts is demonstrated. It is shown hat up to 16 dB improvement in detected output voltage may be obtained for a semiconductor optical amplifier with an internal gain of 30 dB. Initial experimental results showing a 4 dB improvement are presented.<>     

Proposals and analyses on laser amplifier based integrated optical circuits

Simplified traveling wave laser (TWL) amplifier equations are given based on a lumped model. Pulse transfer characteristics for a TWL amplifier are examined theoretically. A new class of integrated optical amplifier with three terminals (OPATT) has been proposed as an optical analog of the electric transistor. Analytical formulas and dynamic properties of an OPATT have been considered. OPATT-based optical integrated circuits, including optical differential amplifiers, comparators, saturable oscillators, and optical logic gates, have been investigated theoretically.     

Scaleable CMOS Current-Mode Preamplifier Design for an Optical Receiver

We have designed a process-insensitive preamplifierfor an optical receiver, fabricated it in several different minimumfeature sizes of standard digital CMOS, and demonstrated designscaleability of this analog integrated circuit design. The sameamplifier was fabricated in a 1.2 µm and two different0.8 µm processes through the MOSIS foundry [1].The amplifier uses a multi-stage, low-gain-per-stage approach.It has a total of 5 identical cascaded stages. Each stage isessentially a current mirror with a current gain of 3. Threeof these preamplifiers have been integrated with a GaAs Metal-Semiconductor-Metal (MSM) photodetector and one with anInGaAs MSM detector by using a thin-film epilayer device separationand bonding technology [2]. This quasi-monolithic front-end of anoptical receiver virtually eliminates the parasitics between thephotodetector and the silicon CMOS preamplifier. We have demonstratedspeed and power dissipation improvement as the minimum feature sizeof the transistors shrink.     

A Novel Approach to Implementing On-Chip Synchronous Detection for CMOS Optical Detector Systems

A phase-switching approach suppresses the need to employ a precise multiplier for synchronous demodulation. An improved solution for implementing on-chip synchronous detection consists of using a switched-phase amplifier, which combines pre-amplification and phase-switching operations. This enables circuit simplification, voltage lowering, and power and surface savings. A detector-associated circuit realising pre-amplification and synchronous demodulation is proposed. It includes a transimpedance amplifier, a switched-phase amplifier and a low-pass filter. All these building blocks are designed to operate under a minimum supply of 2 V, using a double-poly, 0.8-m CMOS process. The designed circuit is to be integrated with a CMOS optical detector for portable applications. System-level simulations (including the detector model) are performed to validate the system operation, and to estimate performances. The sensitivity of the system in terms of minimum detectable optical signal (which is synchronously modulated) is evaluated to be 2.2 10^–14 W/mm² in normal measuring conditions.     

采用ASK调制编码及相干检测方案的OCDMA系统分析

对采用ASK调制编码与相干检测方案的OCDMA系统进行分析 ,包括用简化的接收机模型导出外差及零差情况的光电流和噪声的表达式、分析了相干检测的优点、讨论了相干检测的要求、提出了利用Brillouin放大器选择放大传输信号的不同频带作为本振参考信号的方案 ,分析表明这种方案不仅可以免去另设本振光源的麻烦 ,而且由于Brillouin放大器具有压缩脉冲宽度的作用 ,能有效抵消色散造成的Chips脉冲展宽和幅度下降。     

A 1.3-/spl mu/m wavelength laser with an integrated output power monitor using a directional coupler optical power tap

A 1.3-/spl mu/m Fabry-Perot laser with a directional coupler power tap inside the laser cavity, used for diverting optical power to an integrated waveguide monitoring photodetector is demonstrated. The monitoring detector provides photocurrent which is linear with the front facet output power, with responsivity as high as 0.37 mA/mW, depending on the length of the directional coupler coupling region.     

Wideband monolithic AGC amplifier for 400 Mbit/s optical repeaters using an advanced Si-bipolar IC technology, SICOS

A wideband AGC amplifier is monolithically integrated using an advanced Si-bipolar IC technology, SICOS. The fabricated IC exhibits an 8·4 dB maximum gain, 17 dB variable gain and 1·1 GHz bandwidth. It is shown that the SICOS technology is feasible for developing an equalising amplifier with a 37 dB gain and 700 MHz bandwidth for 400 Mbit/s optical repeaters.     

一种带功率检测的TD-SCDMA锗硅功率放大器

设计了一个用于TD-SCDMA的锗硅异质结双极晶体管(SiGe HBT)功率放大器。该放大器使用3.3 V电源,内部实现了包括级间匹配网络等的全电路片上集成。对于码分多址环境,功率放大器提供28 dBm的功率输出,实现34.8%的功率附加效率(PAE),另外,在28 dBm的输出功率下,邻道功率泄漏比(ACPR)小于-35 dBc。该功率放大器同时包括动态控制偏置电路和完全集成的功率检测器。     

W波段宽带辐射计

以被动式毫米波成像为应用背景,介绍了辐射计的工作原理,成功研制了一种带宽35 GHz集成直接检波式辐射计原理样机,以满足成像系统对辐射计的需求。信号由两级低噪声放大器进行放大,再由检波器直接检波,最后进行视频放大,以提供足够高的信号供后端进行数据采集。放大器由两级低噪声放大器组成,放大增益40 dB。单独对检波器进行设计、测试,在75~100 GHz范围内,该检波器电压灵敏度大于1 000 mV/mW,在100~110 GHz范围内,电压灵敏度大于500 mV/mW。最后集成了一个整体辐射计模块,该辐射计在35 GHz带宽内积分时间为0.6 ms,温度灵敏度为0.45 K。