A three-phase ZVS PWM DC/DC converter with asymmetrical duty cycle associated with a three-phase version of the hybridge rectifier

This paper proposes the use of a three-phase version of the hybridge rectifier in the three-phase zero-voltage switch (ZVS) DC/DC converter with asymmetrical duty cycle. The use of this new rectifier improves the efficiency of the converter because only three diodes are responsible for the conduction losses in the secondary side. The current in the secondary side of the transformer is half the output current. In addition to this, all the advantages of the three-phase DC/DC converter, i.e., the increased frequency of the output and input currents, the improved distribution of the losses, as well as the soft commutation for a wide load range, are preserved. Therefore, the resulting topology is capable of achieving high efficiency and high power density at high power levels. The theoretical analysis, simulation, and experimental results obtained from a 6-kW prototype, and also a comparison of the efficiency of this converter with the full-bridge rectifier are presented.     

A novel ZVS DC/DC converter for high power applications

This paper presents a novel zero voltage switch (ZVS) pulse-width modulation (PWM) DC/DC converter for high power, high output voltage applications. By using two active switches in the secondary side of a transformer, the proposed converter achieves not only ZVS of the active switches in the entire load ranges but also soft commutation of the output rectifier diodes. The proposed topology has simple structure and control strategy. Simulation results and experimental results of a 2.8 kW 200 kHz DC/DC converter are presented.     

Dual sepic PWM switching-mode DC/DC power converter

A steady-state analysis and experimental results for a dual sepic pulse-width-modulated (PWM) DC/DC power converter for both continuous and discontinuous modes of operation are presented. The converter is dual to a sepic converter, but it can also be derived from a forward converter by replacing one of its rectifier diodes with a coupling capacitor. The circuit acts as a step-down or step-up converter, depending on the value of the ON switch duty cycle. The transformerless version of the converter has a positive DC/DC voltage transfer function. Therefore, the circuit is suitable for distributed power systems. Design equations for all circuit components are derived. Experimental results measured at 100 kHz were in good agreement with theoretical predictions     

用PWM芯片实现全桥移相ZVS隔离DC／DC变换器的研究

简述了市场上现有移相控制器的简单情况,分析了全桥移相的工作原理,进而介绍了采用常规PWM控制芯片及全桥驱动器HIP4081A实现50w／500kHz全桥移相ZVS隔离DC／DC变换器,通过有效的利用变压器漏感、MOSFET的输出电感以及MOSFET的体二极管实现ZVS,大幅度降低了开关损耗、热损耗、EMI和RFI。通过深入细致的实验观察,验证了理论设计的正确性、合理性,并给出了相关的实验波形和实验结果分析。     

Analysis,design and implementation of an interleaved three-level PWM DC/DC ZVS converter

This paper presents a new parallel three-level soft switching pulse-width modulation (PWM) converter. The proposed converter has two circuit cells operated by the interleaved PWM modulation. Thus, the ripple currents at input and output sides are reduced. Each circuit cell has two three-level zero voltage switching circuits sharing the same power switches. Therefore, the current and power rating of the secondary side components are reduced. Current double rectifier topology is selected on the secondary side to decrease output ripple current. The main advantages of the proposed converter are soft switching of power switches, low ripple current on the output side and low-voltage rating of power switches for medium-power applications. Finally, the performance of the proposed converter is verified by experiments with 1 kW prototype circuit.     

A family of closed-form duty cycle control laws for three-phaseboost AC/DC converter

In this paper, a basic closed-form duty cycle control law is first derived for the proposed AC/DC converter to achieve clean sinusoidal input current, adjustable DC voltage, controllable power factor and bidirectional power flow capability, and fixed switching frequency, without using any current sensor. Then, a second dead-band scheme is derived from the previous basic form to achieve the same function and to reduce switching loss and thermal stress. Similarly, a four-switch scheme is also derived to provide a new operation mode to enhance the reliability of the converter. Modified control laws of the above family are also considered to handle the effect of unbalanced input voltage. It is very interesting to see that a unified theory can be used to give the above family of duty cycle control laws under both balanced and unbalanced input voltage. Some simulation and experimental results are presented for verification     

Soft-switched DC/DC converter with PWM control

In this paper, a new power converter with two variations is proposed. A novel asymmetrical pulse-width-modulation (PWM) control scheme is used to control the power converter under constant switching frequency operation. The modes of operation for both variations are discussed. The DC characteristics, which can be used in the design of the power converters, are also presented. Two 50 W power converters were built to verify the characteristics of the converters. Due to the zero-voltage-switching (ZVS) operation of the switches and low device voltage and current stresses, these power converters have high full- and partial-load efficiencies. They are, therefore, potential candidates for high-efficiency high-density power supply applications     

Advanced power semiconductors and ICs for DC/DC converter applications

This paper describes recent advances in power semiconductor devices, integrated circuits, and packages for DC/DC converter applications. Special emphasis is placed on the latest discrete power MOSFET devices and packages. Features and trends in ICs for control of synchronous buck converters are highlighted as well. The paper will also cover a new class of miniaturized hybrid assembly that sets new efficiency standards for high current low output voltage applications.     

1-MHz self-driven ZVS full-bridge converter for 48-V power pod and DC/DC brick

In this paper, a self-driven zero-voltage-switching (ZVS) full-bridge converter is proposed. With the proposed self-driven scheme, the combination of the ZVS technique and Self-driven technique recycles the gate driving energy by making use of the input capacitor of the secondary side synchronous rectifier (SR) as the snubber capacitor of the primary side switches. Compared with the external driver, the proposed converter can save driving loss and synchronous rectifier body diode conduction loss. Additionally, compared with the existed level-shifted self-driven scheme for bridge-type symmetrical topologies, its gate signal is very clean and suitable for high-frequency applications. A 1-MHz, 1.2-V/70-A prototype is built to verify the analysis. Experimental results show that it can achieve 81.7% efficiency. And there is an efficiency improvement of 4.7% over conventional phase-shifted full-bridge converter with an external driver.     

A novel three-phase AC/DC converter without front-end filter basedon adjustable triangular-wave PWM technique

This paper proposes a novel three-phase AC/DC converter without a front-end filter. Because an adjustable triangular-wave pulsewidth modulation (PWM) (ATPWM) technique is adopted, not only is a front-end filter located after the three-phase rectifier is omitted, but also the size of the input AC filter and the output DC filter are reduced. In addition, this AC/DC converter has many advantages such as simpler structure, higher reliability, and better output waveform. The principle of operation, harmonics elimination, and feedback control of the novel AC/DC topology are elaborated. A thorough analysis on its performance under an unbalanced system is presented. Finally, the theoretical analysis is proved to be correct by simulations and experiments     

A modified asymmetrical pulse-width-Modulated resonant DC/DC converter topology

A modified asymmetrical pulse-width-modulated resonant dc/dc converter employing an auxiliary circuit will be proposed in this paper. The auxiliary circuit consists of a network of two capacitors and an inductor. The aim of this network is to produce zero-voltage-switching (ZVS) over a wide input voltage range, while reducing the voltage stress on the resonant component. A detailed analysis and performance characteristics are presented. Experimental results for a 5 V, 35 W converter show an efficiency of 83% at a constant operating frequency of 500 kHz. Using metal oxide semiconductor field effect transistors (MOSFETs) as synchronous rectifiers can further reduce power losses and improve the efficiency to be greater than 90%.     

An AC/DC converter with high power factor

The television receiver often employs a capacitor-input-type rectifier. In this case, it is regulated as a class D piece of equipment. This paper presents a novel ringing-choke-converter-type switching regulator, which functions as an active filter. The proposed circuit features a simple circuit configuration and cost effectiveness. It achieves a high power factor of about 0.95 and reduces current harmonics (third, fifth, and seventh) in the AC input current to less than 40% of the limit value for class D. The voltage across the input smoothing capacitor does not show large variations and the components in the conventional ringing-choke converter can be used unmodified. Ripple content of the DC output voltage shows a slight increase and is the subject for future research.     

A digitally controlled PWM/PSM dual-mode DC/DC converter

A digitally controlled pulse width modulation/pulse skip modulation(PWM/PSM) dual-mode buck DC/DC converter is proposed.Its operation mode can be automatically chosen as continuous conduction mode (CCM) or discontinuous conduction mode(DCM).The converter works in PSM at DCM and in 2 MHz PWM at CCM.Switching loss is reduced at a light load by skipping cycles.Thus high conversion efficiency is realized in a wide load current.The implementations of PWM control blocks,such as the ADC,the digital pulse width modulator(DPWM) and the loop compensator,and PSM control blocks are described in detail.The parameters of the loop compensator can be programmed for different external component values and switching frequencies, which is much more flexible than its analog rivals.The chip is manufactured in 0.13μm CMOS technology and the chip area is 1.21 mm~2.Experimental results show that the conversion efficiency is high,being 90%at 200 mA and 67%at 20 mA.Meanwhile,the measured load step response shows that the proposed dual-mode converter has good stability.     

一种数字控制PWM/PSM双模DC/DC变换器

本文实现了一种数字控制PWM/PSM双模DC/DC Buck变换器。该变换器的两种工作模式可根据连续导通模式（CCM）或者断续导通模式（DCM）自动选择。变换器在DCM模式下工作于脉冲跨周期调制（PSM）模式,在CCM模式下工作于2MHz开关频率的脉冲调宽调制（PWM）模式。轻负载下通过跳周期工作降低了开关损耗。因此在宽负载范围内得到了较高的变换效率。文中详细阐述了PWM控制电路模块,例如模拟数字转换器（ADC）,数字PWM（DPWM）和环路补偿器,以及PSM控制模块的实现。环路补偿器的参数可编程调节,以满足不同的外围器件参数以及开关频率。这一特性比模拟方式具有更大的灵活性。本文中实现的变换器采用0.13μm CMOS工艺设计并流片,芯片面积为1.21 mm2。测试结果显示变换效率在200mA负载时为90%,在20mA负载时为67%。同时,负载阶跃响应的测试结果说明了本文实现的双模变换器的良好稳定性。     

移相控制ZVS PWM DC/DC变换器设计

ZVS移相全桥PWM变换器实现了超前桥臂与滞后桥臂的零电压开关（ZVS）。文章介绍了这种变换器的工作原理,并利用UC3879芯片和IR2110芯片分别设计了该变换器的控制电路和驱动电路,最后利用仿真和实验验证了设计的可行性。     

多相PWM控制DC／DC变换器

概述 近年来,随着一些高性能CPU的出现,如Pentium 4、Athlon等,需要输出电压更小,更大电流的DC/DC变换器,对热性能、EMI及负载瞬变应答(Load Transient)的要求也不断提高。传统的单相DC/DC变换器日益显示出局限性。多相DC/DC变换器以其独特的性能,为高性能CPU电源的解决方案开辟的一条新路。     

Lyapunov-based control for three-phase PWM AC/DC voltage-sourceconverters

The three-phase pulsewidth modulation (PWM) AC/DC voltage-source converter with the control laws proposed so far is not only unstable against large-signal disturbances, but also has the problem that its stability depends on the circuit parameters such as the DC-output capacitance. This paper describes a new control law based on Lyapunov's stability theory. It is shown that the converter can be stabilized globally for handling large-signal disturbances. The resulting closed-loop system not only guarantees a sufficient stability region (independent of the circuit parameters) in the state space, but also exhibits good transient response both in the rectifying and regenerating modes. Also, a new simulation technique is introduced which increases the speed of the simulation process considerably. Computer simulations are presented to confirm the effectiveness of the proposed control strategy and the validity of the simulation technique. Experimental results are also presented to verify the theoretical and simulation studies     

Improved voltage clamping scheme for ZVS PWM three-level converter

This paper proposes an improved zero-voltage-switching pulsewidth-modulation (ZVS PWM) three-level converter, which is improved from the original ZVS PWM three-level converter by merely exchanging the position of the resonant inductance and the transformer, such that the transformer is connected with the lagging switches. The improved converter has several advantages over the original, e.g., the clamping diodes conduct only once in a switching period, and the resonant inductance current is smaller in zero state, leading to a higher efficiency and reduced duty-cycle loss. A blocking capacitor is usually introduced to the primary side to prevent the transformer from saturating. This paper analyzes the effects of the blocking capacitor in different positions, and a best scheme is determined. A 2.5-kW prototype converter verifies the effectiveness of the improved converter and the best scheme for the blocking capacitor.     

Transformer secondary leakage inductance based ZVS dual bridge DC/DC converter

A novel zero voltage switching (ZVS) dual bridge dc/dc converter is presented. The proposed converter is composed of two dual-transistor-forward converter, coupled with a single high frequency transformer. ZVS is realized by introducing a proper leakage inductance to the secondary of the high frequency isolation transformer with a corporation of a designed pulse-width modulation control. Operation principle and ZVS condition of the proposed converter are analyzed. Experimental results obtained from a 3.2-kW prototype are given. Extensions of the proposed converter topologies and experimental results of one extension converter are presented.     

A monolithic buck DC–DC converter with on-chip PWM circuit

A monolithic CMOS voltage-mode, buck DC–DC converter with integrated power switches and new on-chip pulse-width modulation (PWM) technique of switching control is presented in this paper. The PWM scheme is constructed by a CMOS ring oscillator, which duty is compensated by a pseudo hyperbola curve current generator to achieve almost constant frequency operation. The minimum operating voltage of this voltage-mode buck DC–DC converter is 1.2 V. The proposed buck DC–DC converter with a chip area of 0.82 mm² is fabricated with a standard 0.35-μm CMOS process. The experimental results show that the converter is well regulated over an output range from 0.3 to 1.2 V, with an input voltage of 1.5 V. The maximum efficiency of the converter is 88%, and its efficiency is kept above 80% over an output power ranging from 30 to 300 mW.