一种新型MEMS微电感制作工艺和模拟研究

采用光刻、干法刻蚀、电镀等微机电系统(MEMS)工艺设计了一种新型的带磁芯的螺线管微电感。采用COMSOL Multiphysics有限元软件,计算了不同频率交流载荷下的等效电阻、等效电感和阻抗随频率变化的关系。模拟结果表明,在1kHz¹MHz的频率范围内,其等效电感值基本不变,约为27nH,电阻值约为9Ω,射频模拟结果表明其共振频率为0.45GHz。     

RF平面螺旋微电感的物理模型

为了在RF频率域内准确模拟RF平面螺旋微电感的性能，讨论了一种计算RF平面螺旋微电感的物理模型，此模型采用Greenhouse法计算微电感的电感量，在计算微电感Q值时，考虑了诸如涡流、衬底电阻及各种寄生电容等因素，寄生电容包括电感与终端引出层间的交叉电容，电感与衬底间的电容，衬底电容等。这种模型可以计算不同布局及参数的微电感，为微电感的设计及其性能的优化提供了一种很好的方法。     

多层PCB 电源地平面返回路径阻抗的边界元分析

研究了多层印制电路板(PCB)中含有一个信号过孔的电源/地平面返回路径阻抗的频域特性,并分析采用添加短路过孔的方法减小多层PCB的输入阻抗.电源/地平面形成了径向传输线结构,反焊盘处的输入阻抗即为信号电流在电源/地平面间的返回路径阻抗.在电源/地平面外部边界施加PMC(完全导磁体)边界条件,在反焊盘处施加电流激励源,短路过孔轴向电场为零,采用高效的二维边界元法求解.计算了10GHz内电源/地平面返回路径的输入阻抗.结果表明:在两特性相同的平面之间添加短路孔可以降低输入阻抗,同时,电源、地平面的输入阻抗随频率变化交替呈现容性或感性,在反谐振频率处输入阻抗值可达几百欧姆,此外,在频率较低时输入阻抗可用静态电容或静态电感表示.采用基于全波分析的有限元软件验证了计算结果和计算方法的正确性.     

微电子学、集成电路

TN4TN015 01040497集成电路矩形互连线二维电容及随频率变化电感的联合计算方法/方蜀州,汤小波,王泽毅,洪先龙(清华大学计算机科学与技术系)刀计算机辅助设计与图形学学报.一2000,12(12),一887一890提出一种电容电感联合算法,可计算全频率范围内随频率变化的电感,同时得到电容矩阵.该算法利用电路模型法得到低颇{、若卜频率的电感值;利用边界元法得到电容矩阵,并对电容知阵求逆得到电流完全分布在导体表面时的电感值,由集肤深)划导到该电感值对应的频率.对上述离散频率的电感值利用三次徉条函数插值,得到整个频率范围内电感的变化曲线算法…     

微机控制脉宽可调的重复频率Nd：YAG激光器

本文介绍了一种没有脉冲形成网络的新型脉冲激光电源的主回路。分析了用单板计算机控制其输出频率与脉冲宽度，脉冲波形的原理及方法，对不同脉宽和放电波形条件的输出特性进行了简要分析。该电源泵浦的激光器输出频率为５０Ｈｚ内可调，脉宽０．２ｍｓ－１０ｍｓ内连续可调。这种输出参数能满足广泛的微加工要求。     

飞机电源系统并排敷设导线阻抗特性分析

导线是飞机电源系统电能传输的主要载体。由于邻近效应,并排敷设相邻导线的电流有效值、频率等因素会影响导线阻抗值发生变化。为确定由于邻近效应引起的导线阻抗参数的变化,利用仿真软件Maxwell 2D/Simplorer建立并排敷设导线仿真模型,分析在邻近导线电流有效值、频率变化时,被测导线电阻、电感的变化规律,并对引起阻抗变化的原因进行了分析。结果表明：由于邻近效应和趋肤效应,被测导线的电阻值会随邻近导线电流频率和有效值的增大而增大;被测导线的电感值随邻近导线电流有效值的增大而增大,随邻近导线电流频率的增大而减小;在相同频率下,并排敷设时被测导线电阻、电感比单根敷设时大。     

速调管输出腔高阶横磁模式加载波导滤波器输出回路

该文设计了工作于高阶横磁 TM310模式单间隙封闭圆柱同轴腔.在输出矩形波导内设计了横向电感滤波膜片的新型结构.用模拟场分析法计算了腔内6个漂移管中心处间隙阻抗平均值的频率特性.模拟和计算发现,该结构模式输出回路的间隙阻抗平均值随频率的变化出现双峰曲线.这表明,采用滤波膜片波导的输出带宽比采用空波导情形的带宽有明显的增加.     

采用调制晶体管和双反馈回路的有源电感

在共源共栅-共漏有源电感的基础上,联合采用调制晶体管和双反馈回路,提出了一种可在不同频率下获得高的品质因子(Q)峰值,且分别可在大、小范围内粗调和细调电感值的新型宽频带可调谐有源电感。基于TSMC 0.18 μm CMOS工艺,利用ADS设计软件进行验证。结果表明,该有源电感在0~8.15 GHz的工作频率范围内,调节主回路的偏置电压,在频率为4.0,4.85,5.95 GHz时,分别获得1 154,6和1 293的高Q峰值。当Q值大于20时,其频率带宽均大于1.5 GHz,可以在43~132 nH之间粗调电感值的峰值。调节从回路的偏置电压,在5.95 GHz固定频率下,获得418~3 517的高Q峰值,且可以在10%比例范围内细调电感值的峰值。     

一种新疑的高重频脉冲固体激光电源

介绍一种全桥串联谐振技术。采用恒流充电技术对开关电源技术结合设计的方法，设计出频率高达120Hz脉冲固体激光电源。由于丢掉了笨重的工频变压器和利用较高的开关频率、降低了谐振的电感量，从而使电源的体积和重量减少，效率提高。     

具有电容阵列和电感阵列的1.8~2.6GHz CMOS压控振荡器

设计了一个具有开关电容阵列和开关电感阵列的1.76~2.56GHz CMOS压控振荡器。电路采用0.18µm 1P6M CMOS工艺实现。经测试,压控振荡器的频率调谐范围为37%。在频率调谐范围内及1MHz频偏处,相位噪声变化范围为-118.5dBc/Hz至 -122.8dBc/Hz。在1.8V电源电压下,功耗约为14.4mW。基于具有电容阵列和电感阵列的可重构LC谐振回路,对压控振荡器的调谐范围参数进行了分析和推导,所得结果为电路设计提供了指导。     

Frequency Characteristics of High Speed Power Distribution Grids

The variation of inductance with frequency in high performance power distribution grids is discussed in this paper. The impedance characteristics of the power grid need to be well understood for the design of efficient and robust high performance power distribution grids. The physical mechanisms underlying the dependence of inductance on frequency are discussed. The variation of inductance with frequency in three types of power grids is analyzed in terms of these mechanisms.The inductance of power distribution grids decreases with signal frequency. The decrease in inductance in non-interdigitated grids is primarily due to current redistribution in multiple forward and return current paths. In interdigitated grids, the variation of inductance with frequency is fairly small, typically less than 10% because both proximity and multi-path current redistribution effects are minimal. In paired grids, the relative decrease in inductance with frequency is larger as compared to interdigitated grids. This behavior is due to significant proximity effects. The smaller the separation between the power and ground lines and the wider the lines, the more significant proximity effects become and the greater the relative decrease in inductance with frequency.     

Inductive properties of high-performance power distribution grids

The design of high integrity, area efficient power distribution grids has become of practical importance as the portion of on-chip interconnect resources dedicated to power distribution networks in high performance integrated circuits has greatly increased. The inductive characteristics of several types of gridded power distribution networks are described in this paper. The inductance extraction program FastHenry is used to evaluate the inductive properties of grid structured interconnect. In power distribution grids with alternating power and ground lines, the inductance is shown to vary linearly with grid length and inversely linearly with the number of lines in the grid. The inductance is also relatively constant with frequency in these grid structures. These properties permit the efficient estimation of the inductive characteristics of power distribution grids. To optimize the process of allocating on-chip metal resources, inductance/area/resistance tradeoffs in high speed performance distribution grids are explored. Two tradeoff scenarios in power grids with alternating power and ground lines are considered.     

Impedance characteristics of power distribution grids in nanoscale integrated circuits

The essential design characteristic of nanoscale integrated circuits is increased interconnect complexity. Conductors at different levels of the interconnect hierarchy have highly different physical and, consequently, electrical characteristics. These interconnect lines also exhibit inductive behavior due to enhanced switching speed of nanoscale devices, making interconnect design and analysis difficult. The design of robust and area efficient power distribution networks for high-speed integrated circuits has therefore become a challenging task. The impedance characteristics of multilayer power distribution grids and the relevant design implications are the subject of this paper. The power distribution network spans many layers of interconnect with disparate electrical properties. Unlike single-layer grids, the electrical characteristics of multilayer grids vary significantly with frequency. As the frequency increases, a large share of the current flow is transfered from the low-resistance upper layers to the low-inductance lower layers. The inductance of a multilayer grid therefore decreases with frequency, while the resistance increases with frequency. The lower layers of multilayer power grids provide a low-inductance current path, significantly reducing the grid impedance at high frequencies. Multilayer power distribution grids extend to the lower interconnect layers, exhibiting superior high-frequency impedance characteristics as compared to power distribution grids built exclusively within the upper, low-resistance metal layers. A significant share of metal resources to distribute the global power should therefore be allocated to the lower metal layers. An analytic model is also presented to determine the impedance characteristics of a multilayer grid from the inductive and resistive properties of the comprising individual grid layers.     

High-frequency characterization of on-chip digital interconnects

On-chip inductance is becoming increasingly important as technology continues to scale. This paper describes a way to characterize inductive effects in interconnects. It uses realistic test structures that study the effect of mutual couplings to local interconnects, to random lines connected to on-chip drivers, and to typical power and ground grids. The use of S parameters to characterize the inductance allows a large number of lines to be extracted while requiring only a small overhead measurement of dummy open pads to remove measurement parasitics. It also enables direct extraction of the frequency-dependent R, L, G, C parameters. The results are summarized with curve-fitted formulas of inductance and resistance over a wide range of line spacings and line widths. The significance of the frequency dependence is illustrated with transient analysis of a typical repeater circuit in a 0.25-μm technology. A model that captures the frequency dependency of the extracted parameters accurately predicts the performance of a new inductance-sensitive ring oscillator     

On-Chip Power Distribution Grids With Multiple Supply Voltages for High-Performance Integrated Circuits

On-chip power distribution grids with multiple supply voltages are discussed in this paper. Two types of interdigitated and paired power distribution grids with multiple supply voltages and multiple grounds are presented. Analytic models are also developed to estimate the loop inductance in four types of proposed power delivery schemes. Two proposed schemes, fully and pseudo-interdigitated power delivery, reduce power supply voltage drops as compared to conventional interdigitated power distribution systems with dual supplies and a single ground by, on average, 15.3% and 0.3%, respectively. The performance of the proposed on-chip power distribution grids is compared to a reference power distribution grid with a single supply and a single ground. The voltage drop in fully interdigitated and fully paired power distribution grids with multiple supplies and multiple grounds is reduced, on average, by 2.7% and 2.3%, respectively, as compared to the voltage drop of an interdigitated power distribution grid with a single supply and a single ground. The proposed power distribution grids are a better alternative to a single supply voltage and a single ground power distribution system. On-chip resonances in power distribution grids with decoupling capacitors are intuitively explained in this paper, and circuit design implications are provided. It is also noted that fully interdigitated and fully paired power distribution grids with multiple supply voltages and multiple grounds are recommended to decouple power supply voltages.     

悬臂梁式压电振动能量收集系统输出功率的优化研究

针对环境振动能量较小、振动源频带较宽导致压电能量收集系统输出功率较低的问题,探究了悬臂梁式结构能量收集系统采用并联或串联电感优化统输出功率的方法和特性,分析了不同并、串联电感值对输出功率的影响.鉴于压电悬臂梁的工作频率较低,匹配电感值较大,采用无损模拟电感进行了实验验证.理论分析与实验结果均表明,在不同的激振频率下对应不同的匹配电感值,在偏离谐振频率附近也可获得与谐振状态几乎相同的最大输出功率,从而拓宽了工作频率,提高了压电振动能量收集系统的能量收集水平.当激振频率分别是谐振频率的0.8和1.2倍时,并联或串联电感获得的最大输出功率分别是无电感纯电阻负载的26.4倍和18.2倍.     

Power plane SPICE models and simulated performance for materialsand geometries

A SPICE model for power plane simulation has been developed. It is based on the geometries and materials of the power planes and uses a unit cell composed of RLC elements, transmission line elements or the HSPICE W-element. Simulated resonances in the frequency domain and delays in the time domain are consistent with results calculated from physical dimensions. SPICE model simulations compare well with hardware measurements in both the frequency and time domains. The role of dielectric thickness, dielectric constant and parallel pairs of power planes is demonstrated through simulation. The spreading inductance of power planes is defined, discussed and measured. Power plane performance in terms of impedance, resonances, damping and spreading inductance is optimized by the use of a thin dielectric layer between conductive planes     

New high efficiency 500 kW tetrodes for short wave broadcast

Two 500-kW tetrodes, developed for shortwave broadcast service using computer-aided design (CAD) techniques are presented. The two tubes are similar, one having pyrolytic graphite grids and the other Y-3 grids. The tubes are interchangeable and have similar operating parameters. Cooperation between transmitter designers and tube designers facilitated the fulfilling of requirements established by the Voice of America for it's new generation of efficient shortwave international broadcast transmitters. Tubes are now operating in the model 420B transmitter at frequencies between 3.9 and 26.1 MHz at the Voice of America site in Greenville, North Carolina. The tubes operate interchangeably as the power amplifier tube, or the pulse duration modulator tube, and they have multiphase water-cooled anodes rated at 400 kW, low internal inductance and capacitance, mesh-thoriated tungsten cathodes, and two choices of grids, either platinum-zirconium-coated molybdenum wire or laser-machined pyrolytic graphite     

Minimum current magnitude control of surface PM synchronous machines during constant power operation

The dual-mode inverter control (DMIC) was initially developed to provide broad constant power speed range (CPSR) operation for a surface mounted permanent magnet machine (PMSM) having low inductance. The DMIC interfaces the output of a common voltage source inverter (VSI) to the PMSM through an ac voltage controller. The ac voltage controller consists of three pairs of anti-parallel silicon controlled rectifiers (SCRs), one anti-parallel SCR pair in series with each winding of the motor. In a recent paper a fundamental frequency model of DMIC type controllers was developed using an equivalent reactance interpretation of the in-line SCRs. In this work, the same fundamental frequency model is used to show that the DMIC may have considerable loss reduction benefits even if the motor winding inductance is large. Specifically, it is shown that the SCRs enable maximum watts per rms amp control during constant power operation. The rms motor current can be minimized for any given power level and sufficiently large speed with DMIC. A fixed winding inductance and a conventional inverter can only be optimized for a single speed and power level. The performance predicted by the fundamental frequency model of the DMIC is compared to that of a conventional PMSM drive where the motor has sufficiently large inductance to achieve an infinite CPSR. It is shown that the SCRs can reduce motor current by a factor of 0.7071 at high speed and rated power. This would reduce the motor copper losses by 50% and reduce the conduction losses in the VSI by 29.3%. At less than rated power the percentage of motor/VSI loss reduction enabled by the SCRs is seen to be even larger.     

脉冲功率电路参数对RSD开关预充时间的影响研究

文章介绍了高功率半导体脉冲功率开关-反向开关晶体管（Reversely Switched Dynistor,RSD）的工作原理,分析了RSD脉冲功率电路的特性。由磁开关的电压电流,得到了磁开关的动态电感与电流的量化曲线,在MATLAB仿真平台,分别建立了磁开关动态电感模型、RSD脉冲功率电路模型。计算了主回路元件参数对RSD开关的预充时间TR的影响。计算结果表明,主回路电阻负载在0.01～1Ω变化时,TR变化很小,主回路电感和1Ω以上的主回路电阻对TR影响较明显,计算结果与实验结果最大误差为5%,表明通过低压试验结果的计算,可较准确地预测高压试验的TR。