A highly efficient concurrent dual‐band GaN class‐AB power amplifier at 1.84 GHz and 3.5 GHz

This article presents the design, simulation, implementation, and experimental results of a highly efficient, concurrent dual‐band, gallium nitride (GaN), class‐AB power amplifier (PA) at two frequencies: 1.84 and 3.5 GHz. It proposes a novel dual‐band bandpass filter (DBBPF) with quad‐section stepped‐impedance resonators (SIRs) capable of rejecting the annoying frequencies of the second and third harmonics in the dual‐band. The proposed DBBPF was applied in the design of a dual‐band PA using a packaged 10 W GaN transistor. The PA prototype maintained a peak power‐added efficiency (PAE) of 75.3% at the 1.84 GHz frequency and 64.5% at the 3.5 GHz frequency. For a continuous wave output power of 40.9 dBm, the measured gain was 13 dB in the two frequency bands. Linearized modulated measurements, concurrently using 10 MHz quadrature amplitude modulation (16 QAM) signals and worldwide interoperability for microwave access (WiMAX) signals, showed an average PAE of 48.5% and 39.8% and an adjacent channel leakage ratio of ?46 and ?45 dBc with an average output power of 37.8 and 36.8 dBm at the two frequency bands, respectively. This PA is used for wireless systems. It is especially useful in standard simultaneous global system for mobile (GSM) and WiMAX wireless systems.     

High‐efficiency broadband GaN HEMT power amplifier based on harmonic‐tuned matching approach

A new type of broadband class‐F power amplifier is proposed with GaN HEMT device CGH40010F. And a new harmonic control network is designed by improving the traditional harmonic control network, with the second harmonic and third harmonic broadband matched, which effectively solves the problem of class‐F power amplifier in the design of the bandwidth. To improve the efficiency of power amplifier, all high‐order harmonics are controlled in a certain bandwidth. CGH40010F power transistor is utilized to build the power amplifier working from 1.5 to 2.6 GHz, with the measured saturated output power >10 W, drain efficiency 60%‐80%, and gain >10 dB. The second and the third harmonic suppression levels are maintained from ?19.13 to ?47.44 dBc and from ?16.18 to ?47.9 dBc, respectively. The simulation and measurement results of the proposed power amplifier show good consistency.     

A novel direct matching network synthesis technique and its application to broadband class‐J power amplifier

A novel direct matching network (MN) synthesis method improving the conventional simplified real frequency technique (SRFT) is presented in this article. By straightforwardly optimize the characteristic impedance (physical width) and electrical length (physical length) of each distributed element in a preselected configuration, the proposed method has one more degree of design freedom by comparison with the SRFT, and therefore increases design flexibility and matching effects. To demonstrate its effectiveness, a broadband class‐J power amplifier (PA) is devised for which both the input and output MNs are realized using the proposed method. The simultaneous manipulation of fundamental and second harmonic impedances is successfully realized by defining a novel target function that indicates the degree of proximity for the realized impedances to the optimal transistor impedances. Comprehensive equations and complete design procedures of the new technique are given. The measured class‐J PA implemented for verification achieves an output power of 39.2 to 42.3 dBm and power‐added efficiency of 61.8% to 71.6% over the frequency range of 2.5 to 3.8 GHz using a 10‐W GaN HEMT. A 20‐MHz LTE‐A signal is employed to validate the linearization capability of this class‐J PA. An adjacent channel leakage ratio level around ?43.8 dBc is achieved after utilizing digital predistortion technique.     

Design scheme for broadband Doherty power amplifier using broadband load combiner

This article proposes a design strategy for broadband Doherty power amplifier (PA) using broadband load combiner. The bandwidth of the Doherty PA based on the proposed combiner using packaged transistor is about 2.5 times the bandwidth of conventional Doherty PA using a quarter‐wave transformer. An easy to implement analytical design methodology has been presented for the proposed load‐combiner while describing the bandwidth enhancement strategy. The design methodology is validated with the design of a broadband Doherty PA based on CREE 10 W packaged GaN high electron mobility transistor devices using the proposed load combiner. Measurement results show more than 45% drain efficiency at 6 dB output power back‐off (OPBO) over 400 MHz frequency range, centred around 1.95 GHz. The peak drain efficiency at saturation is better than 60% over this band of operation. At 6 dB OPBO, the maximum improvement of 18.5% in drain efficiency is achieved as compared to the balanced mode PA. Measurement with single carrier wideband code division multiple access modulated signal shows the average drain efficiency of more than 44% at 36.6 dBm average output power at center frequency of operation. The adjacent channel power ratio is better than ?45 dBc after applying digital predistortion. The circuit is realized with microstrip technology, which can be easily fabricated using conventional printed circuit processes. © 2015 Wiley Periodicals, Inc. Int J RF and Microwave CAE 25:655–674, 2015.     

Highly efficient broadband continuous inverse Class‐F power amplifier using multistage second harmonic control output matching network

A multistage second harmonic control output matching network is proposed in this article. Through the fundamental and harmonic impedance matching at multiple frequencies in the target band, the accuracy of the fundamental and harmonic impedance of the continuous power amplifier is improved. The efficiency is improved consequently. A highly efficient broadband continuous inverse Class‐F power amplifier based on this structure is designed and fabricated using a CGH40010F GaN HEMT packaged device. The measurement results demonstrate that drain efficiency of 71% to 82% and output power of 40.1 to 41.5 dBm is achieved with more than 10 dB gain across 1.35 to 2.35 GHz.     

Analysis and improvement of PSRR in an envelope‐tracking power amplifier using a common‐drain amplifier topology

A common‐drain power amplifier (PA) for envelope tracking systems is presented. In envelope tracking, the main PA operates mostly in compression and the power supply rejection ratio (PSRR) is not high. Furthermore, the output noise of the supply modulator can be mixed with the RF signal and generates out‐of‐band emissions. In this article, instead of using a common‐source topology, the PSRR of the envelope tracking PA is inherently improved by utilizing a common‐drain topology. A comprehensive analysis shows that the common‐drain topology is less sensitive to the supply noise, as compared to the conventional common‐source topology. The proposed common‐drain PA is implemented using a discrete LDMOS PD20010‐E RF transistor. Measurement results show that the PSRR of the proposed common‐drain PA is improved by up to 7 dB as compared to that of the common‐source PA. For a two‐tone input with 10 MHz bandwidth at the center frequency of 700 MHz, the power added efficiency (PAE) and IM3 of the envelope tracking common‐drain PA are 20% and ? 28 dBc, respectively, at an average output power of 33.4 dBm. The amplifier also shows a 12.4 dB power gain. Moreover, by utilizing the envelope tracking, the PAE is improved by more than 5%.     

Investigation on harmonic spur characteristics of hybrid integrated LDMOS and AlGaN/GaN power amplifiers at different temperatures

The harmonic spur characteristics of a hybrid integrated S‐band power amplifier (PA), consisting of both stages of LDMOSFET and AlGaN/GaN HEMT, are studied at different temperatures. The PA offers a peak output power of 50 dBm (100 W) with power added efficiency higher than 50%, and adjacent channel power ratio performance is less than ?30 dBc. A temperature test chamber is employed for measuring the harmonic spur of PA from 233 to 393 K, and its linear response to temperature is captured at high output power level.     

An X‐band push‐push oscillator with parallel feedback configuration designed by microstrip balanced bandpass filter

In this article, a push‐push oscillator with parallel feedback configuration designed by the microstrip balanced bandpass filter (BPF) is proposed. The push‐push oscillator consists of two sub‐oscillators with a balanced BPF. The balanced BPF with the open‐circuited stubs exhibits the desired differential‐mode frequency response and achieves high common‐mode suppression simultaneously. Based on the technique of the balanced BPF, the out‐of‐phase fundamental signals and odd harmonic signals are canceled out while the even harmonic signals are well combined. The prototype of the push‐push oscillator is designed and fabricated. Measured results show that the proposed push‐push oscillator works at 9.96 GHz of the second harmonic frequency. The actual output power is ?8.57 dBm. The rejection of the fundamental signal and third harmonic signal are better than 27 and 42 dBc, respectively. The phase noise of the proposed push‐push oscillator is ?128.3 dBc/Hz at 1 MHz frequency offset.     

Design of a high‐efficiency dual‐band class‐J/J power amplifier considering concurrent‐mode input drive

This article analyses concurrent dual‐band Class‐J/J power amplifiers (PAs) with simultaneous input drive at both bands. Although it is well known that the Class‐J PA has the same performance regarding the efficiency compared with the conventional Class‐B PA, in this article, we show that concurrent‐mode efficiency of Class‐J/J dual‐band power amplifier is higher than the Class‐B/B counterparts much closer to their single‐mode efficiency. Furthermore, it has been explained that the performance of concurrent operation of dual‐band PAs is highly dependent to the design space of PA load reactance at intermodulation terms. We also explore that at intermodulation frequencies the design space includes an efficiency degradation region occurring around a specific impedance, which should be avoided when designing for concurrent operation mode. The dependency of the concurrent‐mode efficiency to the nonlinearity performance of the transistor output capacitance is also considered. A concurrent dual‐band Class‐J/J PA operating at 1.842 and 2.655 GHz bands is implemented, where the harmonic and intermodulation control networks are designed based on closed‐form equations. Measured results reveal that about 60% balanced concurrent‐mode efficiency can be achieved, which outperforms recently reported counterparts. At the lower and upper bands, output powers of 41 and 40.5 dBm and efficiencies of 73.5% and 71.7% are obtained, respectively.     

Double octave L‐ and S‐band power amplifier utilizing broadside coupled impedance transformers

In this article, the recently revived impedance transformer, implemented as broad side coupled microstrip structure, is used to realize a double octave wideband power amplifier covering the L‐ and S‐band. Several parameters of the transformer, such as distance to a ground plane or permittivity of the dielectric surrounding the transformer are analyzed. The manufactured amplifier, using a commercial GaN HEMT transistor, achieved a continuous wave output power of 45 to 47 dBm and drain efficiency of 42 to 49 percent, respectively. To prove the usability of the concept, linearity measurements were performed, using LTE, WiMAX, and WCDMA signals with up to 10 MHz bandwidth at several center frequencies. ACLR results of ?45 dBc are achieved using linearization, as well as an average PAE of up to 29 percent. © 2015 Wiley Periodicals, Inc. Int J RF and Microwave CAE 26:209–216, 2016.     

A highly efficient PA design for WiMAX applications: Theory and experiment

Efficiency in microwave power amplifiers (PAs) is limited by the active device parameters and operating conditions. High values can be obtained by a proper selection of bias point and harmonic terminations or, from a different point of view, by a proper output voltage and/or current waveform shaping. This work outlines the mathematical statements for the proper design of a second harmonic tuning (HT) PA. To validate the theory, the design of a highly efficient 3.5 (WiMAX applications) GHz GaN HEMT PA based on second HT is presented. The measured performances confirm the improvement obtained by means of harmonic manipulation over Class AB tuned load or Class J PAs. An output power of 35.3 dBm has been measured for a maximum of power‐added efficiency of around 58% (drain efficiency 69.2%) with a IMD₃ of 19.1 dBc. © 2010 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2010.     

Efficiency‐enhanced Doherty power amplifier using Chireix‐like compensation technology

This article presents a novel efficiency‐enhanced Doherty power amplifier (DPA) by using a Chireix‐like compensation technique. This technique introduces a compensation circuit structure at the combiner to offset the phase difference effect of a DPA for enhancing drain efficiency. A DPA based on the proposed structure is fabricated with two 10 W GaN high electron mobility transistor (HEMT) transistors. The fabricated DPA with such proposed compensation structure manifests a measured saturated output power of 43.5 dBm and drain efficiency of 68% to 71% in the frequency range of 3.2 to 3.7 GHz. Forty‐five percent of drain efficiency can be achieved at 6 dB power back‐off. And the adjacent channel leakage ratio (ACLR) is better than ?48.6 dBc with digital predistortion.     

A millimeter‐wave CMOS power amplifier design using high‐Q slow‐wave transmission lines

A three‐stage 60‐GHz power amplifier (PA) has been implemented in a 65 nm Complementary Metal Oxide Semiconductor (CMOS) technology. High‐quality‐factor slow‐wave coplanar waveguides (S‐CPW) were used for input, output and inter‐stage matching networks to improve the performance. Being biased for Class‐A operation, the PA exhibits a measured power gain G of 18.3 dB at the working frequency, with a 3‐dB bandwidth of 8.5 GHz. The measured 1‐dB output compression point (OCP_1dB) and the maximum saturated output power P_sat are 12 dBm and 14.2 dBm, respectively, with a DC power consumption of 156 mW under 1.2 V voltage supply. The measured peak power added efficiency PAE is 16%. The die area is 0.52 mm² (875 × 600 μm²) including all the pads, whereas the effective area is only 0.24 mm². In addition, the performance improvement of the PA in terms of G, OCP_1dB, P_sat, PAE and the figure of merit using S‐CPW instead of thin film microstrip have been demonstrated. © 2015 Wiley Periodicals, Inc. Int J RF and Microwave CAE 26:99–109, 2016.     

Efficiency enhancement by employing the transistor nonlinear capacitors effects in a 6W hybrid X‐band Class‐J power amplifier

This article presents the design and fabrication of a 6 W X‐band hybrid Class‐J power amplifier (PA) based on a bare die GaN on SiC HEMT by accurate implementing the transistor nonlinear capacitor effects. The transistor input capacitor is precisely modelled and its nonlinearity effects on Class‐J performance is studied for the first time. It is shown that the harmonic generation property of the nonlinear input capacitor, especially at the second harmonic, can be of benefit to shape the transistor gate voltage as a quasi‐half wave sinusoidal waveform and consequently, it can improve the power added efficiency (PAE). A complete 3D thermal model of the power transistor is developed using ANSYS software and it is calibrated based on the thermal measured data. The PA achieves 13 dB average power gain over the frequency range of 8.8‐9.6 GHz. The drain efficiency and PAE are about 67% and 58% at 9.2 GHz, respectively.     

Realization of a VCO for WLAN applications using 0.35 μm‐siGe BICMOS technology

In this article, a 4.5–5.8 GHz, ?G_m LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is designed with Austria MicroSystems 0.35 μm SiGe BiCMOS process that includes high‐speed SiGe heterojunction bipolar transistors (HBTs). According to measurement results, phase noise is ?102.3 dBc/Hz at 1 MHz offset from 5 GHz carrier frequency. A linear, 1300 MHz tuning range is obtained utilizing accumulation‐mode varactors. Phase noise is relatively low because of the advantage of differential tuning concept. Output power of the fundamental frequency changes between ?1.6 and 0.9 dBm depending on the tuning voltage. Average second and third harmonic levels are ?25 and ?41 dBm, respectively. The circuit draws 14 mA DC current from 3.3 V supply including buffer circuits leading to a total power dissipation of 46.2 mW. The prototype VCO occupies an area of 0.6 mm² on Si substrate, including DC and RF pads. © 2008 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2008.     

Analysis and design of a novel concurrent Class B/J continuum power amplifier

In this paper, a novel concurrent Class B/J continuum mode is presented based on waveform shaping of current and voltage. The behavior characteristics and performances of power amplifiers (PAs) in concurrent dual‐band mode are investigated in detail. According to the analysis of proposed concurrent mode, the optimal load impedances at fundamental, harmonic and intermodulation (IM) frequencies are related to the magnitude ratio of the two carriers. Comparing with concurrent Class‐B mode, two parameters α, β can be configured independently in the proposed concurrent mode, which provides more freedom and flexibility for design without output power and drain efficiency degradation. In order to verify the proposed theory, a 1.9/2.35 GHz dual‐band power amplifier based on proposed concurrent mode is designed, fabricated and measured. Experimental results show that when the PA is driven by two 10 MHz LTE signals concurrently with total 9.2 dB peak‐to‐average power ratio (PAPR), the total average power is 36.0 dBm with 40.6% drain efficiency, which indicates a good concurrent performance.     

A 200 W broadband high power amplifier using hybrid power combining network and digital level control

In this article, a 2 to 6 GHz solid‐state power amplifier with 53 dBm output power has been analyzed, designed, and fabricated. To achieve a wideband high output power, we introduce a 16‐way hybrid power combiner based on microstrip planar binary and parallel structures. The simulation and measurement results of the proposed hybrid power combining network (PCN) show that the maximum power combining efficiency is around 86% with the insertion loss of around 0.6 to 1.5 dB and an isolation of 20 dB between the ports. Also, to compensate the output power variations due to the thermal and operating frequency changes across the bandwidth, a digital level control (DLC) unit utilizing an agile control algorithm is proposed which decreases the output power variations to 2% of the desired output power. A cooling heatsink fan system has been also designed in order to transfer the heat generated power to the air. The measured output power for the applied input continuous wave is higher than 52.5 dBm. In addition, the power added efficiency (PAE) is better than 15% across the wide portion of the bandwidth and the measured third‐order intermodulation is about 20 dBc (average).     

Performance comparison of a single and multiband power amplifiers using IHP 0.25 μm SIGe HBT technology

In this work, a single‐band power amplifier (PA) with a fixed‐frequency/band output matching network and multiband PA with a switch‐tuned output matching network is designed, using IHP (Innovations for High Performance), 0.25 μm‐SiGe HBT process. The behavior of the amplifiers has been optimized for 2.4 GHz (WLAN), 3.6 GHz (UWB‐WiMAX), and 5.4 GHz (WLAN) frequency bands for a higher 1‐dB compression point and efficiency. Multiband characteristics of the amplifier were obtained by using a MOS‐based switching network. Two MOS switches were used for tuning the band of the output matching network. Postlayout simulations of the multiband‐PA provided the following performance parameters: 1‐dB compression point of 25.2 dBm, gain value of 36 dB, efficiency value of 12.8% operation and maximum output power of 26.8 dBm for the 2.4 GHz WLAN band, 1‐dB compression point of 25.5 dBm, gain value of 32 dB, efficiency value of 13.3% and maximum output power of 26.6 dBm for the 3.6 GHz UWB‐WiMAX band and 1‐dB compression point of 24.8 dBm, gain value of 23 dB, efficiency value of 12.5% and maximum output power of 26.3 dBm for the 5.4 GHz WLAN band. For the fixed‐band, at 3.6 GHz, the postlayout simulations resulted the following parameters: 1‐dB compression point of 25.5 dBm, gain value of 32 dB, efficiency value of 18% and maximum output power value of 26.8 dBm. Measurement results of the single‐band PA provided the following performance parameters: 1‐dB compression point of 20.5 dBm, gain value of 23 dB and efficiency value of 7% operation for the 2.4 GHz band; 1‐dB compression point of 25.5 dBm, gain value of 31.5 dB and efficiency value of 17.5% for the 3.6 GHz band; 1‐dB compression point of 22.4 dBm, gain value of 24.4 dB and efficiency value of 9.5% for the 5.4 GHz band. Measurement results show that using multistage topologies and implementing each parasitic as part of the matching network component has provided a wider‐band operation with higher output power levels, above 25 dBm, with SiGe:C process. These results proved that the PA, with switching/tunable output matching network, provides compatible performance parameters, when compared with the fixed‐band PA. The ability of being capable of operation in different frequency bands with compatible performance parameters, when compared with fixed‐band PA, multiband PA can be realized with additional less parasitics, area, and cost advantages. © 2009 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2009.     

Investigation of load modulated inverse Class‐F power amplifier with extended conduction angle

A novel design space of load modulated (LM) inverse Class‐F power amplifiers (PAs) with extended conduction angle is proposed. The effects of the driven level factor β and the biasing operation factor ρ on the third‐harmonic generation are discussed. The harmonic generation mechanism shows that the knee voltage effects are the source of third‐harmonics for LM inverse Class‐F PAs. The definition of the inverse Class‐F mode is consistently valid under the circumstance of load modulation in a limited output power back‐off (OPBO) range. Meanwhile, the conduction angle θ₀ can be extended from π/2 to a limited value (<110°) to keep the standard waveforms of inverse Class‐F mode and maintain high efficiency. After introducing the “continuous concept” and the second harmonic manipulation method, the mathematical design space of inverse Class‐F PAs with extended conduction angle is derived. Calculation shows that the purely conductive load modulation can enable high back‐off efficiency operation for LM inverse Class‐F PAs. As proof of concept, a demonstrator amplifier is fabricated and measured. The experimental results show that the power added efficiency (PAE) with optimum V_ctrl is improved by 5% over an OPBO range of 6 dB compared with the same PA with fixed V_ctrl.     

High isolation microstrip GaN‐HEMT Single‐FET Switch

In this contribution an analytical approach to the design of high‐isolation microwave transmission line‐resonated switches is presented. Simulated and measured performance of a GaN HEMT single‐FET switch cell topology and the one of a complete SPDT using the proposed approach are presented to demonstrate the approach feasibility and effectiveness. The resulting SPDT, operating at X Band, is featured by 1 dB insertion loss, isolation better than 37 dB all over the operating bandwidth and a power handling capability higher than 39 dBm. © 2010 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2010.