A multiband carrier generation architecture for UHF, 2.4 GHz,and 5 GHz ISM applications

Novel multiband carrier generation architecture is proposed that can be applicable for RFID reader, WLAN 802.11a‐b‐g, and ZigBee sensor network, and implemented with 0.18 μm CMOS technology. In the proposed architecture, a quadrature voltage controlled oscillator (QVCO) is implemented by coupling two differential cross‐coupled LC VCOs to generate in‐phase (I) and quadrature (Q) signals operating at one‐thirds of the 5 GHz frequency range. As well, the differential second harmonic signal of the VCO core frequency is generated by mixers, and then converted to I/Q signals via a single‐stage tunable polyphase filter. By single sideband mixing of the I/Q signals of the QVCO and the polyphase filter, a cleaner carrier signal can be generated in the frequency band of 5 GHz. By including extra frequency dividers, the architecture can also be reconfigured to generate UHF band and 2.4 GHz band. The proposed architecture draws about 32 mA including the QVCO core current consumption of 2.8 mA from 1.8 V supply. The measured tuning frequency of the QVCO core ranges from 1.57 to 1.84 GHz. The measured phase noise is ?104.5 dBc/Hz at 1 MHz offset from 4.84 GHz. The chip layout occupies an area of 1.44 × 1.4 mm² on Si substrate, including the DC and RF pads. © 2008 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2009.     

Low power current-mode voltage controlled oscillator for 2.4 GHz wireless applications

In this paper, a new Complementary Metal Oxide Semiconductor (CMOS) low power Quadrature Voltage Controlled Oscillator (QVCO) based on Chartered 0.18 μm Radio frequency (RF) CMOS technology for 2.4 GHz IEEE 802.11b Wireless Local Area Networks (WLAN) applications is presented. Two explicit quadrature outputs can be realized at high impedance terminals of the QVCO, and it can be cascaded directly to the next stage of a communication system without any matching conditions. The post-layout simulation results show that the oscillation frequency of the QVCO can be tuned from 1.8 GHz to 2.4 GHz by changing the control voltage.     

Dual‐band rotary standing‐wave voltage‐controlled oscillator

In this article, a dual‐band rotary standing‐wave oscillator (RSWO) is introduced that generates sinusoidal signals by the formation of a standing wave on a ring (closed‐loop)‐distributed composite right/left‐handed (CRL) Inductor‐Capacitor (LC) transmission line network. The LC network consists of four unit cells of CRL LC resonator stacked in series, and two pairs of cross‐coupled transistors are used to compensate for the loss of LC resonator. Varactors are used as the control to switch on/off the high‐ or low‐frequency bands. In the fundamental mode, the RSWO operates at the high‐frequency band. In the harmonic mode, the oscillator provides low‐frequency band outputs. The dual‐band function exploits the multiple oscillation modes of the CRL RSWO. The proposed RSWO has been implemented with the Taiwan Semiconductor Manufacturing Company, Limited (TSMC) 0.18‐μm SiGe BiCMOS technology. It can generate differential signals in the high‐band frequency range of 6.73–8.60 GHz and in the low‐band frequency range of 3.68–3.73 GHz. The die area of the RSWO is 1.123 × 1.123 mm². © 2014 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:536–543, 2014.     

Poststress RF‐drifts of dual‐band LC VCO in 0.18‐μm CMOS technology

This article studies the RF‐property of a dual‐band voltage‐controlled oscillator (VCO). The designed circuit consists of a dual‐resonance LC resonator and a Colpitts negative resistance cell. The dual‐resonance LC resonator comprises a series‐tuned LC resonator and a parallel resonant resonator. The proposed VCO has been implemented with the TSMC 0.18 μm 1P6M CMOS technology. The VCO can generate differential signals in the frequency range of 3.0–3.37 GHz and 6.95–7.40 GHz with core power consumption of 10.08 and 10.24 mW at the dc drain‐source bias V_DD of 1.4 V, respectively. The die area of the dual‐band VCO is 0.485 × 0.800 mm². The circuit was operated at V_DD = 3 V for 8 h and significant drift in RF parameters was found. © 2013 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:243–248, 2014.     

2．4GHz低相位噪声CMOS负阻LC压控振荡器设计

为了有效降低工作于射频段的全集成CMOS负阻LC压控振荡器的相位噪声．介绍了利用电阻电容滤波技术对振荡器相位噪声的优化,并采用Chartered 0．35μm CMOS标准工艺设计了一款全集成CMOS负阻LC压控振荡器,其中心频率为2.4GHz,频率调谐范围达到300MHz,在3．3V电压下工作时,静态电流为12mA,在偏离中心频率600kHz处,仿真得到的相位噪声为-121dBc／Hz。该设计有效地验证了电阻电容滤波技术对相位噪声的优化效果,并为全集成低相位噪声CMOS负阻LC压控振荡器的设计提供了一种参考电路。     

High‐performance vacuum‐processed metal oxide thin‐film transistors: A review of recent developments

Since 2010, vacuum‐processed oxide semiconductors have greatly improved with the publication of more than 1,300 related papers. Although the number of researches on oxide semiconductors has continued to increase year by year, the average field‐effect mobility of oxide semiconductor thin‐film transistors (TFTs) has not shown significant improvement; from 2010 to 2018; the average field‐effect mobility of vacuum‐processed n‐type oxide TFTs is around 20 cm²/Vs. To investigate the obstacles for performance improvements, the latest progress and researches on vacuum‐processed oxide semiconductor TFTs for high performance over the past decade are highlighted, along with the pros and cons of each technology. Finally, complementary metal oxide semiconductor (CMOS) logic circuits composed of both n‐ and p‐type oxide semiconductor TFTs are introduced, and future prospects for this state‐of‐the‐art research on the oxide semiconductors are presented.     

Effect of guard‐ring on the DC and high‐frequency performance of deep‐submicrometer metal oxide semiconductor field effect transistor

The influence of guard‐ring (GR) on the direct current (DC) and high‐frequency performance of deep‐submicrometer metal oxide semiconductor field effect transistors (MOSFETs) is investigated in this study. MOSFETs with four different GRs are fabricated using 90 nm complementary metal oxide semiconductor (CMOS) process, and a detailed comparative study on their device performances is performed. A united DC and small signal equivalent circuit model that takes into the effect of GR is developed. A set of simple, but efficient formulas provide a bidirectional bridge for the S parameters transformation between devices with different GRs. The corresponding model parameters for MOSFETs with different GRs are determined from S parameter on‐wafer measurement up to 40 GHz. © 2013 Wiley Periodicals, Inc. Int J RF and Microwave CAE 24:259–267, 2014.     

Impact of bending on flexible metal oxide TFTs and oscillator circuits

Thin‐film circuits on plastic capable of high‐frequency signal generation have important applications in large‐area, flexible hybrid systems, enabling efficient wireless transmission of power and information. We explore oscillator circuits using zinc‐oxide thin‐film transistors (ZnO TFTs) deposited by the conformal, layer‐by‐layer growth technique of plasma‐enhanced atomic layer deposition. TFTs on three substrates—glass, 50‐µm‐thick freestanding polyimide, and 3.5‐µm‐thick spin‐cast polyimide—are evaluated to identify the best candidate for high‐frequency flexible oscillators. We find that TFTs on ultrathin plastic can endure bending to smaller radii than TFTs on commercial 50‐µm‐thick freestanding polyimide, and their superior dimensional stability furthermore allows for smaller gate resistances and device capacitances. Oscillators on ultrathin plastic with minimized parasitics achieve oscillation frequencies as high as 17 MHz, well above the cutoff frequency f_T. Lastly, we observe a bending radius dependence of oscillation frequency for flexible TFT oscillators and examine how mitigating device parasitics benefits the oscillator frequency versus power consumption tradeoff.     

An analytic method of microwave bipolar single‐frequency and voltage‐controlled oscillator design

An analytic method of microwave bipolar oscillator design, allowing one to define explicit expressions for optimum values of feedback elements and load through bipolar transistor Z‐parameters, is developed. A negative resistance concept is utilized to design series feedback microwave bipolar oscillator with optimized feedback elements and maximum output power in terms of the transistor impedance parameters. The design of the wideband common‐base bipolar voltage controlled oscillators (VCOs) is also presented. Numerical and experimental results verify the validity of the design methods described. ©1999 John Wiley & Sons, Inc. Int J RF and Microwave CAE 9: 403–414, 1999.     

Current conveyors based allpass filters and quadrature oscillators employing grounded capacitors and resistors

Six quadrature oscillator (QO) circuits are proposed. They are implemented through the proposed second-generation current conveyors (CCIIs) based high input impedance first-order allpass filters and the integrators as the building blocks. Outputs of two sinusoids with 90° phase difference are available in each of the proposed quadrature oscillators. The oscillation condition and oscillation frequency of each proposed quadrature oscillator are independently controllable through grounded resistors. All proposed circuits employ only grounded capacitors and resistors. The use of only grounded capacitors and resistors is ideal for integration. Experimental results are also included.     

基于EDA技术的压控LC振荡器的设计与实现

根据压控LC振荡器的基本原理,提出了以EDA(Electronic Design Automation,电子设计自动化)软件MAX PLUSⅡ为基础压控LC振荡器设计的技术方案,详细阐述了系统的设计要求、设计技巧、设计方案,并进行了系统仿真和硬件测试。     

Realization of a VCO for WLAN applications using 0.35 μm‐siGe BICMOS technology

In this article, a 4.5–5.8 GHz, ?G_m LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is designed with Austria MicroSystems 0.35 μm SiGe BiCMOS process that includes high‐speed SiGe heterojunction bipolar transistors (HBTs). According to measurement results, phase noise is ?102.3 dBc/Hz at 1 MHz offset from 5 GHz carrier frequency. A linear, 1300 MHz tuning range is obtained utilizing accumulation‐mode varactors. Phase noise is relatively low because of the advantage of differential tuning concept. Output power of the fundamental frequency changes between ?1.6 and 0.9 dBm depending on the tuning voltage. Average second and third harmonic levels are ?25 and ?41 dBm, respectively. The circuit draws 14 mA DC current from 3.3 V supply including buffer circuits leading to a total power dissipation of 46.2 mW. The prototype VCO occupies an area of 0.6 mm² on Si substrate, including DC and RF pads. © 2008 Wiley Periodicals, Inc. Int J RF and Microwave CAE, 2008.     

Circuits and AMOLED display with self‐aligned a‐IGZO TFTs on polyimide foil

A process to make self‐aligned top‐gate amorphous indium‐gallium‐zinc‐oxide (a‐IGZO) thin‐film transistors (TFTs) on polyimide foil is presented. The source/drain (S/D) region's parasitic resistance reduced during the SiN interlayer deposition step. The sheet resistivity of S/D region after exposure to SiN interlayer deposition decreased to 1.5 kΩ/□. TFTs show field‐effect mobility of 12.0 cm²/(V.s), sub‐threshold slope of 0.5 V/decade, and current ratio (I_ON/OFF) of >10⁷. The threshold voltage shifts of the TFTs were 0.5 V in positive (+1.0 MV/cm) bias direction and 1.5 V in negative (?1.0 MV/cm) bias direction after extended stressing time of 10⁴ s. We achieve a stage‐delay of ~19.6 ns at V_DD = 20 V measured in a 41‐stage ring oscillator. A top‐emitting quarter‐quarter‐video‐graphics‐array active‐matrix organic light‐emitting diode display with 85 ppi (pixels per inch) resolution has been realized using only five lithographic mask steps. For operation at 6 V supply voltage (V_DD), the brightness of the display exceeds 150 cd/m².     

Top‐emission AMOLED display driven by organic TFTs with semiconductor layer patterned by inkjet process

We have developed an inkjet process for laying down an organic semiconductor layer in organic thin‐film transistors (OTFTs). The organic semiconductor crystallinity was improved by adjusting the contact angles of the bank, the gate insulator, and the source/drain electrodes. The threshold voltage of the OTFT was controlled by means of several surface treatments of the silicon dioxide gate insulator. The OTFTs showed a high mobility of 2.5 cm²/Vs and uniform threshold voltages of ?0.4 ± 0.7 V. We also fabricated a 4‐in., 80‐ppi active‐matrix organic light‐emitting diode on a glass substrate that showed good luminance uniformity and high moving picture quality.     

基于电流控制模式的低压、高PSRR基准源

基于可调电流控制模式设计出一种低压、高电源抑制比的带隙基准电压源电路。采用电流控制模式和多反馈环路,提高电路的整体电源抑制比;通过电阻分压的方式,使电路达到低压,同时提供偏压,简化偏置电路。采用0.5μmCMOS N阱工艺,电路可在电源电压为1.5V时正常工作。使用Cadence Spectre进行仿真结果表明,低频时电源抑制比(PSRR)高达107dB。-10℃～125℃温度范围内,平均温度系数约7.17ppm/℃,功耗仅为0.525mW。此电路能有效地抑制制程变异。     

用于无线卫星通信网络系统的抑噪分频频率综合器设计

为改善传统综合器在噪声影响下分频效果差的问题,设计了用于无线卫星通信网络系统的抑噪分频频率综合器。根据抑噪分频频率综合器总体架构,设计压控振荡器,并选用MAOC-114850芯片作为压控振荡器核心芯片,依据LC压控振荡器原理电路,将压控可变电抗元件插入输入频率原件中,控制输入控制电压和振动频率,通过改变电容器的充电速率,使产生的电流源在电压控制之内。选用MB506 直插/DIP8 超高频预分频器芯片作为预分频器的核心芯片,经过多次4分频操作定制数字电路。根据环路滤波器的片上集成设计要求,采用三阶无源环路滤波器,改善电阻与电容间的相位裕度,抑噪制声。增加控制模块,限定压控振荡器的最小振荡频率范围,根据晶振参考频率确定跳频间隔,并将结果保存到分频频率综合器中,由此完成抑噪分频频率综合器设计。实验结果表明,该综合器最高分频效率可达到98%,为无线卫星通信网络系统稳定运行提供保障     

Solution‐processed and low‐temperature metal oxide n‐channel thin‐film transistors and low‐voltage complementary circuitry on large‐area flexible polyimide foil

High‐performance solution‐based n‐type metal oxide thin‐film transistors (TFTs), fabricated directly on polyimide foil at a post‐annealing temperature of only 250 °C, are realized and reported. Saturation mobilities exceeding 2 cm²/(Vs) and on‐to‐off current ratios up to 10⁸ are achieved. The usage of these oxide n‐type TFTs as the pixel drive and select transistors in future flexible active‐matrix organic light‐emitting diode (AMOLED) displays is proposed. With these oxide n‐type TFTs, fast and low‐voltage n‐type only flexible circuitry is demonstrated. Furthermore, a complete 8‐bit radio‐frequency identification transponder chip on foil has been fabricated and measured, to prove that these oxide n‐type TFTs have reached already a high level of yield and reliability. The integration of the same solution‐based oxide n‐type TFTs with organic p‐type TFTs into hybrid complementary circuitry on polyimide foil is demonstrated. A comparison between both the n‐type only and complementary elementary circuitry shows the high potential of this hybrid complementary technology for future line‐drive circuitry embedded at the borders of flexible AMOLED displays.     

Chemical and electrical stabilities of organic thin‐film transistors for display application

Abstract— The chemical and electrical stabilities of pentacene organic thin‐film transistors (OTFTs) fabricated on plastic by a self‐organized process was studied. The degradation in on‐current, threshold voltage, and field‐effect mobility of the OTFT under air exposure can be expressed in exponential form in time and can be reduced by using multilayer passivation on the organic semiconductor, which reduces the penetration of H₂O and O₂ into the pentacene. The threshold voltage degrades during negative gate bias stress, which can be reduced significantly by optimizing the organic gate insulator used for the OTFT. A stable OTFT can be fabricated by using the proper organic gate insulator.     

A frame‐based EM‐simulation for design of LC oscillator with MoM capacitor banks

This article presents a simulation method for the design of a digitally controlled oscillator (DCO). Electromagnetic (EM) simulations are essential and inevitable for modern LC oscillator design. Although EM‐simulators provide high accuracy, the EM‐simulation time is very long when metal‐oxide‐metal (MoM) capacitors are present. The proposed frame‐based EM‐simulation can significantly reduce the EM‐simulation time even in the presence of MoM capacitors without influencing the accuracy. To verify the proposed method, a DCO was fabricated using a 55‐nm CMOS process. Measurements of the DCO are in good agreement with the frame‐based post‐layout simulation results. In addition, the DCO has good performances with a low power consumption of approximately 0.68 mW.     

MOSFET‐C‐based grounded active inductors with electronically tunable properties

In this study, two new grounded metal oxide semiconductor field effect transistor (MOSFET)‐C active inductors (AIs) are proposed. The proposed AIs contain only eight MOS transistors and a single grounded capacitor that is attractive for integrated circuit fabrication. Inductance values of them can be electronically tuned by a single control voltage. They do not include any current sources. Therefore, the designs of the proposed AIs are simple and useful. They do not suffer from body effects. Hence, they can be designed with low power supply voltages. Simulation results by using the Cadence analog environment program with 180 nm Taiwan Semiconductor Manufacturing Company (TSMC) nm technology parameters are carried out to indicate the performance of them. Layouts of both proposed AIs occupy the same area of about 78 μm × 78 μm. Postlayout simulation results are given to confirm the validity of the theoretical analysis.