A 160-GHz f/sub T/ and 140-GHz f/sub MAX/ submicrometer InP DHBT in MBE regrown-emitter technology

We report a 0.7/spl times/8 /spl mu/m/sup 2/ InAlAs-InGaAs-InP double heterojunction bipolar transistor, fabricated in a molecular-beam epitaxy (MBE) regrown-emitter technology, exhibiting 160 GHz f/sub T/ and 140 GHz f/sub MAX/. These initial results are the first known RF results for a nonselective regrown-emitter heterojunction bipolar transistor, and the fastest ever reported using a regrown base-emitter heterojunction. The maximum current density is J/sub E/=8/spl times/10/sup 5/ A/cm/sup 2/ and the collector breakdown voltage V/sub CEO/ is 6 V for a 1500-/spl Aring/ collector. In this technology, the dimension of base-emitter junction has been scaled to an area as low as 0.3/spl times/4 /spl mu/m/sup 2/ while a larger-area extrinsic emitter maintains lower emitter access resistance. Furthermore, the application of a refractory metal (Ti-W) base contact beneath the extrinsic emitter regrowth achieves a fully self-aligned device topology.     

A 183 GHz f/sub T/ and 165 GHz f/sub max/ regrown-emitter DHBT with abrupt InP emitter

Small-area regrown emitter-base junction InP/In-GaAs/InP double heterojunction bipolar transistors (DHBT) using an abrupt InP emitter are presented for the first time. In a device with emitter-base junction area of 0.7 /spl times/ 8 /spl mu/m/sup 2/, a maximum 183 GHz f/sub T/ and 165 GHz f/sub max/ are exhibited. To our knowledge, this is the highest reported bandwidth for a III-V bipolar transistor utilizing emitter regrowth. The emitter current density is 6/spl times/10/sup 5/ A/cm/sup 2/ at V/sub CE,sat/ = 1.5 V. The small-signal current gain h/sub 21/ = 17, while collector breakdown voltage is near 6 V for the 1500-/spl Aring/-thick collector. The emitter structure, created by nonselective molecular beam epitaxy regrowth, combines a small-area emitter-base junction and a larger-area extrinsic emitter contact, and is similar in structure to that of a SiGe HBT. The higher f/sub T/ and f/sub max/ compared to previously reported devices are achieved by simplified regrowth using an InP emitter and by improvements to the regrowth surface preparation process.     

Graded base type-II InP/GaAsSb DHBT with f/sub T/=475 GHz

The first demonstration of a type-II InP/GaAsSb double heterojunction bipolar transistor (DHBT) with a compositionally graded InGaAsSb to GaAsSb base layer is presented. A device with a 0.4/spl times/6 /spl mu/m/sup 2/ emitter dimensions achieves peak f/sub T/ of 475 GHz (f/sub MAX/=265 GHz) with current density at peak f/sub T/ exceeding 12 mA//spl mu/m/sup 2/. The structure consists of a 25-nm InGaAsSb/GaAsSb graded base layer and 65-nm InP collector grown by MBE with breakdown voltage /spl sim/4 V which demonstrates the vertical scaling versus breakdown advantage over type-I DHBTs.     

Self-aligned InP DHBT with f/sub /spl tau// and f/sub max/ over 300 GHz in a new manufacturable technology

We report self-aligned indium-phosphide double-heterojunction bipolar transistor devices in a new manufacturable technology with both cutoff frequency (f/sub /spl tau//) and maximum oscillation frequency (f/sub max/) over 300 GHz and open-base breakdown voltage (BV/sub ceo/) over 4 V. Logic circuits fabricated using these devices in a production integrated-circuit process achieved a current-mode logic ring-oscillator gate delay of 1.95 ps and an emitter-coupled logic static-divider frequency of 152 GHz, both of which closely matched model-based circuit simulations.     

Self-aligned SiGe NPN transistors with 285 GHz f/sub MAX/ and 207 GHz f/sub T/ in a manufacturable technology

This paper reports on SiGe NPN HBTs with unity gain cutoff frequency (f_T) of 207 GHz and an f_MAX extrapolated from Mason's unilateral gain of 285 GHz. f_MAX extrapolated from maximum available gain is 194 GHz. Transistors sized 0.12×2.5 μm² have these characteristics at a linear current of 1.0 mA/μm (8.3 mA/μm²). Smaller transistors (0.12×0.5 μm²) have an f_T of 180 GHz at 800 μA current. The devices have a pinched base sheet resistance of 2.5 kΩ/sq. and an open-base breakdown voltage BV_CEO of 1.7 V. The improved performance is a result of a new self-aligned device structure that minimizes parasitic resistance and capacitance without affecting f_T at small lateral dimensions     

Diamond FET using high-quality polycrystalline diamond with f/sub T/ of 45 GHz and f/sub max/ of 120 GHz

Using high-quality polycrystalline chemical-vapor-deposited diamond films with large grains (/spl sim/100 /spl mu/m), field effect transistors (FETs) with gate lengths of 0.1 /spl mu/m were fabricated. From the RF characteristics, the maximum transition frequency f/sub T/ and the maximum frequency of oscillation f/sub max/ were /spl sim/ 45 and /spl sim/ 120 GHz, respectively. The f/sub T/ and f/sub max/ values are much higher than the highest values for single-crystalline diamond FETs. The dc characteristics of the FET showed a drain-current density I/sub DS/ of 550 mA/mm at gate-source voltage V/sub GS/ of -3.5 V and a maximum transconductance g/sub m/ of 143 mS/mm at drain voltage V/sub DS/ of -8 V. These results indicate that the high-quality polycrystalline diamond film, whose maximum size is 4 in at present, is a most promising substrate for diamond electronic devices.     

Over 300 GHz f/sub T/ and f/sub max/ InP/InGaAs double heterojunction bipolar transistors with a thin pseudomorphic base

Describes 150-nm-thick collector InP-based double heterojunction bipolar transistors with two types of thin pseudomorphic bases for achieving high f/sub T/ and f/sub max/. The collector current blocking is suppressed by the compositionally step-graded collector structure even at J/sub C/ of over 1000 kA/cm/sup 2/ with practical breakdown characteristics. An HBT with a 20-nm-thick base achieves a record f/sub T/ of 351 GHz at high J/sub C/ of 667 kA/cm/sup 2/, and a 30-nm-base HBT achieves a high value of 329 GHz for both f/sub T/ and f/sub max/. An equivalent circuit analysis suggests that the extremely small carrier-transit-delay contributes to the ultrahigh f/sub T/.     

15-nm base type-II InP/GaAsSb/InP DHBTs with F/sub T/=384 GHz and a 6-V BV/sub CEO/

Type-II InP/GaAsSb/InP double heterojunction bipolar transistors (DHBTs) with a 15-nm base were fabricated by contact lithography: 0.73/spl times/11 /spl mu/m/sup 2/ emitter devices feature f/sub T/=384GHz (f/sub MAX/=262GHz) and BV/sub CEO/=6V. This is the highest f/sub T/ ever reported for InP/GaAsSb DHBTs, and an "all-technology" record f/sub T//spl times/BV/sub CEO/ product of 2304 GHz/spl middot/V. This result is credited to the favorable scaling of InP/GaAsSb/InP DHBT breakdown voltages (BV/sub CEO/) in thin collector structures.     

AlGaN/GaN MIS-HFETs with f/sub T/ of 163 GHz using cat-CVD SiN gate-insulating and passivation Layers

Al/sub 0.4/Ga/sub 0.6/N/GaN heterostructure field-effect transistors (HFETs) with an AlGaN barrier thickness of 8 nm and a gate length (L/sub G/) of 0.06-0.2 /spl mu/m were fabricated on a sapphire substrate. We employed two novel techniques, which were thin, high-Al-composition AlGaN barrier layers and SiN gate-insulating, passivation layers formed by catalytic chemical vapor deposition, to enhance high-frequency device characteristics by suppressing the short channel effect. The HFETs with L/sub G/=0.06-0.2 /spl mu/m had a maximum drain current density of 1.17-1.24 A/mm at a gate bias of +1.0 V and a peak extrinsic transconductance of 305-417 mS/mm. The current-gain cutoff frequency (f/sub T/) was 163 GHz, which is the highest value to have been reported for GaN HFETs. The maximum oscillation frequency (f/sub max/) was also high, and its value derived from the maximum stable gain or unilateral gain was 192 or 163 GHz, respectively.     

Vertical scaling of 0.25-/spl mu/m emitter InP/InGaAs single heterojunction bipolar transistors with f/sub T/ of 452 GHz

Vertical scaling of the epitaxial structure has allowed submicron InP/InGaAs-based single heterojunction bipolar transistors (SHBTs) to achieve record high-frequency performance. The 0.25/spl times/16 /spl mu/m/sup 2/ transistors, featuring a 25-nm base and a 100-nm collector, display current gain cut-off frequencies f/sub T/ of 452 GHz. The devices operate at current densities above 1000 kA/cm/sup 2/ and have BV/sub CEO/ breakdowns of 2.1 V. A detailed analysis of device radio frequency (RF) parameters, and delay components with respect to scaling of the collector thickness is presented.     

50-nm T-gate metamorphic GaAs HEMTs with f/sub T/ of 440 GHz and noise figure of 0.7 dB at 26 GHz

GaAs-based transistors with the highest f/sub T/ and lowest noise figure reported to date are presented in this letter. A 50-nm T-gate In/sub 0.52/Al/sub 0.48/As/In/sub 0.53/Ga/sub 0.47/As metamorphic high-electron mobility transistors (mHEMTs) on a GaAs substrate show f/sub T/ of 440 GHz, f/sub max/ of 400 GHz, a minimum noise figure of 0.7 dB and an associated gain of 13 dB at 26 GHz, the latter at a drain current of 185 mA/mm and g/sub m/ of 950 mS/mm. In addition, a noise figure of below 1.2 dB with 10.5 dB or higher associated gain at 26 GHz was demonstrated for drain currents in the range 40 to 470 mA/mm at a drain bias of 0.8 V. These devices are ideal for low noise and medium power applications at millimeter-wave frequencies.     

DC and microwave noise transient behavior of InP/InGaAs doubleheterojunction bipolar transistor (DHBT) with polyimide passivation

DC and microwave noise transient behavior of InP/InGaAs double heterojunction bipolar transistor (DHBT) with polyimide passivation is reported in this paper for the first time. The base transient current is believed to be due to the change of surface potential near the base-emitter junction perimeter at the polyimide/emitter interface resulting from a decrease in the amount of trapped electrons in the polyimide. We also find that the surface potential on the sidewall of collector-emitter affected by the charge trapping and detrapping in polyimide may induce a parasitic polyimide field effect transistor along the surface of the base-collector junction which results in an excess collector transient current. These base and collector current transients result in associated transient of broadband shot noise. The time dependence of microwave noise figures due to the excess transients is also investigated. The better understanding of the mechanisms of the noise transient behavior of the InP HBT device is very useful to improve the device and circuit reliability     

最高振荡频率416GHz的太赫兹InGaAs/InP DHBT

<正>太赫兹技术(300 GHz-3 THz)在射电天文、成像雷达以及高速通信等领域具有广阔的应用前景。磷化铟双异质结双极型晶体管(InP DHBT)具有高截止频率、高击穿电压、高器件一致性、低1/f噪声等优点,非常适合于太赫兹单片集成功率放大器和频率源的研制。南京电子器件研究所基于76.2 mm圆片工艺,研制出,f_(max)达416 GHz的四指共基极InP DHBT器件,击穿电压大于4 V,器件性能处于国内领先水平,同时这也是国内首次报道的f_(max)超过400 GHz的InP DHBT器件。     

A novel dynamic threshold Voltage MOSFET (DTMOS) using heterostructure channel of Si/sub 1-y/C/sub y/ interlayer

We have demonstrated the fabrication of dynamic threshold voltage MOSFET (DTMOS) using the Si/sub 1-y/C/sub y/(y=0.005) incorporation interlayer channel. Compare to conventional Si-DTMOS, the introduction of the Si/sub 1-y/C/sub y/ interlayer for this device is realized by super-steep-retrograde (SSR) channel profiles due to the retardation of boron diffusion. A low surface channel impurity with heavily doped substrate can be achieved simultaneously. This novel Si/sub 1-y/C/sub y/ channel heterostructure MOSFET exhibits higher transconductance and turn on current.     

Extraction of /spl epsiv//sub r/(f) and tan/spl delta/(f) for printed circuit board insulators up to 30 GHz using the short-pulse propagation technique

In this paper, the self-consistent, frequency-dependent dielectric constant epsiv_r(f) and dielectric loss tandelta(f) of several materials are determined over the range 2 to 30 GHz using a short-pulse propagation technique and an iterative extraction based on a rational function expansion. The simple measurement technique is performed in the time domain on representative printed circuit board wiring. Broadband, fully causal transmission-line models based on these results are generated up to 50 GHz for card wiring using low loss materials including BT, Nelco N4000-13, and Nelco N4000-13SI. Simulation and modeling results highlight the need for the accurate frequency-dependent dielectric loss extraction. Signal propagation based on these results shows very good agreement with measured step and pulse time-domain excitations and provides validation of the measurement and model generation technique     

Characterization of InP grown by OMVPE using trimethylindium and tertiarybutylphosphine (TBP) at low V/III ratios and reduced TBP partial pressures

We report an OMVPE growth process for InP using trimethylindium (TMI) and tertiarybutylphosphine (TBP), a V/III ratio of 15, and a TBP partial pressure of 0.5 Torr. Growth is initiated with a 0.1 μm buffer layer employing a ramped TBP flow. Results are presented for InP grown with two different samples of both TMI and TBP and compared to previous experimental results and theoretical predictions. Good surface morphology is obtained from 540 to 600° C. The net carrier concentrations, N_d-N_a, decrease with increasing growth temperature—but never fall below 1.3 × 10¹⁶ cm^-3. Mobilities of 3990 and 11200 cm²/V.sec are observed at 300 and 77 K, respectively. At 77 K, we infer a compensation ratio of ∼0.4, independent of N_d-N_a. Photoluminescence measurements at 6 K show intense near bandgap emission with a full width half maximum proportional to N_d-N_a. Weak emission is also observed from carbon acceptors, independent of growth temperature. Secondary ion mass spectroscopy measurements are performed on an InP wafer grown with four different temperatures. The observed sulfur concentration drops from 1 × 10¹⁸ to 6 × 10¹⁶ cm^-3 with increasing growth temperature. This confirms that sulfur is an important residual impurity in TBP. The observed carbon concentration is 4–6 × 10¹⁶ cm^-3, regardless of growth temperature.     

A 6-GHz 16-kB L1 cache in a 100-nm dual-V/sub T/ technology using a bitline leakage reduction (BLR) technique

This work describes an aggressive SRAM cell configuration using dual-V/sub T/ and minimum channel length to achieve high performance. A bitline leakage reduction technique is incorporated into an L1 cache design using the new cell in a 100-nm dual-V/sub T/ technology to eliminate impacts of bitline leakage on performance and noise margin with minimal area overhead. Bitline delay is 23% better than the best conventional design, thus enabling 6-GHz operation at with 15% higher energy.     

A physical hydrodynamic 2D model for simulation and scaling of InP/InGaAs(P) DHBTs and circuits with limited complexity

In this paper we demonstrate a physical two-dimensional hydrodynamic (2D HD) model which simulates the DC and AC characteristics of vertically and laterally scaled InP/InGaAs(P) type I double heterojunction bipolar transistors (DHBTs) with state-of-the-art accuracy when compared to experimental data. For the first time, a physical model clearly shows good agreement between simulated and measured circuit data, for example the gate delay of current mode logic (CML) or emitter coupled logic (ECL) ring oscillators of laterally and vertically scaled devices. The deviation of the simulated gate delays of these digital circuits is smaller than 10%. Additionally, the model successfully predicts the circuit performance of experimental frequency dividers and multiplexers. This experimentally verified model can be used to predict and optimize AC and switching characteristics of future generations of aggressively downscaled DHBTs and is a significant advancement in the art of physical and scalable DHBT and circuit modeling. We demonstrate that optimized type I DHBTs approach bit rates towards 235 Gb/s with realistic scaling parameters in the near future.     

A 2.4 Gb/s receiver and a 1:16 demultiplexer in one chip using asuper self-aligned selectively grown SiGe base (SSSB) bipolar transistor

This paper reports a 2.4 Gb/s optical terminal IC that integrates high-speed analog and digital circuits for future optical networks using 60-GHz f_T self-aligned silicon-germanium (SiGe)-alloy base bipolar transistors. The selective epitaxial growth (SEG) SiGe base was formed by using cold-wall ultra-high vacuum (UHV)/CVD technology. Boron concentration reduction at the SiGe epitaxial layer/Si-substrate interface by using a new treatment prior to SEG leads to electrical characteristics with less dependence on bias voltage. The IC consists of a receiver (a preamplifier, an automatic gain control (AGC) amplifier, a phase-locked loop (PLL), and a D-type flip-flop (D-F/F)), and a 1:16 demultiplexer (DMUX). An input offset control circuit is included in the AGC amplifier for wide dynamic range. Trench isolation and silicon-on-insulator (SOI) technologies are introduced to reduce crosstalk between the amplifiers and the PLL. Power consumptions are 0.6 W at -5.2 V for the analog part and 0.45 W at -3.3 V for the digital part, which does not include the ECL output buffers