The reverse anneal of junction characteristics in forming shallow p+-n junction by BF2+ implantation intothin Co films on Si substrate

Silicided shallow p⁺-n junctions, formed by BF₂ ⁺ implantation into thin Co films on Si substrates and subsequently annealed, showed a reverse anneal of junction characteristics in the temperature range between 550 and 600°C. The reverse anneal means behavior showing degradation of the considered parameters with increasing annealing temperature. A higher implant dosage caused a more distinct reverse anneal. The reverse anneal of electrical characteristics was associated with the reverse anneal of substitutional boron. A shallow p⁺-n junction with a leakage current density lower than 3 nA/cm₂, a forward ideality factor of better than 1.01, and a junction depth of about 0.1 μm was achieved by just a 550°C anneal     

Effect of electron cyclotron resonance H+,Ne+, Ar+, and Xe+ plasma precleaning ontitanium silicide formation

A vacuum integrated cluster tool process incorporating electron cyclotron resonance plasma cleaning, Ti sputter deposition, and rapid thermal annealing in N₂ is used to form a TiN_x<1/TiSi_y bilayer on (100) Si where the film composition is controlled by the preclean chemistry. Chemical cleaning with nominal 10 eV H⁺ completely removes native Si oxide resulting in a hydrogen terminated surface that promotes silicidation compared to one cleaned with buffered-oxide-etching (BOE). If the native oxide is only partially reduced, viz., SiO_x<2 surface, for example by shortening the H⁺ exposure time, then silicidation is largely inhibited and a thicker nitride layer is formed. Sputter cleaning with 50 to 250 eV Ar⁺ results in a bilayer that is roughly equivalent to that formed with BOE, whereas 50 to 150 eV Xe⁺ bombardment favors nitridation. Precleaning with >150 eV Ne⁺ promotes silicidation, thereby minimizing nitride thickness. The effects of precleaning are significant as the activation energy for TiSi_y formation is reduced from 1.8 eV characteristic of a BOE cleaned surface to 1.2 eV on Si etched with 250 eV Ne⁺. Mechanistically, the silicide kinetics are shown to be inhibited by the presence of a thin amorphous layer that is formed only when cleaning Si with Ar⁺ and Xe⁺ with the effect that both knock-on oxygen atoms and implanted noble gas atoms trapped within the amorphous layer retard the requisite solid-phase epitaxial regrowth kinetics. Recrystallizing the amorphous Si surface prior to metallization appears to restore the near-normal silicide kinetics that is characteristic of Ne⁺ cleaning     

Impact of Ge implantation on the electrical characteristics of TiSi2 p+/n shallow junctions with an a-Si (or apoly-Si) buffer layer

A new technology for forming a titanium-silicide shallow junction by combining germanium implantation with an amorphous-silicon (or a poly-silicon) buffer layer has been proposed for MOSFETs. The use of a buffer layer between Ti and Si can avoid the consumption of bulk-silicon and the recession of TiSi₂ film into the source/drain junctions during the silicidation process. In this study, the important role of germanium-implantation on the formation of TiSi₂ contacted p⁺/n junctions was examined. After subsequent implantation of Ge⁺ and B⁺ into the TiSi₂ film, samples were annealed at different temperatures to form p ⁺/n junctions and C54-TiSi₂. Since the penetration of titanium atoms was suppressed due to the germanium-implantation, the periphery leakage and the generation leakage were improved and TiSi₂/Si interfaces were even smooth. Therefore, p⁺/n junctions with a very low leakage current (0.192 nA/cm ² at -5 V) and an excellent forward ideality factor (n≈1.002) can be obtained. From the secondary ion mass spectrometry (SIMS) analysis, the junction depth is 400     

Abnormal junction profile of silicided p+/n shallowjunctions: a leakage mechanism

The leakage mechanism in p⁺/n shallow junctions fabricated using Co silicidation and shallow trench isolation processes has been investigated using transmission electron microscopy (TEM) combined with selective chemical etching. TEM and TSUPREM-4 simulation results show that dopant profiles bend upward near the edge of the active region. The formation of the abnormal profile is attributed to transient enhanced diffusion induced by source/drain implantation. Based on the TEM and simulation results, it is suggested that the shallower junctions formed near the active edge can serve as a source for leakage current in the silicided p+ /n shallow junctions     

Formation of TiSi2 and shallow junction byAs+ ion-beam mixing and infrared rapid heat treatment

A technique for forming shallow junctions with low-resistance silicide contacts developed for the use in VLSI with scaled MOSFETs is discussed. The salicide (self-aligned silicide) MOSFET gate and source-drain features self-aligned refractory metal silicide and are isolated from one another even without any insulating spacer on the gate sides. A critical step in such a MOSFET fabrication process is the ion implantation through metal silicidation technique, which includes As⁺ ion-beam-induced titanium-silicon interface mixing and infrared rapid heat treatment to form simultaneously the n⁺-p junction and a high-quality TiN covered TiSi₂ contact layer     

A silicidation-induced process consideration for forming scale-downsilicided junction

A process consideration for forming silicided shallow junctions, arising from silicidation process, has been discussed. The CoSi₂ shallow p⁺n junctions formed by various schemes are characterized. The scheme that implants BF₂⁺ ions into thin Co films on Si substrates and subsequent silicidation yields good junctions, but the problems about the dopant drive-in and knock-on of metal deeply degrade this scheme. In the regime that implants the dopant into Si and then Co deposition, however, a large perimeter leakage of 0.1 nA/cm is caused. Generation current, associated with a defect-enhanced diffusion of Co in Si during silicidation, dominates the leakage. A high-temperature pre-activation prior to Co deposition reduces the perimeter leakage to 0.038 nA/cm, but which deepens the junctions     

A novel process to form cobalt silicided p+ poly-Sigates by BF2+ implantation into bilayeredCoSi/a-Si films and subsequent anneal

A novel process that implants BF₂⁺ ions into thin bilayered CoSi/a-Si films has been shown to form cobalt silicided p ⁺ poly-Si gates with excellent gate oxide integrity and very small flatband shift. The effects of not only using the CoSi layer as an implantation barrier but also keeping the a-Si underlayer during the initial silicide formation both significantly suppress the boron penetration through thin gate oxide     

Low-resistance bandgap-engineeredW/Si1-xGex/Si contacts

Bandgap-engineered W/Si_1-xGe_x/Si junctions (p⁺ and n⁺) with ultra-low contact resistivity and low leakage have been fabricated and characterized. The junctions are formed via outdiffusion from a selectively deposited Si_0.7Ge _0.3 layer which is implanted and annealed using RTA. The Si _1-xGe_x layer can then be selectively thinned using NH₄OH/H₂O₂/H₂O at 75°C with little change in characteristics or left as-deposited. Leakage currents were better than 1.6×10^-9 A/cm² (areal), 7.45×10^-12 A/cm (peripheral) for p⁺/n and 3.5×10^-10 A/cm² (peripheral) for n⁺/p. W contacts were formed using selective LPCVD on Si_1-xGe_x. A specific contact resistivity of better than 3.2×10^-8 Ω cm² for p ⁺/n and 2.2×10^-8 Ω cm² for n⁺/p is demonstrated-an order of magnitude n⁺ better than current TiSi₂ technology. W/Si_1-xGe _x/Si junctions show great potential for ULSI applications     

基于PLD法制备ZnO:Eu3+,Li+薄膜的发光性质研究

采用脉冲激光沉积(PLD)技术在Si(111)衬底上生长了Eu3+、Li+共掺杂的ZnO薄膜。分别对样品进行了X射线衍射(XRD)谱测试和光致发光(PL)谱分析,重点研究了退火处理对样品结构和发射光谱的影响。XRD谱测试表明,样品具有很好的C轴择优取向。PL谱研究表明,当用325nm光激发样品时,样品的发射光谱仅由ZnO基质的紫外发射和蓝光发射组成,并没有发现稀土Eu3+的特征发光峰;样品的蓝光发射源于电子从Zn填隙形成的浅施主能级到Zn空位形成的浅受主能级跃迁;和真空中退火的样品相比,O2中制备的样品的蓝光发射减弱,紫外发光增强。用395nm的光激发时,退火前样品分别在594nm和613nm处存在两个明显的Eu3+特征发光峰,退火后的样品仅发现Eu3+位于594nm的特征发光峰,这表明,退火处理不利于稀土离子的特征发射,但O2中退火的样品ZnO基质红绿波段发射光谱明显增强。     

Simultaneous formation of silicide ohmic contacts and shallow p+-n junctions by ion-beam mixing and rapid thermal annealing

Low-resistivity, uniform molybdenum silicide layers, and shallow p⁺-n junctions with good electrical characteristics have been formed using ion-beam mixing and rapid thermal annealing (RTA). Detailed reverse leakage current data on RTA annealed diodes, which were formed by implanting BF2⁺into Si substrates through the molybdenum films deposited on Si, are presented. The process has a great potential for CMOS fabrication with self-aligned silicided source, drain, and gate.     

Er3+-Yb3+ and Er3+ doped fiberlasers

Single-mode fiber lasers operating at ~1.57 μm are described. Output powers of >2 mW are reported for laser diode pumped operation. Direct comparison is made between fiber lasers using sensitized erbium (Er³⁺ and Yb³⁺) and erbium on its own. The performance of Er³⁺-Yb³⁺ fiber lasers is analyzed in more detail as a function of fiber length. Both CW and Q-switched operations are studied and the results obtained demonstrate that practical sources at 1.5 μm are available from diode pumped Er³⁺ -Yb³⁺ systems     

Rapid thermal annealing effects on Si p+-n junctionsfabricated by low-energy FIB Ga+ implantation

Effects of rapid thermal annealing (RTA) on sub-100 nm p⁺ -n Si junctions fabricated using 10 kV FIB Ga⁺ implantation at doses ranging from 10¹³ to 10¹⁵ cm ^-2 are reported. Annealing temperature and time were varied from 550 to 700°C and 30 to 120 s. It was observed that a maximum in the active carrier concentration is achieved at the critical annealing temperature of 600°C. Temperatures above and below the critical temperature were followed by a decrease in the active concentration, leading to a `reverse' annealing effect     

RNS-to-Binary Converters for Two Four-Moduli Sets {2n−1,2n,2n+1,2n+1−1} and {2n−1,2n,2n+1,2n+1+1}

In this paper, reverse converters for two recently proposed four-moduli sets {2ⁿ - 1,2ⁿ,2ⁿ + 1,2ⁿ+1 - 1} and {2ⁿ - 1, 2ⁿ, 2ⁿ + 1, 2ⁿ+1 + 1} are described. The reverse conversion in the three-moduli set {2ⁿ - 1,2ⁿ,2ⁿ + 1} has been optimized in literature. Hence, the proposed converters are based on two new moduli sets {(2ⁿ(2²ⁿ-1)),2ⁿ⁺¹-1} and {(2ⁿ(2²ⁿ-1)), 2ⁿ⁺¹+1} and use mixed radix conversion. The resulting designs do not require any ROM. Both are similar in their architecture except that the converter for the moduli set {2ⁿ - 1, 2ⁿ, 2ⁿ + 1, 2ⁿ+1 + 1} is slightly complicated due to the difficulty in performing reduction modulo (2ⁿ⁺¹+1) as compared with modulo (2ⁿ⁺¹-1). The proposed conversion techniques are compared with earlier realizations described in literature with regard to conversion time as well as area requirements.     

The effects of annealing step-edges on SrTiO3 and MgOsingle-crystal substrates on YBa2Cu3O7Josephson junctions

The effect of annealing step-edges on SrTiO₃ and MgO single-crystal substrates on Josephson junctions of YBa₂Cu ₃O₇, has been studied. The step-edge was fabricated by argon-ion milling technique and was annealed at 1050°C in oxygen atmosphere. YBa₂Cu₃O₇ thin film was deposited on the annealed step-edge by a standard pulsed laser deposition. The effect of annealing the step-edge on the junction was characterized by AFM and current-voltage (I-V)characteristic. The annealed step-edge on SrTiO₃ and MgO substrates showed that the surface of the substrates was smoother and I-V characteristic of Josephson junction improved     

Low-temperature growth of silicon-boron layer as solid diffusionsource for polysilicon contacted p+-n shallow junction

A new material, Si-B, is proposed as a solid diffusion source for fabrication of poly-Si contacted p⁺-n shallow junctions. The junction depth of the Si-B source diode has been measured and compared with that of a BF₂⁺-implanted poly-Si source diode. It was found that the Si-B source diode had a much shallower junction and was less sensitive to thermal budget than the BF₂⁺ source diode. This was attributed to the smaller surface concentration and diffusivity of boron in the silicon in Si-B source diodes. Regarding electrical characteristics of diodes with a junction depth over 500 Å, a forward ideality factor of better than 1.01 over 8 decades and a reverse-current density lower than 0.5 nA/cm² at -5 V were obtained. As the junction depth shrank to 300 Å, the ideality factor and reverse current density of diodes increased slightly to 1.05 and 1.16 nA/cm², respectively. These results demonstrated that a uniform ultrashallow p⁺-n junction can be obtained by using a thin Si-B layer as a diffusion source     

Electrical characterization of ultra-shallow junctions formed bydiffusion from a CoSi2 layer

Ultra-shallow p⁺/n and n⁺/p junctions were fabricated using a Silicide-As-Diffusion-Source (SADS) process and a low thermal budget (800-900°C). A thin layer (50 nm) of CoSi₂ was implanted with As or with BF₂ and subsequently annealed at different temperatures and times to form two ultra-shallow junctions with a distance between the silicide/silicon interface and the junction of 14 and 20 nm, respectively. These diodes were investigated by I-V and C-V measurements in the range of temperature between 80 and 500 K. The reverse leakage currents for the SADS diodes were as low as 9×10 ^-10 A/cm² for p⁺/n and 2.7×10^-9 A/cm² for n⁺/p, respectively. The temperature dependence of the reverse current in the p ⁺/n diode is characterized by a unique activation energy (1.1 eV) over all the investigated range, while in the n⁺/p diode an activation energy of about 0.42 eV is obtained at 330 K. The analysis of the forward characteristic of the diodes indicate that the p⁺ /n junctions have an ideal behavior, while the n⁺/p junctions have an ideality factor greater than one for all the temperature range of the measurements. TEM delineation results confirm that, in the case of As diffusion from CoSi₂, the junction depth is not uniform and in some regions a Schottky diode is observed in parallel to the n⁺/p junction. Finally, from the C-V measurements, an increase of the diodes area of about a factor two is measured, and it is associated with the silicide/silicon interface roughness     

MBE grown n+-i-δ(p+)-i-n+GaAs V-groove barrier transistor

The three-terminal n⁺-i-δ(p⁺)-i-n⁺V-groove barrier transistor (VBT) has been successfully fabricated by molecular beam epitaxy (MBE). The base terminal is connected to the δ(p⁺), the thin p⁺layer, by depositing aluminum on the etched V-groove. The demonstrated device possesses high potential of ultra-high-frequency (f_{r} > 30-GHz), high-power, and low-noise capability due to carriers transporting by thermionic emission and being controlled by the base-emitter bias.     

Improved gain characteristics in high-concentrationEr3+/Yb3+ codoped glass waveguide amplifiers

High-concentration Er³⁺/Yb³⁺ codoped glass waveguide amplifiers are analyzed by means of a finite-element-based code. Efficient Yb³⁺ to Er³⁺ energy transfer is shown to be a useful mechanism to reduce performance degradation due to Er³⁺ ion-ion interactions. Numerical calculations based on realistic waveguide parameters demonstrate the possibility of achieving high gain with a short device length     

Excellent low-pressure-oxidized Si3N4 filmson roughened poly-Si for high-density DRAMs

High-reliability and good-performance stacked storage capacitors with high capacitance value of 17.8 fF/μm² has been realized using low-pressure-oxidized thin nitride films deposited on roughened poly-Si electrodes. These novel electrodes are fabricated by H ₃PO₄-etching and are RCA-cleaned. The leakage current density at +2.5 and -2.5 V are 0.07×10^-9 and -2.4×10^-8 A/cm², respectively, fulfilling the requirements of 256 Mb DRAM's. Weibull plots of time-dependent-dielectric-breakdown (TDDB) characteristics under constant current stress and constant voltage stress also show tight distribution and good electrical properties. Hence, this easy and simple technique is promising for future high-density DRAM's applications     

Characteristics of siliconn+-n--n+ diode with sub-micrometer n- region

In this paper, the I-V characteristics of silicon n⁺-n ^--n⁺ diode are investigated as a parameter of the length of the n^- region. This diode with shorter n^- region than 1 μm has the ohmic characteristics until reaching high electric field in spite of the existence of numerous space-charges in the n^- region, for the first time in this report. This conductance of the diode is inversely proportional to the third power of the length of the n^- region. The experimental results are in good agreement with an analytical calculation including the diffusion term of carriers injected from the n+ regions to the n^- region. However, the diode with longer n^- region than 2 μm shows the space-charge-limited conduction which is the same as earlier reports