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1.
A backscattering model suitable for compact modeling of nanoscale MOSFET is developed within the Landauer flux-scattering theory. To describe the quasi-ballistic transport, a new backscattering model based on the accurate determination of ballistic and backscattering probabilities along the channel is developed. This model is based on a careful analysis of transport in device using Monte Carlo simulation. This model allows us to display the main physical quantities along the channel and to accurately describe the quasi-ballistic transport and its effects on current-voltage characteristics.  相似文献   

2.
A general ballistic FET model that was previously used for ballistic MOSFETs is applied to ballistic high electron mobility transistors (HEMTs), and the results are compared with experimental data for a sub-50 nm InAlAs-InGaAs HEMT. The results show that nanoscale HEMTs can be modeled as an intrinsic ballistic transistor with extrinsic source/drain series resistances. We also examine the "ballistic mobility" concept, a technique proposed for extending the drift-diffusion model to the quasi-ballistic regime. Comparison with a rigorous ballistic model shows that under low drain bias the ballistic mobility concept, although nonphysical, can be used to understand the experimental phenomena related to quasi-ballistic transport, such as the degradation of the apparent carrier mobility in short channel devices. We also point out that the ballistic mobility concept loses validity under high drain bias. The conclusions of this paper should be also applicable to other nanoscale transistors with high carrier mobility, such as carbon nanotube FETs and strained silicon MOSFETs.  相似文献   

3.
In this paper, the authors study a quasi-ballistic transport in nanoscale Si-MOSFETs based upon a quantum-corrected Monte Carlo device simulation to explore an ultimate device performance. It was found that, when a channel length becomes shorter than 30 nm, an average electron velocity at the source-end of the channel increases due to ballistic transport effects, and then, it approaches a ballistic limit in a sub-10-nm regime. Furthermore, the authors elucidated a physical mechanism creating an asymmetric momentum distribution function at the source-end of the channel and the influences of backscattering from the channel region. The authors also demonstrated that an electron injection velocity at a perfectly ballistic transport is independent of the channel length and corresponds well to a prediction from Natori's analytical model  相似文献   

4.
Silicon nanowire transistors (SNWTs) have attracted broad attention as a promising device structure for future integrated circuits. Silicon nanowires with a diameter as small as 2 nm and having high carrier mobility have been achieved. Consequently, to develop TCAD tools for SNWT design and to model SNWT for circuit-level simulations have become increasingly important. This paper presents a circuit-compatible closed-form analytical model for ballistic SNWTs. Both the current–voltage (IV) and capacitance–voltage (CV) characteristics are modeled in terms of device parameters and terminal voltages. Such a model can be efficiently used in a conventional circuit simulator like SPICE to facilitate transistor-level simulation of large-scale nanowire or mixed nanowire-CMOS circuits and systems.  相似文献   

5.
A compact HSPICE model has been developed for the newly proposed impact-ionisation MOS (IMOS) device for circuit simulation. Table lookup dependent sources and passive components have been employed to model the IMOS device. The approach shows good accuracy compared to time-consuming and non-scalable TCAD simulation of IMOS-based circuits.  相似文献   

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8.
High-frequency transport in bipolar transistors with quasi-ballistic base widths (on the order of a minority-carrier scattering length) is examined by using the approach of Grinberg and Luryi (1992) to solve the Boltzmann transport equation (BTE). By considering the phase angle of the dynamic distribution function in wave-vector space, it is shown that the ballistic mechanism of decay in the common-base current gain becomes important even for base widths in the quasi-ballistic regime. Simple expressions, which correctly yield both the magnitude and phase of all the forward characteristics, as predicted by the BTE, up to the intrinsic transit frequency, are found by combining the results from a one-flux approach with the well-known expressions of Thomas and Moll (1958). Expressions for the reverse small-signal parameters are also found by applying a “moving boundary condition” to the basic one-flux equations of Shockley (1962)  相似文献   

9.
In this paper, we study the influence of elastic and inelastic phonon scattering on the drive current of Si MOSFETs under quasi-ballistic transport. Inelastic phonon emission involving energy relaxation helps achieve ballistic current, even in the presence of scattering, if the channel length is scaled down to the 10-nm scale. This result agrees with Natori's previous predictions. However, for longer channel devices, inelastic phonon emission degrades the drain current due to space charge effects caused by charge accumulation. We also demonstrate that source-end potential engineering to electrically reduce the bottleneck barrier length can result in a ballistic current even in longer channel devices.   相似文献   

10.
Carrier transport in pn-junction is re-examined using McKelvey's flux method. A simple but physically based treatment of carrier transport leads to new expressions for the "law of the junction," quasi-Fermi level, I-V characteristics, base transit time, and probability of carrier backscattering from the space charge region, which are valid from the ballistic through the diffusive regimes. Comparison with Monte Carlo simulation shows that the deduced backscattering rate well describes the bias dependence. For silicon pn-junctions, the backscattering rate under reverse bias conditions is less than 5%, satisfying the Bethe condition of thermionic emission, while it rapidly increases with forward bias until drift-diffusion governs the transport. The effect of thin-base transport and backscattering on the current, carrier velocity, and distribution function is also investigated. It is found that for a base thickness less than 50 nm even silicon transistors enter the quasi-ballistic transport regime. These results should prove useful not only for fundamental understanding of the pn-junction transport, but also for careful design of advanced transistors.<>  相似文献   

11.
This paper presents a novel ESD strategy for non-volatile memory (NVM) programming pin in a 0.13um/30V technology. Suggested scheme can provide not only a major current discharge path to protect the internal circuit from ESD damage but also a voltage clamping function to prevent the soft error of programmed data during the ESD event. It has been validated by TLP experiments and TCAD simulation.  相似文献   

12.
利用Sentaurus TCAD仿真软件,建立并校准了MOSFET仿真模型。分析了NMOS器件在重离子轰击下产生的SET波形。结果表明,轰击位置在漏极且入射角呈120°时,器件具有最大的峰值电流。通过建立MIX、TCAD、SPICE三种反相器模型并施加重离子轰击,研究了不同模拟方式下电路响应对SET波形的影响,指出了采用双指数电流源在SPICE电路中模拟的不准确性。采用MIX模型探究了器件结构及电路环境对SET波形的影响。结果表明,LET能量、栅极长度、轨电压和负载电容都会对SET波形脉宽及平台电流大小产生显著影响,说明了建立SET模拟波形时须综合考虑这些因素。  相似文献   

13.
In this paper, we demonstrate a methodology to link process parameters to BSIM model parameters. Here, we have combined well-known statistical methods like principal component analysis (PCA), design of experiments (DOE), and response surface methodology (RSM) to bridge the missing link between process parameters and model parameters. The proposed methodology uses the concept of a correlation matrix, which transforms the process level information to the device and circuit level information through the BSIM model parameters. The proposed methodology has been successfully implemented on an advanced CMOS process. Our results show a strong linear correlation for the data obtained from two techniques namely TCAD technique and the standard HSPICE simulation technique. In both cases the process conditions were kept identical for comparison.   相似文献   

14.
针对3 nm环栅场效应晶体管,提出了一种射频小信号等效电路模型及基于有理函数拟合的解析模型参数提取方法。首先,在关态条件下提取不受偏置影响的非本征栅/源/漏极电阻、栅到源/漏电容、衬底电容和电阻。然后,在不同偏置条件下提取受偏置影响的本征模型参数。使用Sentaurus TCAD和Matlab对器件进行仿真并拟合得到相关参数,在ADS中验证等效电路模型。结果表明,在10 MHz~300 GHz频率范围内,TCAD仿真与等效电路仿真S参数的最大误差低于2.69%,证实了所建立模型及建模方法的准确性。该项研究成果对射频集成电路设计具有参考价值。  相似文献   

15.
In this paper, we review recent developments of the Monte Carlo approach to the simulation of semi-classical carrier transport in nano-MOSFETs, with particular focus on the inclusion of quantum-mechanical effects in the simulation (using either the multi-subband approach or quantum corrections to the electrostatic potential) and on the numerical stability issues related to the coupling of the transport with the Poisson equation. Selected applications are presented, including the analysis of quasi-ballistic transport, the determination of the RF characteristics of deca-nanometric MOSFETs, and the study of non-conventional device structures and channel materials.  相似文献   

16.
The small-signal forward y-parameters of a Si bipolar transistor are evaluated from a 1-flux solution to the Boltzmann transport equation. For base widths less than 0.1 μm, results begin to deviate significantly from those predicted by the conventional diffusion analysis. In particular, the phase of the y-parameter, an important factor in analog circuit design, is shown to be especially sensitive to quasi-ballistic transport. Compact circuit models will become increasingly inaccurate as base widths continue to shrink. The approach used here eliminates the restriction to a long base and can serve as the basis for improved compact circuit modeling  相似文献   

17.
绝缘体上硅(Silicon-on-Insulator,SOI)器件的全介质隔离结构改善了其抗单粒子效应性能,但也使其对总剂量效应更加敏感.为了评估SOI器件的总剂量效应敏感性,本文提出了一种基于TCAD (Technology Computer Aided Design)的总剂量效应仿真技术.通过对SOI器件三维结构进行建模,利用TCAD内置的辐射模型开展瞬态仿真,模拟氧化层中辐射感应电荷的产生、输运和俘获过程,从而分别评估绝缘埋层(Buried Oxide,BOX)和浅沟槽隔离(Shallow Trench Isolation,STI)氧化层中辐射感应陷阱电荷对器件电学性能的影响.基于该仿真技术,本文分别研究了不同偏置、沟道长度、体区掺杂浓度以及STI形貌对SOI MOSFET器件总剂量辐射效应的影响.仿真结果表明高浓度的体区掺杂、较小的STI凹槽深度和更陡峭的STI侧壁将有助于改善SOI器件的抗总剂量效应性能.  相似文献   

18.
We present a novel methodology for characterization of sub-quartermicron CMOS technologies. It involves process calibration, device calibration employing two-dimensional device simulation and automated Technology Computer Aided Design (TCAD) optimization and, finally, transient mixed-mode device/circuit simulation. The proposed methodology was tested on 0.25 μm technology and applied to 0.13 μm technology in order to estimate ring oscillator speed. The simulation results show an excellent agreement with available experimental data  相似文献   

19.
Ballistic transport in GaAs has been studied using an ensemble Monte Carlo simulation. Duration and spatial extent of ballistic transport for a hot electron distribution can be defined from such studies. Mean displacement of the ensemble increases quadratically with time for a specified interval. This observation provides a phenomenological definition of ensemble ballistic transport. This phenomenological definition is compared with a theoretical definition based on time at which a significant fraction of an ensemble have experienced at least one collision. From these studies, times and distances are given for which a single-particle ballistic equation and a Langevin equation accurately describe ensemble transport in GaAs.  相似文献   

20.
针对NMOS场效应晶体管由重离子辐射诱导发生的单粒子多瞬态现象,参考65 nm体硅CMOS的单粒子瞬态效应的试验数据,采用TCAD仿真手段,搭建了65 nm体硅NMOS晶体管的TCAD模型,并进一步对无加固结构、保护环结构、保护漏结构以及保护环加保护漏结构的抗单粒子瞬态效应的机理和能力进行仿真分析。结果表明,NMOS器件的源结和保护环结构的抗单粒子多瞬态效应的效果更加明显。  相似文献   

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