Microwave inductors and capacitors in standard multilevelinterconnect silicon technology

Spiral inductors and metal-to-metal capacitors for microwave applications, which are integrated on a silicon substrate by using standard 0.8 μm BiCMOS technology, are described. Optimization of the inductors has been achieved by tailoring the vertical and lateral dimensions and by shunting several interconnect metal layers together. Lumped element models of inductors and capacitors provide detailed understanding of the important geometry and technological parameters on the device characteristics. The high quality factors of nearly 10 for the inductors are among the best results in silicon, particularly when using standard silicon technology     

Temperature and substrate-impedance dependence of noise figure of monolithic RF inductors on silicon

In this letter, we analyze the effects of temperature (from -50/spl deg/C to 200/spl deg/C) and substrate impedance on the noise figure (NF) and quality factor (Q-factor) performances of monolithic RF inductors on silicon. The results show a 0.75 dB (from 0.98 to 0.23 dB) reduction in minimum NF (NF/sub min/) at 8 GHz, an 86.1% (from 15.1 to 28.1) increase in maximum Q-factor (Q/sub max/), and a 4.8% (from 16.5 to 17.3 GHz) improvement in self-resonant frequency (f/sub SR/) were obtained if post-process of proton implantation had been done. This means the post-process of proton implantation is effective in improving the NF and Q-factor performances of inductors on silicon mainly due to the reduction of eddy current loss in the silicon substrate. In addition, it was found that NF increases with increasing temperature but show a reverse behavior within a higher frequency range. This phenomenon can be explained by the positive temperature coefficients of the series metal resistance (R/sub s/), the parallel substrate resistances (R/sub sub1/ and R/sub sub2/), and the resistance R/sub s1/ of the substrate transformer loop. The present analyzes are helpful for RF designers to design less temperature-sensitive high-performance fully on-chip low-noise-amplifiers (LNAs) and voltage-controlled-oscillators (VCOs) for single-chip receiver front-end applications.     

Lossless broad-band monolithic microwave active inductors

Lossless broadband microwave active inductors for general-purpose use in microwave circuits are proposed, and their characteristics are discussed. These active inductors are composed of a common-source cascode FET and a feedback FET, and operate in a wide frequency range with very low series resistance. Their low-loss characteristics are demonstrated by simulation and experimental results. A maximum Q factor of 65 is obtained. Theoretically, it can reach infinity. The inductance value can be controlled by an external voltage control     

Centre-tapped spiral inductors for monolithic bandpass filters

A centre-tapped spiral inductor is proposed for use in fully balanced monolithic bandpass filters. The design consumes only 63% of the area required by two traditional spirals and delivers a common-mode rejection ratio approaching 40 dB. Moreover, the self-resonance frequency is twice that of a traditional grounded spiral of the same inductance value. Enabling higher reactances and Q-values to be achieved     

RF inductors with suspended and copper coated thick crystalline silicon spirals for monolithic MEMS LC circuits

This letter presents a novel radio frequency (RF) inductor in a monolithic inductor-capacitor circuit developed by using micro-electromechanical systems (MEMS) fabrication technology. The inductor consists of 40-/spl mu/m-thick single crystalline silicon spiral with copper surface coating as the conductor, which is suspended on a glass substrate. The fabricated inductor exhibits a self-resonance frequency higher than 15GHz, with the quality factor more than 35 and inductance over 5nH at 11.3GHz. Simulations based on a compact equivalent circuit model with parameters extracted using a characteristic-function approach have also been carried out for the inductor, and good agreement with measurements is obtained.     

Flexible circuit and sensor arrays fabricated by monolithic silicon technology

A novel monolithic batch fabrication method produces arrays of silicon islands containing conventional integrated-circuit components and supported by a flexible polyimide substrate. Islands are interconnected by photolithographically defined gold leads embedded in the polyimide. Because no bonding pads are necessary at island boundaries, lead density between islands is at least twice that available using hybrid techniques. The technology has been used to fabricate thermohaeter arrays for temperature profile measurement during hypertherminal treatment of cancer. An array consists of 20 silicon islands; each island contains one p-n diode, which is used as a thermometer. These linear arrays are 1 mm wide by 0.4 mm thick, with 20-µm-wide by 1-µm-thick gold interconnects on 40-µm centers. The flexible array technology is currently being modified to fabricate two-dimensional arrays of micromechanical sensors for robotic and biomedical uses.     

High-performance inductors integrated on porous silicon

To study the substrate effect on inductor performance, several types of spiral inductors were fabricated on porous silicon (PS), p/sup -/ and p/sup +/ silicon substrate. /spl pi/-network analysis results show that the use of PS effectively reduces the shunt conductance and capacitance. The analysis further shows that the use of PS significantly reduces the eddy current portion of series resistance of inductor, leading to slower increase of the apparent series resistance with increasing frequency. Higher Q-factor and resonant frequency (f/sub r/) result from the reduced shunt conductance, shunt capacitance, and frequency dependence of series resistance. Inductors fabricated on PS regions are subjected to a much less stringent set of constraints than those on bulk Si substrate, allowing for much higher inductance to be achieved without severe sacrifice in Q-factor and f/sub r/. Similarly, much higher Q-factor can be obtained for reasonable inductance and f/sub r/.     

RF inductors and capacitors integrated on silicon chip by CMOS compatible Cu interconnect technology

High-Q inductors and high-density capacitors have been designed and fabricated with a post-process of additional metal layers on the top of interconnect layers. The fabrication was carried out with advanced Cu interconnect technology, which was compatible with nowadays CMOS backend of line. The Q_max of inductors with inductance from 0.4 to 11 nH was over 11 on low-resistivity silicon substrates. Two kinds of structures of on-chip capacitors, MIM and MIMIM, have been studied. A capacitance of 1.75 fF/μm² has been achieved with MIMIM structure using Si₃N₄ as dielectric.     

Physical modeling of spiral inductors on silicon

This paper presents a physical model for planar spiral inductors on silicon, which accounts for eddy current effect in the conductor, crossover capacitance between the spiral and center-tap, capacitance between the spiral and substrate, substrate ohmic loss, and substrate capacitance. The model has been confirmed with measured results of inductors having a wide range of layout and process parameters. This scalable inductor model enables the prediction and optimization of inductor performance     

Purification of inductors and improvement of phase noise in monolithic differential LC-VCOs

A novel idea for the improvement of phase noise in differential LC-VCOs with no degradation of power consumption is proposed. Being based on purification of inductors to enhance the quality factor (Q), the application of the idea in design of CMOS based Giga Hertz (GHz) range low power and low phase noise monolithic differential LC-VCOs is illustrated and analyzed. Post-layout simulations using CMOS 0.18 μm TSMC RF design kit are used for evaluation.     

Stacked inductors and transformers in CMOS technology

A modification of stacked spiral inductors increases the self-resonance frequency by 100% with no additional processing steps, yielding values of 5 to 266 nH and self-resonance frequencies of 11.2 to 0.5 GHz. Closed-form expressions predicting the self-resonance frequency with less than 5% error have also been developed. Stacked transformers are also introduced that achieve voltage gains of 1.8 to 3 at multigigahertz frequencies. The structures have been fabricated in standard digital CMOS technologies with four and five metal layers     

Micromachined planar inductors on silicon wafers for MEMSapplications

This paper describes three micromachined planar inductors (a spiral type, a solenoid type, and a toroidal meander type) with electroplated nickel-iron permalloy cores which have been realized on a silicon wafer using micromachining techniques. The electrical properties among the fabricated inductors are compared and the related fabrication issues are discussed, with emphasis on the low-temperature CMOS-compatible process, the high current-carrying capacity, the high magnetic flux density, the closed magnetic circuits, and the low product cost. The micromachined on-chip inductors can be applied for magnetic microelectromechanical systems devices, such as micromotors, microactuators, microsensors, and integrated power converters, which envisages new micropower magnetics on a chip with integrated circuits     

Multilevel-spiral inductors using VLSI interconnect technology

A multilevel-spiral (MLS) inductor structure for implementation in VLSI interconnect technology is presented. Inductances of 8.8 and 32 nH and maximum quality-factors (Q) of ~6.8 and 3.0, respectively, are achieved in a four-level metal BiCMOS technology, with four turns at each of the two or four stacked spiral coils and with an area of 226×226 μm². The comparison of the MLS inductors to different single-level-spiral (SLS) control devices shows that a MLS inductor provides the same inductance at ~50% dc resistance, but the maximum Q is typically measured at a lower frequency and the self-resonance frequency is reduced due to a high inter-wire capacitance     

RF circuit design aspects of spiral inductors on silicon

The design and optimization of spiral inductors on silicon substrates, the related layout issues in integrated circuits, and the effect of the inductor-Q an the performance of radio-frequency (RF) building blocks are discussed. Integrated spiral inductors with inductances of 0.5-100 nH and Q's up to 40 are shown to be feasible in very-large-scale-integration silicon technology. Circuit design aspects, such as a minimum inductor area, the cross talk between inductors, and the effect of a substrate contact on the inductor characteristics are addressed. Important RF building blocks, such as a bandpass filter, low-noise amplifier, and voltage-controlled oscillator are shown to benefit substantially from an improved inductor-Q     

CMOS-compatible surface-micromachined suspended-spiral inductors for multi-GHz silicon RF ICs

Fully CMOS-compatible, highly suspended spiral inductors have been designed and fabricated on standard silicon substrates (1/spl sim/30 /spl Omega//spl middot/cm in resistivity) by surface micromachining technology (no substrate etch involved). The RF characteristics of the fabricated inductors have been measured and their equivalent circuit parameters have been extracted using a conventional lumped-element model. We have achieved a high peak Q-factor of 70 at 6 GHz with inductance of 1.38 nH (at 1 GHz) and a self-resonant frequency of over 20 GHz. To the best of our knowledge, this is the highest Q-factor ever reported on standard silicon substrates. This work has demonstrated that the proposed microelectromechanical systems (MEMS) inductors can be a viable technology option to meet the today's strong demands on high-Q on-chip inductors for multi-GHz silicon RF ICs.     

High Q microwave inductors on silicon by surface tensionself-assembly

A new technique is presented for the fabrication of three-dimensional metal structures by surface tension-induced folding of flat structures. This fully parallel, low temperature method is suitable for post-processing on integrated circuits, and in a first application is used to decouple inductors for radio and microwave-frequency integrated circuits from their substrates, to reduce losses and parasitic capacitance. Meandered microwave inductors have been fabricated on a low resistivity silicon substrate. A peak Q of 10 was measured at 1 GHz, for a 2 nH inductor standing vertically, compared to a peak Q of 4 for the same structure before self assembly     

On the design of RF spiral inductors on silicon

This review of design principles for implementation of a spiral inductor in a silicon integrated circuit fabrication process summarizes prior art in this field. In addition, a fast and physics-based inductor model is exploited to put the results contributed by many different groups in various technologies and achieved over the past eight years into perspective. Inductors are compared not only by their maximum quality factors (Q/sub max/), but also by taking the frequency at Q/sub max/, the inductance value (L), the self-resonance frequency (f/sub SR/), and the coil area into account. It is further explained that the spiral coil structure on a lossy silicon substrate can operate in three different modes, depending at first order on the silicon doping concentration. Ranging from high to low substrate resistivity, inductor-mode, resonator-mode, and eddy-current regimes are defined by characteristic changes of Q/sub max/, L, and f/sub SR/. The advantages and disadvantages of patterned or blanket resistive ground shields between the inductor coil and substrate and the effect of a substrate contact on the inductor are also addressed in this paper. Exploring optimum inductor designs under various constraints leverages the speed of the model. Finally, in view of the continuously increasing operating frequencies in advancing to new generations of RF systems, the range of feasible inductance values for given quality factors are predicted on the basis of optimum technological features.     

A lumped scalable model for silicon integrated spiral inductors

A lumped scalable model for spiral inductors in silicon bipolar technology has been developed. The effect of three different cross sections on inductor performance was first investigated by comparing experimental measurements. Using both the results of this analysis and three-dimensional electromagnetic simulation guidelines, several circular inductors were integrated on a radial patterned ground shield for model validation purposes. The model employs a novel equation for series resistance with only one fitting parameter extracted from experimental measurements. All other model elements were related to technological and geometrical data by using rigorous analytical equations. The model was validated using one- and two-port measured performance parameters of 45 integrated inductors, and excellent agreement was found for all considered geometries up to frequencies well above self-resonance.     

Metallization proximity studies for copper spiral inductors on silicon

The impacts of metallization proximity for copper spiral inductors on silicon have been investigated in this paper. Performance of the spiral inductor versus area consumption tradeoff with respect to its core diameter is evaluated quantitatively for the first time. Effects of the inductor's proximate grounded metallization on its overall inductive performance are also analyzed.     

Fabrication and performance of novel RF spiral inductors on silicon

This paper presents and discusses the fabrication and the performance of RF circular spiral inductors on silicon. The substrate materials underneath the inductor coil are removed by wet etching process. In the fabrication process, fine polishing of the photoresist is used to simplify the processes and ensure the seed layer and the pillars contact perfectly, and dry etching technique is used to remove the seed layer. The results show that Q-factor of the novel inductor is greatly improved by removing the silicon underneath the inductor coil. The spiral inductor for line width of 50 μm has a peak Q-factor of 17 at frequency of 1 GHz. The inductance is about 3.2 nH in the frequency range of 0.05-3 GHz and the resonance frequency of the inductors is about 6 GHz. If the strip is widened to 80 μm, the peak Q-factor of the inductor reduces to about 10 and the inductance is 1.5 nH in the same frequency range.