物理真随机数发生器的设计

为了得到平稳的随机信号,设计了一种应用于智能卡的物理真随机数发生器。采用振荡采样的方法将噪声源产生的抖动噪声转变为随机数。同时,在发生器输出级运用由异或链、线性反馈移位寄存器组成的后处理模块,消除外部干扰导致随机数发生器产生的偏差和自相关性。通过设计在线检测电路,实时检测随机序列的质量。理论研究和仿真测试证明,该方案能生成均匀、彼此独立的随机信号。     

随机数发生器检测与设计

随机数常作为密钥、初始化向量或密码协议中的时变参数,在密码应用中起到非常重要的作用。根据密码应用对随机性的要求,随机数生成器的输出序列必须满足随机性和不可预测性要求。文中分析了随机数生成器和伪随机数生成器两种生成器模型,给出了常用的随机性检测方法,以及可能的安全攻击方法,最后提出了一种随机性检测新方法。该方法基于输出样本的每比特的信息熵估计,可用于随机数发生器设计过程中的随机性评估。     

八维广义同步系统在伪随机数发生器中的应用

该文提出一类4维离散系统。利用系统平衡点处 Jacobi 矩阵的特征值来分析系统在平衡点处的稳定性,建立了一个判别这类系统为周期或混沌的定理。依据该定理构造了一个新的4维离散系统。该系统具有正的Lyapunov指数,数值模拟显示该系统的动力学行为具有混沌特性。结合该系统和系统广义同步定理构造了一个8维广义同步混沌系统。利用该系统构造了一个16 bit混沌伪随机数发生器 (CPRNG),其密钥空间大于21245。利用FIPS 140-2 检测/广义FIPS 140-2检测判别标准分别检测由CPRNG, Narendra RBG, RC4 PRNG和ZUC PRNG生成的1000个长度为20000 bit的密钥流的随机性。检测结果表明,分别有100%/99%, 100%/82.9%, 99.9%/ 98.8%和100%/97.9%密钥流通过FIPS 140-2检测/广义FIPS 140-2 检测标准。数值仿真显示不同密钥流之间有平均50.004%不同码。结果说明设计的伪随机数发生器有好的随机性,可以抵抗穷尽攻击。该文提出的CPRNG为密码安全的研究与发展提供了新的工具。     

基于振荡器的高性能真随机数发生器

设计了一种应用于信息安全SoC平台的基于振荡器的高性能真随机数发生器,其利用放大的电阻热噪声来增大慢振荡器的抖动,使得前后两次采样相互独立,提高了序列的随机性能。采用T触发器采样消除快振荡器占空比偏差的影响。真随机数发生器采用TSMC 0.25μm CMOS工艺,输出速率达4Mbps,通过NIST FIPS140-1和SP800-22中的各项测试。芯片面积为0.09mm2,工作电压为2.5V,功耗为4.15mW。     

基于电阻热噪声的真随机数发生器设计

本文分析和设计了一种基于电阻热噪声的真随机数发生器，系统内部集成了失调控制系统．用以提高随机性能，系统时钟达到4MHz，并采用Chartered-0．35μm-3．3V的工艺模型进行了HSPICE仿真。输出速率可以达到2Mb／s。     

真随机数在数字图像加密中的应用

针对伪随机数在数字图像加密中保密性不佳的缺点,提出了利用真随机数对数字图像像素序列进行异或的加密算法.加密前对原图像进行基于Arnold变换的图像分块置乱,在接收方进行异或解密、Arnold变换周期还原获得原图像,加密过程简单,图像置乱提高了保密性.经实验证明,加密后图像的像素相关性小,具有良好的抗剪切攻击和抗噪声性能.     

一种无记忆的真随机数发生器

基于传统的振荡采样电路,设计了一种无记忆的真随机数发生器,从理论上保证了输出是相互独立的.采用弹性函数作为后处理,以较小的硬件代价改善了随机数的统计性能.用纯数字电路在FPGA平台上实现,并验证了该真随机数发生器的性能.测试结果表明该真随机数发生器具有较高的数据输出率和良好的统计特性,适合应用于密码系统中.     

一种基于混沌原理的真随机数发生器

选取一维分段线性混沌映射函数设计真随机数发生器的随机源,具体分析了函数中各参数对输出序列随机性和电路稳定性的影响.通过改进函数在混沌吸引盆外的映射关系,成功解决了真随机源电路在各种噪声干扰和器件失配影响下所可能存在的失效问题,显著提高了电路的稳定性.该混沌函数以电压作为迭代变量,电路采用了负反馈形式的运放、采样保持电路和逻辑判断电路等模块,并运用了电荷再分配技术.以该随机源构成的真随机数发生器不但具有理想的随机性,在1M bit/s的输出速率下,平均功耗不超过0.3mW,可广泛应用在SoC等嵌入式环境中.     

一种高速低功耗真随机数发生器

提出了一种基于环形振荡器采样结构的高速低功耗真随机数发生器(TRNG).其随机性源自环形振荡器的抖动,4个长度互为质数的振荡器链构成了熵源.对振荡器的输出进行异或运算,提高了随机特性,并从数学上予以证明.输出序列经冯诺依曼矫正器进行纠偏,可完全消除比特位间的偏置性.设计了一种精巧的扩散函数,对输出序列做映射处理,进一步提高了其随机特性和分布特性.测试结果表明,TRNG输出比特流通过了Diehard和NIST SP 800-22的系列测试,比特率达20Mb/s.采用0.18μm CMOS工艺设计实现,面积为0.0135mm2,3.3V供电时功耗仅为0.75mW,适合在高速片上加密系统中应用.     

一种基于FPGA实现的真随机数发生器

本文分析和实现了一种基于FPGA的真随机数发生器,采用对延迟链各级输出同时采样的方法来增加输出序列的随机性。电路为纯数字形式,50MHz采样时钟采得的输出数据可以无需后处理,直接通过随机性测试,且未发现随机性与采样频率存在显著联系。     

Boolean-chaos-based physical random number generator

A novel method for generating physical random numbers using Boolean-chaos as the entropy source was proposed.An autonomous Boolean network (ABN) without self-feedback was constructed by using two-input logic gates,and its dynamic characteristics were analyzed.Based on this,a 15-node ABN circuit was implemented to successfully generate Boolean-chaos with a bandwidth of ~680 MHz and a min-entropy around 1.By implementing the entropy source and the entropy extraction circuit on a single FPGA,the physical random number generation with a real-time rate of 100 Mbit/s was finally achieved.The NIST SP800-22 and DIEHARD randomness test results demonstrate that the obtained random sequences by the method successfully pass all tests.This indicates the random numbers has good random statistical characteristics.     

Simple binary random number generator

A random number generator based on forcing metastable operation in a CMOS latch is presented. Sequences produced by this generator have passed standard tests, exhibiting a reasonable random behaviour.<>     

Ao基于振荡采样的真随机数发生器设计与实现

基于时钟振荡采样原理,提出一种真随机数发生器结构。利用噪声源数学模型保证噪声源的可靠,利用并行输出及控制的方式确保随机数的输出速率,参考FIPS 140-2设计在线随机测试模块以避免遭受硬件篡改问题。通过测试表明,序列的产生速率可达33.5Mb/s,且具有较高的质量,可应用于密码芯片等相关领域产品中。     

Compact floating-gate true random number generator

A compact true random number generator (RNG) integrated circuit with adjustable probability is presented. Hot-electron injection is used in a floating-gate MOSFET to program the probability. Measurements show no cross-correlation between adjacent RNG circuits, allowing multiple RNGs to be easily integrated     

Development of micro computer based mobile random number generator with an encryption application

In this study, an equation is derived by changing the parameter values of a chaotic system in the literature and analyzing its chaotic behavior. In the analysis of chaotic behaviors, chaotic system analyses such as phase portraits, sensitivity to initial conditions, Lyapunov exponential spectrum and dimension analysis, bifurcation diagram with Matlab® software were investigated. The derived equations were embedded into a mobile random number generator (RNG). RNG was developed on the Raspberry Pi 3 Model B microcomputer. It has been shown that the obtained random numbers can be securely used in encryption applications by successfully passing the statistical tests NIST 800-22, FIPS 140-1 and ENT. An image encryption application with the generated random numbers was implemented on the Raspberry Pi 3 Model B microcomputer. Finally, the encrypted image was subjected to security tests such as histogram analysis, correlation and entropy coefficients, correlation card, NPCR, UACI utilizing MATLAB software. The performance and reliability of the encryption algorithm were also measured. This paper improves the current state of art as it implements chaotic random number generation algorithm in a small footprint micro computer.     

FPGA and USB based control board for quantum random number generator

The design and implementation of FPGA-and-USB-based control board for quantum experiments are discussed. The usage of quantum true random number generator, controllogic in FPGA and communication with computer through USB protocol are proposed in this paper. Programmable controlled signal input and output ports are implemented. The error-detections of data frame header and flame length are designed. This board has been used in our decoy-state based quantum key distribution （QKD） system successfully.     

一种基于FPGA的真随机数发生器设计与实现

设计并实现了一种基于FPGA的真随机数发生器,利用一对振荡环路之间的相位漂移和抖动以及亚稳态作为随机源,使用线性反馈移位寄存器的输出与原始序列运算作为后续处理。在Xilinx Virtex-5平台的测试实验中,探讨了振荡器数量以及采样频率等参数对随机序列的统计特性的影响。测试结果表明本设计产生的随机序列能够通过DIEHARD测试,性能满足要求。由于仅使用了普通逻辑单元,使得本设计能够迅速移植到ASIC设计,大大缩短了开发周期。     

Development of a new composite pseudo random number generator

We develop a new composite pseudo random number generator called the Composite Sherif-Dear (CSD) generator. The proposed generator satisfies stringent theoretical criteria for the quality of the sequence it produces; and is easy to understand and implement in a portable way.     

A new dual entropy core true random number generator

The entropy produced by a conventional single chaotic map based true random number generator (TRNG) is usually limited due to the finite number of Lyapunov exponents. In this work, we present a new dual entropy core TRNG architecture which is capable of producing high levels of randomness using hardware redundancy. Mathematical models of conventional and proposed TRNG architectures have been developed for a comparative analysis of the statistical and randomness properties. Our theoretical studies showed that the proposed architecture which employs Bernoulli map as the entropy source, has an inherently symmetric probability density function with zero mean. Using a practical information metric, T-entropy, we demonstrated that the proposed architecture performs better in terms of randomness, for a wide range of control parameter values when compared to its single entropy core counterpart. A proof of concept prototype of the proposed architecture is designed and implemented using a field programmable analog array integrated circuit. Random numbers acquired from the prototype have successfully passed all NIST 800.22 statistical tests.     

Design of efficient CMOS ring oscillator-based random number generator

Although studies have investigated the effects of flicker noise on randomness, such effects demand further examination. Despite the random nature of flicker noise, a coloured distribution is observed in the power spectral density of flicker noise, indicating to a correlation in between adjacent samples. Studies have employed ring oscillators (ROs) that produce random numbers by sampling the digitised analogue signals of their outputs. This sampling procedure may change the spectral properties of flicker noise resulting from the folding effect of noise. Another topic of interest regarding sampled flicker noise is its random behaviour. To investigate the contribution of flicker noise, white noise, and their combination to randomness, we produce synthetic bit streams of these noise sources. From observations, we find that flicker noise contributes to the entropy of bit streams. Using the generated synthetic bit streams, we also explore the entropy dependence of a bit stream on the sampling period and analyse and compare the entropy levels of the outputs of ROs operating in strong and weak inversion. Results of the comparison demonstrate that only one RO operating in weak inversion may be sufficient to attain the required entropy level for qualifying the generated bit stream as random. The results of the analysis are also confirmed by measurements. In addition, the paper proposes an efficient design of a RO-based random number generator.