集成运放的非线性失真分析及电路应用

集成运放差分放大电路的非线性失真分析,可以用来对集成运放电路特性进行优化设计,抑制带内各次谐波的产生。对双集成运放AD8062的非线性参数分析,优化其外围电路的连接方式,减小共模输入电压,实现了集成运放的线性输出。AD8062的电路优化设计提高了ISM频段定位系统接收前端射频电路增益,有效抑制了各次谐波的产生,输出信号幅度满足后端A/D采样器的门限要求。     

一种超宽带伪差分跨导放大器

提出了一种超宽带伪差分运算跨导放大器.该放大器通过共模前馈和共模反馈方法使得运算跨导放大器单元具有更为简单的电路结构,易于设计验证并能够稳定工作在较高频率.以该放大器作为单元电路,可以实现截止频率到达百兆赫兹的高频连续时间滤波器,并作为中频滤波器用于射频接收机中.     

Design and applications of an easily integrable CMOS operational floating amplifier for the MegaHertz range

The design and major applications of a general purpose current mode building block are presented in this paper. This circuit is basically a high gain transconductance scheme with differential current output terminals previously termed operational floating amplifier (OFA). The novel structure proposed here is shown to implement a very flexible and high performance amplifier which can be used in almost all applications employing conveyors, current feedback amplifiers or even conventional operational amplifiers with improved performance characteristics. This presentation is also supported by experimental measurements on a prototype circuit realized in CMOS technology.     

Driven-Right-Leg Circuit Design

The driven-right-leg circuit is often used with biopotential differential amplifiers to reduce common mode voltage. We analyze this circuit and show that high loop gains can cause instability. We present equations that can be used to design circuits that minimize common mode voltage without instability. We also show that it is important to consider the reduction of high-frequency interference from fluorescent lights when determining the bandwidth of the drivenright-leg circuit.     

Quadrature Oscillators with Grounded Capacitors and Resistors Using FDCCIIs

Two current‐mode and/or voltage‐mode quadrature oscillator circuits each using one fully‐differential second‐generation current conveyor (FDCCII), two grounded capacitors, and two (or three) grounded resistors are presented. In the proposed circuits, the current‐mode quadrature signals have the advantage of high‐output impedance. The oscillation conditions and oscillation frequencies are orthogonally (or independently) controllable. The current‐mode and voltage‐mode quadrature signals can be simultaneously obtained from the second proposed circuit. The use of only grounded capacitors and resistors makes the proposed circuits ideal for integrated circuit implementation. Simulation results are also included.     

Design and implementation of monostable multivibrators employing differential voltage current conveyors

In this paper, two novel application circuits utilizing the differential voltage current conveyor (DVCC) are introduced and implemented. To the best knowledge of authors, this is the first reported monostable multivibrators employing DVCC device. Each presented circuit is constructed by single DVCC as the basic active building block together with a few passive components. Both of them can be operated via a positive-edge triggering signal to generate a pulse waveform with an adjustable width. The first one is a general monostable circuit. The second design is an improved construction, which shortens the recovery time for applying the consecutive triggering signals. The circuit operations are first described and then the non-ideal issues and design considerations of the proposed circuits are discussed. To demonstrate their feasibility, the presented circuits are simulated using circuit simulation program Is-Spice. Available commercial ICs and discrete components are used to implement the prototype circuits. Simulation and experimental results agree well with the theoretical analysis.     

OTA-based monostable multivibrators with current tuning properties

This paper presents two new monostable multivibrator circuits based on operational transconductance amplifiers (OTAs). Both configurations use two OTAs with a few passive components. The first circuit is operated under the positive-edge triggering mode, and the second one is a negative-edge triggering mode design. The width and height of the output pulse are tunable via the bias current of OTAs or an external resistor. The proposed monostable multivibrators are more compact compared to the existing designs. In order to verify the feasibility of the presented circuits, prototypes are implemented, using commercial ICs and discrete components. In addition, the circuit principles are described and analyzed in detail. Experimental results are close to the theoretical analysis.     

A Simple Schmitt Trigger Circuit with Grounded Passive Elements and Its Application to Square/Triangular Wave Generator

This paper introduces a new simple Schmitt trigger circuit using a plus-type differential voltage-current conveyor (DVCC+) and only two grounded resistors. The proposed circuit is very simple and enjoys adjustable lower and higher threshold voltages as well as the output saturation levels. The application of the proposed Schmitt trigger circuit to the square/triangular wave generator is also given. Moreover, a current feedback operational amplifier (CFOA)-based square/triangular wave generator is derived from the proposed DVCC+-based circuit. Simulation and experimental results are presented to exhibit the performance of the proposed circuits.     

A transconductance driven-right-leg circuit

Biopotential measurements are very sensitive to electromagnetic interference (EMI). EMI gets into the acquisition system by many ways, both as differential and common mode signals, driven-right-leg circuits (DRL) are widely used to reduce common mode interference. This paper reports an improvement on the classic DRL. The proposed circuit uses a transconductance amplifier to drive the patient's body. This configuration has some interesting properties, which provide an extended bandwidth for high-frequency EMI rejection (such as fluorescent lights interference). The improvement is around 20 dB for frequencies of few kilohertz and the circuit is easy to compensate for stability. A comparative analysis against a typical DRL is presented, the results obtained have been experimentally tested.     

A New Automated Design Method Based on Machine Learning for CMOS Analog Circuits

A new simulation based automated CMOS analog circuit design method which applies a multi-objective non-Darwinian-type evolutionary algorithm based on Learnable Evolution Model (LEM) is proposed in this article. The multi-objective property of this automated design of CMOS analog circuits is governed by a modified Strength Pareto Evolutionary Algorithm (SPEA) incorporated in the LEM algorithm presented here. LEM includes a machine learning method such as the decision trees that makes a distinction between high- and low-fitness areas in the design space. The learning process can detect the right directions of the evolution and lead to high steps in the evolution of the individuals. The learning phase shortens the evolution process and makes remarkable reduction in the number of individual evaluations. The expert designer’s knowledge on circuit is applied in the design process in order to reduce the design space as well as the design time. The circuit evaluation is made by HSPICE simulator. In order to improve the design accuracy, bsim3v3 CMOS transistor model is adopted in this proposed design method. This proposed design method is tested on three different operational amplifier circuits. The performance of this proposed design method is verified by comparing it with the evolutionary strategy algorithm and other similar methods.     

Design of a DTCTGAL circuit and its application

By research on the switch-signal theory for multiple-valued logic circuits, the theory of three essential elements and the principle of adiabatic circuits, a design scheme for a double power clock ternary clocked transmission gate adiabatic logic (DTCTGAL) circuit is presented. The energy injection and recovery can be conducted by the bootstrapped NMOSFET, which makes the circuit maintain the characteristics of energy recovery as well as multiple-valued input and output. An XOR/XNOR circuit based on DTCTGAL is also presented using this design scheme. Finally, using the parameters of a TSMC 0.25 μm CMOS device, PSPICE simulation results indicate that the proposed circuits have correct logic and significant low power characteristics.     

A current-/voltage-controlled four-slope operation square-/triangular-wave generator and a dual-mode pulse width modulation signal generator employing current-feedback operational amplifiers

This paper presents a current-feedback operational amplifier (CFOA)-based current-/voltage-controlled four-slope operation square-/triangular-wave generator. The proposed circuit can adjust the duty cycle of the output waveforms in a current- or voltage-controlled manner, and an external resistor is used to independently control its oscillation frequency. In addition, the DC level of the triangular wave can be adjusted by tuning an input voltage source. This paper also presents a CFOA-based dual-mode pulse width modulation (PWM) signal generator derived from the proposed square-/triangular-wave generator. The literature review in this paper includes previous designs, circuit operations, and the non-ideal effects and design considerations of the proposed circuits. Prototype circuits built with commercially available CFOA integrated circuits (ICs) (AD844ANs) and discrete passive components were used to execute experimental tests to verify the feasibility of the proposed circuits. The experimental results of this study are in agreement with the theoretical analysis.     

具有背景抑制功能的长波红外读出电路

为了提高红外焦平面检测目标的灵敏度，目标辐射产生的载流子应尽可能长时间保持，同时应尽可能减少热激发和背景辐射激发的比例。高背景条件下长波红外读出电路的积分电容较快饱和，且长波红外探测器暗电流的非均匀性会影响焦平面的固定图形噪声。基于共模背景抑制结构以及长波碲镉汞探测器暗电流分析的基础上，设计了具有非均匀性矫正的背景抑制电路。传统的背景抑制电路采用单一共模背景抑制或差模背景抑制。差模背景抑制模块的高精度背景记忆一般在小范围区间内。本文背景抑制结构采用共模背景抑制与差模背景抑制相结合，可以在较大的背景噪声范围内有效地降低固定图形噪声以及增大动态范围。该背景抑制结构中共模背景抑制采用电压-电流转换法，差模背景抑制采用电流存储型背景抑制结构。差模背景抑制通过背景记忆时信号放大，背景抑制时信号缩小来提高背景抑制精度。电路采用标准CMOS工艺流片。测试结果表明:读出电路的FPN值为2.08 mV。未开启背景抑制时，焦平面FPN值为48.25 mV。开启背景抑制后，焦平面FPN值降至5.8 mV。基于探测器的暗电流非均匀分布，计算其理论FPN值为40.9 mV。长波红外焦平面输出信号的RMS噪声在0.6 mV左右。     

A low-power low-jitter DLL with a differential closed-loop duty cycle corrector

This paper presents an optimization-based design methodology for fully differential amplifiers (FDAs) including the effects of real common-mode feedback (CMFB) circuits as constraints in the design flow. The sizing procedure is performed separately for the main amplifier and for the CMFB circuit, reducing the number of free variables and exploring the design space in a more efficient way. Also, this methodology can be employed to design single and two-stages FDAs whereas a second pole compensation scheme is necessary. In order to validate the proposed methodology, a two-stage fully differential amplifier with a no capacitor feed-forward (NCFF) compensation technique was designed in 0.13 μm CMOS technology with a 1.2 V power supply. The presented results also include a pole-zero pair mismatch analysis and proposes a solution in order to compensate the generated pole-zero doublet that might affect the performance of the amplifier. We can show that this approach reduces the overall static power consumption while satisfying the design specifications.     

一种高CMRR和PSRR的共源共栅放大器

针对传统运算放大器共模抑制比和电源抑制比低的问题,设计了一种差分输入结构的折叠式共源共栅放大器。本设计采用两级结构,第一级为差分结构的折叠式共源共栅放大器,并采用MOS管作为电阻,进一步提高增益、共模抑制比和电源电压抑制比;第二级采用以NMOS为负载的共源放大器结构,提高增益和输出摆幅。基于LITE—ON40V1．0μm工艺,采用Spectre对电路进行仿真。仿真结果表明,电路交流增益为125．8dB,相位裕度为62.8°,共模抑制比140．9dB,电源电压抑制比125．5dB。     

A new active clamping zero-voltage switching PWM current-fed half-bridge converter

A new active clamping zero-voltage switching (ZVS) pulse-width modulation (PWM) current-fed half-bridge converter (CFHB) is proposed in this paper. Its active clamping snubber (ACS) can not only absorb the voltage surge across the turned-off switch, but also achieve the ZVS of all power switches. Moreover, it can be applied to all current-fed power conversion topologies and its operation as well as structure is very simple. Since auxiliary switches in the snubber circuit are switched in a complementary way to main switches, an additional PWM IC is not necessary. In addition, it does not need any clamp winding and auxiliary circuit besides additional two power switches and one capacitor while the conventional current-fed half bridge converter has to be equipped with two clamp windings, two ZVS circuits, and two snubbers. Therefore, it can ensure the higher operating frequency, smaller-sized reactive components, lower cost of production, easier implementation, and higher efficiency. The operational principle, theoretical analysis, and design considerations are presented. To confirm the operation, validity, and features of the proposed circuit, experimental results from a 200-W, 24-200Vdc prototype are presented.     

Computer aided analysis and design of MOS translinear circuits operating in strong inversion

Recently, it was proposed to generalize the well-known translinear circuit principle in such a way that it also applies to MOS transistors operated in strong inversion. In this paper, the MOS translinear (MTL) principle will be briefly reviewed. A graphical analysis method for MTL-circuits is presented, which can also be applied to bipolar translinear circuits. This graphical method was implemented in a computer program, which is now used as an interactive design tool to implement nonlinear signal processing functions by MTL circuits.     

Four new oscillators using operational transresistance amplifier

In this paper, four new sinusoidal waveform generators based on the operational transresistance amplifier (OTRA) are presented. The first proposed circuit is a minimum component RC sinusoidal oscillator circuit with one OTRA and a few passive components. The second and third proposed circuits consist of one OTRA and a few passive components, among them two passive components are connected to ground. These circuits are able to control the condition of oscillation and frequency of oscillation independently. The fourth proposed quadrature oscillator circuit uses two OTRAs as main active building blocks and a few external passive components to generate the oscillations. The IC AD844AN is adopted to implement the proposed circuits on a laboratory breadboard with external passive components. Both the SPICE simulation and experimental results are given to verify the theoretical analysis of the proposed circuits.     

Applications of the current feedback operational amplifiers

The current feedback operational amplifiers (CFOAs) are receiving increasing attention as basic building blocks in analog circuit design. This paper gives an overview of the applications of the CFOAs, in particular several new circuits employing the CFOA as the active element are given. These circuits include differential voltage amplifiers, differential integrators, nonideal and ideal inductors, frequency dependent negative resistors and filters. The advantages of using the CFOAs in realizing low sensitivity universal filters with grounded elements will be demonstrated by several new circuits suitable for VLSI implementation. PSPICE simulations using the AD844-CFOA which indicate the frequency limitations of some of the proposed circuits are included.     

Electronically tunable current-mode instrumentation amplifier with high CMRR and wide bandwidth

A current-mode instrumentation amplifier consists of only two current follower differential input transconductance amplifiers is proposed in this paper. The proposed circuit of instrumentation amplifier is realized without using any passive components. Thus, the proposed circuit structure is very simple and suitable to the integrated circuit technology. The input impedance is low and output impedance is high, therefore the proposed circuit is easily cascadable. The gain of the proposed instrumentation amplifier is electronically controllable. The proposed circuit also enjoys the features of high common mode rejection ratio, wide bandwidth and low power consumption. Additionally, performance of the proposed circuit is tested under process, supply voltage and temperature variations. Furthermore, another circuit of instrumentation amplifier, which is capable of providing higher differential mode gain is also shown. The non-ideal and parasitic studies are included. HSPICE simulations are performed to validate the proposed circuits of instrumentation amplifier.