虚拟软件在农村有线广播指标验收测试中的应用

RightMark Audio Analyzer是一款独立的音频系统测试工具,可以检测声卡和其他实时声音设备的Electroacoustical表现,通过播放检测信号并记录其通过测试设备后的信号特征来实现测试,它能完成许多价格昂贵的专业仪器才能完成的工作,其测试项目有频率响应、信噪比、动态范围、总谐波失真、立体声分离度和互调失真,其中,频率响应和总谐波失真是农村有线广播指标验收测试最重要的两项.     

失真限制的有效频率范围的System Two测试

1 引言失真限制的有效频率范围是衡量放大器电性能优劣的一个重要指标,反映了放大器失真限制在额定总谐波失真时其有效频率的范围。该参数涉及频率、总谐波失真及输出电压3个物理量,且频率改变同时引起总谐波失真、输出电压的改变,利用一般的测量,数据多、工作量大,测量很麻烦。这里介绍利用美国Audio Precision公司开发的System Two与APWIN软件包组成的音频测试系统,根据失真限制的有效频率范围的物理意义、测量原理,对各控制面板进行多次不同设置、选项,通过测试比较,最后总结得到一种快捷可靠的测试方法,并实时绘出所测的…     

扬声器测量系统

本文讨论一种新型高精度电、声测量系统。它的设计以模拟电路为主。辅以Ｚ８０Ａ微处理芯片和存诸器。其特点是高精度、高稳定度，高速度并用数字显示，介绍了这类测量系统的特点，特别指出采用的一些新的技术措施。最后讨论了计权失真测量方法，在测量系统中利用谐波失真计权网络使测得的总谐波失真数值能相应于人们实际的听觉感觉。     

微波功率放大器互调失真与数字基带预失真线性化技术

针对现代通信信号电磁环境模拟器对谐波和互调失真的战术技术指标要求,介绍了一种用数字基带预失真技术对微波功率放大器进行线性化来有效地抑制信号的二、三次谐波和减小三阶互调分量的新方法,并对数字基带预失真线性化系统的工作原理进行了详尽地论述。分析结果表明,数字基带预失真技术不失为微波功率放大器线性化技术的新方法,完全有可能满足现代通信信号电磁环境模拟器对谐波和互调失真的技术指标要求。     

1.8Vpp 250MS/s低谐波失真流水线ADC

采用40nm CMOS工艺设计了一款在250MS/s采样率下具有1.8Vpp满摆幅和低谐波失真性能的流水线ADC（Analog-to-Digital Converter）.针对传统源跟随器结构的输入缓冲器在大摆幅下驱动大采样电容时线性度恶化的问题,采用了改进型电流注入技术和漏端电压自举技术.ADC中实现采样和电荷转移功能的开关采用薄栅器件设计,其工作电压由片上LDO（Low Dropout Regulator）提供,在降低开关寄生和电荷注入的同时保障了器件的可靠性.测试结果表明,对于10.1MHz单音输入,该ADC在-1dBFS下的信噪失真比、无杂散动态范围和总谐波失真分别为68.3dB、76.4dBc、-75.1dBc,在-1.57dBFS下的信噪失真比、无杂散动态范围和总谐波失真分别达68.3dB、80.1dBc、-78.6dBc.     

电子元件、组件

TM402005050568xDSL调制解调器变压器总谐波失真的影响因素分析/颜冲,刘九皋,包大新,朱大中(浙江大学信息科学与工程学院信息与电子工程学系)//磁性材料及器件.―2005,36(1).―32～34.数字用户线(xDSL)已广泛用于网络通信技术.总谐波失真(THD)是xDSL技术中调制解调器用变压器的一项非常重要的参数.文章首先介绍了总谐波失真的概念和测试方法,然后叙述了变压器用铁氧体磁心材料、磁心形状和变压器外电路设计对总谐波失真的影响,指出了改善变压器总谐波失真的一般途径.图5表1参9TM406,TM835.42005050569变压器局部放电在线检测中DSI…     

继承出色的技术与经验 Accuphase（金嗓子）DP－600

DP－600 SACD播放机继承了DP－700的技术与经验,处理器部分使用了高速FPGA封装的D／A变换MDSD（Multiple Double Speed DSD）系统,用6个MDS＋＋（Multiple Delta Sigma）数字模拟转换线路并联运作,使声音的精确度、信噪比、动态范围、线性度与总谐波失真的表现提升了许多。数字输出采用HS—Link、同轴／光纤的方式。数字与模拟部分采用分离式的变压器,同时还采用了直接平衡滤波器（Direct Balanced Filter）,最大限度地保证声音输出的纯度。     

激光语音检测系统反正切补偿算法

通过理论分析激光语音检测系统,提出一种引入参数估计误差的反正切解调补偿算法,并建立了系统总谐波失真与关键参数及其误差的定量数学关系式。文中用总谐波失真（THD）和无杂散动态范围（SFDR）分别表征系统微振动信号解调效果和可以与大干扰信号（阻塞信号）相区别的最小信号值。实现了非接触、远距离、高灵敏度的微振动信号检测。通过实验和仿真均验证了反正切补偿算法的可行性。实验结果表明:该系统可以检测音频范围内的微弱振动,在现有光学硬件平台基础上,利用文中提出的反正切补偿算法,能在35 m范围内较好地还原语音信号。     

电子新闻

<正> SZQ—1型高保真音频功率放大器 SZQ—1型高保真音频功率放大器在河北省石家庄研制成功,它是以动态跟随电源和动态偏置电路为核心构成的。经河北省电子产品监督检验所测试,其技术指标为:(1)总谐波失真为0.01％(额定功率输出);(2)频响范围为20Hz～20kHz(在总谐波失真为0.01％、额定功率输出下);(3)频响范围内(20Hz～20kHz)增益不平坦度为土0.01dB;(4)信噪比为94dB;(5)动态范围是93dB;(6)转换速率为70V/μs;(7)额定输出功率为30W×2。     

宽带大动态射频光传输技术

宽带大动态的射频光传输链路是微波光子技术应用的基础。针对射频光传输对链路高动态范围的应用需求,分别介绍了多频点副载波复用数字预失真和多源非线性数字后补偿两种失真线性化技术的原理及其研究进展,这两种方法能较好地抑制信道间的交调失真和信道内的三阶交调失真。同时,将全光下变频技术引入到接收链路中,通过充分利用相位调制线性特性的优势,分析了基于相位调制及相干解调DSP处理的大动态光载射频传输系统,实验得到的宽带射频信号光传输系统的无杂散动态范围达到了128.8 dB.Hz2/3。     

CMOS low-distortion high-frequency variable-gain amplifier

The overall system performance of mixed-signal CMOS IC's is largely determined by the dynamic performance of the analog front-ends. System features are, in contrast, mainly set by the digital architecture. In order to optimize the dynamic range of the system and to minimize the sensitivity to substrate noise, the analog-to-digital converter (ADC) has to be preceded by a variable-gain amplifier (VGA) and a differential circuit topology for the complete front-end to be adopted. Since most of present-day applications are based on single-sided signal source definitions, the differential-input VGA must be able to perform a single-to-differential signal conversion. This paper describes the principle and design of a differential CMOS low-distortion variable-gain amplifier for high-frequency (video) applications. Experimental results of the circuit show total harmonic distortion figures better than -60 dB and a gain accuracy of 0.05 dB over the -2 to +12 dB gain range for single-sided input signals     

Digital correction of PWM switching amplifiers

Pulsewidth modulated (PWM) signals for driving a switching audio amplifier can be synthesized in the digital domain with extremely high linearity and precision. However, nonidealities associated with the power stage degrade output performance. A method to digitally correct for these nonidealities, resulting in very low total harmonic distortion (THD) and high signal-to-noise ratio (SNR) performance, is presented. This method also provides excellent rejection of power supply noise which is otherwise absent in digital PWM amplifiers. To meet noise requirements for hi-fi audio, the feedback structure is a fourth-order structure which shapes the noise beyond the audio band. The method has been implemented on a bread board, and state-of-the-art performance was achieved. Total harmonic distortion of 85 dB and dynamic range of 100 dB was measured using Audio Precision test equipment.     

Analysis of a soft-switched PFC boost converter using analog and digital control circuits

This work presents a comparison between analog and digital (PIC16c73a) control types applied to the boost converter with a nondissipative snubber. Both control types use the bang-bang hysteresis current waveshaping control technique in order to achieve a quasi-unity power factor. The analog control applied presented a high power factor (0.998), high efficiency (92.87%), and low harmonic distortion [total harmonic distortion of current (THDI =2.84% and total harmonic distortion of current (THDV) =2.83%]. The digital control presented a high power factor (0.990), high efficiency (92.46%), and low harmonic distortion (THDI=5.09% and THDV=2.84%).     

数字扬声器系统中失配整形技术的设计与实现

为了改善数字扬声器系统中由扬声器单元之间频响不一致引入的非线性谐波失真,在参考前人研究工作的基础上,给出了基于3bit△∑调制编码方式的3种DEM（Dynamic Element Matching）失配整形算法的设计和实现方法,并在全消声室内测试了3种算法的谐波抑制能力,同时基于测试结果评价了这些算法的性能。     

High efficiency and high fidelity analogue/digital switching mixedmode amplifier

An audio amplifier which combines the advantages of analogue and digital amplifiers is proposed. The high fidelity of an analogue amplifier and high efficiency of a digital amplifier are simultaneously achieved in one system. Experimental results show that the proposed amplifier has 0.005% total harmonic distortion and 90% power efficiency at output =50 W     

A 3-V, 2%-mW multibit current-mode ΣΔ DAC with 100 dBdynamic range

The area ratio of analog to digital for mixed-mode chip has been inversely proportional to the process design rule for a given dynamic range objective, in contradiction to the LSI trend. This paper presents a design approach to realize a high degree of size reduction with process design rules for analog circuitry and a signal processing architecture for digital circuitry. A five-level current-mode ΣΔ digital-to-analog converter (DAC) system reveals full scale total harmonic: distortion plus noise (THD+N) of -90 dB and dynamic-range of 100 dB at 3 V (low power of 22 mW). Analog-area down-scaling can be accomplished by this architecture to be 1.09 mm², using 0.6-μm double-poly double-metal (DPDM) CMOS. For the digital filter, a pipeline instruction sequence with multiplierless architecture also gives small area of 1.98 mm²     

一种用于单相Boost型PFC中的数字预测算法

本文提出了用于数字控制PFC中的一种新颖的数字控制算法,称为预测算法。它可以得到较高的PF值,并且随着输入电压或者负载电流的变化有近似最快的动态响应。对于一个确定的系统,预测算法根据系统当前的状态参数,可以估算出输出电压和电感电流在下一个开关周期的变化趋势,并且得到一组完美跟踪输入电压轨迹最优的控制序列。在多种仿真条件下的仿真结果证实了预测算法的有效性。当输入电压从90V到265V,负载电流从20%~100%范围变化时,PF值都大于0.998。启动时间和恢复时间分别约为0.1s和0.02s,且无超调。实验结果也验证了设计的有效性。     

Pipelined multibit oversampled digital-to-analog converters with capacitor averaging

A combination of pipelined architecture and dynamic element matching technique is applied to multibit oversampled D/A (digital to analog) converters. The approach translates the harmonic distortion components of the nonideal internal DAC (digital-to-analog converter) of the oversampled DAC to high-frequency components, which can then be filtered out by the analog low-pass filter for anti-imaging. Computer simulations have confirmed that with this approach a third-order oversampled DAC employing a 3-bit quantizer, a 3-bit pipelined internal DAC with a random mismatch of 0.1%, can achieve a 94-dB dynamic range with an oversampling ratio of 64 while eliminating the harmonic distortion.This work was supported by NSERC (Canada).     

Self-calibration techniques for a second-order multibit sigma-deltamodulator

Design techniques for self-calibration of the digital-to-analog converter DAC in a multibit sigma-delta modulator are described. When used in conjunction with dynamic element matching, self-calibration provides linearity performance suitable for digital audio applications. The dynamic element matching circuitry provides the mechanism of determining device mismatch for self-calibration. Practical circuit details and an effective calibration method are discussed. Test results from a l-μm CMOS test chip are presented. In this test system, a second-order loop with a 3-b quantizer achieves an 89-dB dynamic range and -91-dB harmonic distortion after calibration. In addition, a new method of detecting the presence of tones is described, using the entropy of the spectrum of the decimation filter output     

A noise-shaping coder topology for 15+ bit converters

A topology for high-precision noise-shaping converters that can be integrated on a standard digital IC process is presented. This topology uses a multibit noise-shaping coder and a novel form of dynamic element matching to achieve high accuracy and long-term stability without requiring precision matching of components. A fourth-order noise-shaping D/A (digital-to-analog) conversion system using a 3-b quantizer and a dynamic element-matching internal D/A converter, fabricated in a standard double-metal 3-μm CMOS process, achieved 16-bit dynamic range and a harmonic distortion below -90 dB. This multibit noise-shaping D/A conversion system achieved performance comparable to that of a 1-bit noise-shaping D/A conversion system that operated at nearly four times its clock rate