用于双栅FET的n~+-n-n~-GaAs多层外延生长

采用Ga/AsCl_3/H_2体系,用SnCl_4作掺杂剂,已生长了用于双栅FET的n~+-n-n~-多层外延材料.在一次外延生长中连续生长的n~+-n-n~-多层外延材料的外延层厚度和载流子浓度的均匀性良好.用该材料制作的双栅FET的微波特性也有明显改善.在2GHz和8GHz下,NF分别为0.9dB和2.8dB,相关增益G_a分别为15.5dB和18dB.     

用卤化物输运法生长高阻掺铬GaAs缓冲层

用一个与 AsCl_3、Ga、H_2方法相似的新的卤化物输运法生长了高阻掺铬外延缓冲层。在改善表面性能和控制由铬引起的生长缺陷方面显示出了良好效果。可重复地获得薄层电阻大于10~9Ω/□的外延层。通过850℃下的退火试验对掺铬外延层的热稳定进行了估价。讨论了包括利用 CrO_2-Cl_2、CrO_3、Cr(CO)_6和 CrCl_2等试剂输运铬的各种反应。给出了由二次离子质谱测量(SIMS)的缓冲层和缓冲层-有源结构中铬浓度的分布数据。对利用光感应瞬态电流光谱学测量的这些外延层的电学性质也进行了讨论。     

关于GaAs多层外延结构C-V曲线的理论分析与实际应用

本文对GaAs FET所用的多层结构外延材料的C-V曲线进行理论分析,以求解释在科研与生产中出现的一些现象.我们提出了有源层以及有源层(A)与缓冲层(B)间界面过渡区C-V曲线的分布函数,并对这些函数及一些影响因素进行了讨论.     

亚微米砷化镓气相双层外延与高阻缓冲层

文中叙述了 6 Gc、12Gc GaAs FET所需双层外延材料的制备工艺,获得了 3—5μm厚高阻缓冲层及 0.2—0.3 μm厚,浓度 1.0—1.5 ×10~。(17)/cm~3,迁移率 4500-4870 cm~2/V·scc的有源层.列出了有无缓冲层的电学数据.材料用于制作FET,在6G_c下噪声系数2.8dB,增益7-9 dB,在 12GC下噪声 3.5 dB增益 4.0 dB. 文中还提出了采用含有AsOCl的AsCl_3来制备高阻缓冲层,文末进行了简短的讨论.     

热壁外延生长的CdTe外延层的研究

本文论述了用热壁外延的方法在CdTe体材料衬底上生长CdTe,并且用各种方法对CdTe外延层进行的研究。为提高衬底材料的质量。我们采用热壁外延方法在CdTe体材料衬底上再外延生长—层CdTe缓冲层,如果外延条件适当,缓冲层一般可使体材料的一部分缺陷消除或减少,好的外延层同经过仔细表面处理的体材料衬底一样是镜面的,因此可直接用作外延HgCdTe     

InP衬底上InAlAs异变缓冲层和高铟组分InGaAs的生长温度优化

利用气态源分子束外延技术在InP衬底上生长了包含InAlAs异变缓冲层的In0.83Ga0.17As外延层.使用不同生长温度方案生长的高铟InGaAs和InAlAs异变缓冲层的特性分别通过高分辨X射线衍射倒易空间图、原子力显微镜、光致发光和霍尔等测量手段进行了表征.结果表明, InAlAs异变缓冲层的生长温度越低, X射线衍射倒易空间图 (004) 反射面沿Qx方向的衍射峰半峰宽就越宽, 外延层和衬底之间的倾角就越大, 同时样品表面粗糙度越高.这意味着材料的缺陷增加, 弛豫不充分.对于生长在具有相同生长温度的InAlAs异变缓冲层上的In0.83Ga0.17As外延层, 采用较高的生长温度时, X射线衍射倒易空间图 (004) 反射面沿Qx方向的衍射峰半峰宽较小, 77K下有更强的光致发光, 但是表面粗糙度会有所增加.这说明生长温度提高后, 材料中的缺陷得到抑制.     

InP衬底上InAlAs异变缓冲层和高铟组分InGaAs的生长温度优化（英文）

利用气态源分子束外延技术在InP衬底上生长了包含InAlAs异变缓冲层的In0.83Ga0.17As外延层.使用不同生长温度方案生长的高铟InGaAs和InAlAs异变缓冲层的特性分别通过高分辨X射线衍射倒易空间图、原子力显微镜、光致发光和霍尔等测量手段进行了表征.结果表明,InAlAs异变缓冲层的生长温度越低,X射线衍射倒易空间图(004)反射面沿Qx方向的衍射峰半峰宽就越宽,外延层和衬底之间的倾角就越大,同时样品表面粗糙度越高.这意味着材料的缺陷增加,弛豫不充分.对于生长在具有相同生长温度的InAlAs异变缓冲层上的In0.83Ga0.17As外延层,采用较高的生长温度时,X射线衍射倒易空间图(004)反射面沿Qx方向的衍射峰半峰宽较小,77K下有更强的光致发光,但是表面粗糙度会有所增加.这说明生长温度提高后,材料中的缺陷得到抑制.     

插入δAl/AlN缓冲层在Si(111)上生长GaN

采用MOCVD(metal organic chemical vapor deposition)生长方法,对比在AlN层上加入δAl/AlN缓冲层和不加入δAl/AlN缓冲层两种生长结构,在Si(111)衬底上生长GaN.实验结果表明,在加入δAl/AlN缓冲层后,GaN外延层的裂纹密度得到了有效的降低,晶体质量也得到了明显的提高.通过MOCVD生长方法,利用光学显微镜、XRD和Raman等分析测试手段,研究了δAl/AlN缓冲层对GaN外延层的影响,获得了裂纹密度小、晶体质量高的GaN材料.     

插入δAl/AlN缓冲层在Si(111)上生长GaN

采用MOCVD(metal organic chemical vapor deposition)生长方法,对比在AlN层上加入δAl/AlN缓冲层和不加入δAl/AlN缓冲层两种生长结构,在Si(111)衬底上生长GaN.实验结果表明,在加入δAl/AlN缓冲层后,GaN外延层的裂纹密度得到了有效的降低,晶体质量也得到了明显的提高.通过MOCVD生长方法,利用光学显微镜、XRD和Raman等分析测试手段,研究了δAl/AlN缓冲层对GaN外延层的影响,获得了裂纹密度小、晶体质量高的GaN材料.     

Si1-xGex:C缓冲层上Ge薄膜的CVD外延生长

用化学气相沉积方法,在Si(100)衬底上生长Si1xGex:C合金作为缓冲层,继而外延生长了Ge晶体薄膜.根据AES测量结果可以认为,缓冲层包括由衬底中的Si原子扩散至表面与GeH4,C2H4反应而生成的Si1-xGex:C外延层和由Si1-xGex:C外延层中Ge原子向衬底方向扩散而形成的Si1-xGex层.缓冲层上外延所得Ge晶体薄膜晶体取向较为单一,其厚度超过在Si上直接外延Ge薄膜的临界厚度,且薄膜中的电子迁移率与同等掺杂浓度(1.0×1019 cm-3)的体Ge材料的电子迁移率相当.     

Improved performance of submicrometer-gate GaAs MESFETs with an Al0.3Ga0.7As buffer layer grown by metal organicvapor phase epitaxy

Submicrometer-gate MESFETs were fabricated with a GaAs active layer and an Al_xGa_1-xAs buffer layer grown by metalorganic vapor-phase epitaxy. To investigate the effect of buffer layer composition on device performance, microwave FETs with GaAs and Al _0.3Ga_0.7As buffer layers were compared. Electron Hall mobility in the n-GaAs active layer was found to be unaffected by the Al content or carrier concentration in the buffer layer. However, a considerable improvement in the maximum available gain to as much as 5.2 dB was obtained at 26.5 GHz for FETs with a p-Al_0.3Ga_0.7 As buffer layer; this was 1.5 dB higher than the gain obtained with a p-GaAs buffer layer. The improvement is due to a 20-30% reduction in both drain conductance and drain-gate capacitance     

Low-frequency noise in heterojunction FETs with low-temperaturebuffer

Low-frequency noise was measured on heterojunction FETs grown on low-temperature buffer and superlattice buffer layers. A distinct generation-recombination noise source with an activation energy of 0.70 eV was observed in devices built on a low-temperature buffer. Both structures showed a trap with an activation energy (~0.50 eV) that has a gate-to-source voltage dependence and is believed to be due to interactions between electrons in the channel and traps in the AlGaAs supply layer. Computer simulations of the position of the energy levels as a function of the gate voltage support this idea. A trap due to DX centers with an activation energy of ~0.30 eV in AlGaAs was also observed in both devices     

Reduction of backgating in GaAs SISFET's with a low-temperaturebuffer

The use of a low-temperature molecular beam epitaxy (MBE)-grown buffer layer to reduce backgating in GaAs/AlGaAs semiconductor-insulator-semiconductor FETs (SISFETs) is discussed. Comparison with a control wafer having no low-temperature buffer (LTB) reveals an improvement in backgating threshold voltage by a factor of 3, improvement in output conductance and short-channel characteristics, and no significant change in threshold voltage, threshold-voltage spread, and microwave characteristics. The FETs with LTB exhibited increased sensitivity, at 80 K, to trapping of hot electrons     

High-performance In0.08Ga0.92As MESFETs onGaAs(100) substrates

In_0.08Ga_0.92As MESFETs were grown in GaAs (100) substrates by molecular beam epitaxy (MBE). The structure comprised an undoped compositionally graded In_xGa_1-x As buffer layer, an In_0.08Ga_0.92As active layer, and an n⁺-In_0.08Ga_0.92As cap layer. FETs with 50-μm width and 0.4-μm gate length were fabricated using the standard processing technique. The best device showed a maximum current density of 700 mA/mm and a transconductance of 400 mS/mm. The transconductance is extremely high for the doping level used and is comparable to that of a 0.25-μm gate GaAs MESFET with an active layer doped to 10¹⁸ cm^-3. The current-gain cutoff frequency was 36 GHz and the power-gain cutoff frequency was 65 GHz. The current gain cutoff frequency is comparable to that of a 0.25-μm gate GaAs MESFET     

Fabrication and characterization of heterojunction diodes withHVPE-grown GaN on 4H-SiC

GaN/SiC heterojunctions can improve the performance considerably for BJTs and FETs. In this work, heterojunction diodes have been manufactured and characterized. The fabricated diodes have a GaN n-type cathode region on top of a 4H-SiC p-type epi layer. The GaN layer was grown with HVPE directly on off-axis SIC without a buffer layer. Mesa structures were formed and a Ti metallization was used as cathode contact to GaN, and the anode contact was deposited on the backside using sputtered Al. Both current-voltage (I-V) and capacitance-voltage (C-V) measurements were performed on the diode structures. The ideality factor of the measured diodes was 1.1 and was constant with temperature. A built in potential of 2.06 V was extracted from I-V measurements and agrees well with the built in potential from C-V measurements. The conduction band offset was extracted to 1.1 eV and the heterojunction was of type II. The turn on voltage for the diodes is about 1 V lower than expected and a suggested mechanism for this effect is discussed     

AlN缓冲层厚度对脉冲激光沉积技术生长的GaN薄膜性能的影响

在蓝宝石(Al2O3)衬底上应用脉冲激光沉积技术(PLD)生长不同厚度的AlN缓冲层后进行GaN薄膜外延生长。采用高分辨X射线衍射仪(HRXRD)和扫描电子显微镜(SEM)对外延生长所得GaN薄膜的晶体质量和表面形貌进行了表征。测试结果表明: 相比直接在Al2O3衬底上生长的GaN薄膜, 通过生长AlN缓冲层的GaN薄膜虽然晶体质量较差, 但表面较平整; 而且随着AlN缓冲层厚度的增加, GaN薄膜的晶体质量和表面平整度均逐渐提高。可见, AlN缓冲层厚度对在Al2O3衬底上外延生长GaN薄膜的晶体质量和表面形貌有着重要的影响。     

AlN缓冲层厚度对脉冲激光沉积技术生长的GaN薄膜性能的影响

在蓝宝石(Al2O3)衬底上应用脉冲激光沉积技术(PLD)生长不同厚度的AlN缓冲层后进行GaN薄膜外延生长。采用高分辨X射线衍射仪(HRXRD)和扫描电子显微镜(SEM)对外延生长所得GaN薄膜的晶体质量和表面形貌进行了表征。测试结果表明:相比直接在Al2O3衬底上生长的GaN薄膜,通过生长AlN缓冲层的GaN薄膜虽然晶体质量较差,但表面较平整;而且随着AlN缓冲层厚度的增加,GaN薄膜的晶体质量和表面平整度均逐渐提高。可见,AlN缓冲层厚度对在Al2O3衬底上外延生长GaN薄膜的晶体质量和表面形貌有着重要的影响。     

AIGaAsSb Buffer/Barrier on GaAs substrate for InAs channel devices with high electron mobility and practical reliability

InAs/AlGaAsSb deep quantum well was successfully formed on GaAs substrate and examined for two electron devices, Hall elements (HEs), and field-effect transistors (FETs). With a thin buffer layer of 600 nm AIGaAsSb on GaAs substrate, we observed high electron mobility more than 23000 cm²/Vs and extrinsic effective electron velocity of 2.2 x 10⁷ cm/s for a 15 nm thick InAs channel at room temperature. AIGaAsSb lattice matched to InAs was discussed from the view points of insulating property, carrier confinement, and oxidization rate. Reliability data good enough for practical use were also obtained for HEs. We demonstrated AIGaAsSb as a promising buffer/barrier layers for InAs channel devices on GaAs substrate, and we discussed the possible advantages of AIGaAsSb also for InGaAs FETs.     

Trapping effects in GaN and SiC microwave FETs

It is well known that trapping effects can limit the output power performance of microwave field-effect transistors (FETs). This is particularly true for the wide bandgap devices. In this paper we review the various trapping phenomena observed in SiC- and GaN-based FETs that contribute to compromised power performance. For both of these material systems, trapping effects associated with both the surface and with the layers underlying the active channel have been identified. The measurement techniques utilized to identify these traps and some of the steps taken to minimize their effects, such as modified buffer layer designs and surface passivation, are described. Since similar defect-related phenomena were addressed during the development of the GaAs technology, relevant GaAs work is briefly summarized.     

Investigations of GaN growth on the sapphire substrate by MOCVD method with different AlN buffer deposition temperatures

The effects of different AlN buffer deposition temperatures on the GaN material properties grown on sapphire substrate was investigated. At relatively higher AlN buffer growth temperature, the surface morphology of subsequent grown GaN layer was decorated with island-like structure and revealed the mixed-polarity characteristics. In addition, the density of screw TD and leakage current in the GaN film was also increased. The occurrence of mixed-polarity GaN material result could be from unintentional nitridation of the sapphire substrate by ammonia (NH₃) precursor at the beginning of the AlN buffer layer growth. By using two-step temperature growth process for the buffer layer, the unintentional nitridation could be effectively suppressed. The GaN film grown on this buffer layer exhibited a smooth surface, single polarity, high crystalline quality and high resistivity. AlGaN/GaN high electron-mobility transistor (HEMT) devices were also successfully fabricated by using the two-step AlN buffer layer.