A technique to compensate an influence of mobility degradation by combining a source coupled pair with a transconductor

A transconductor is a basic building for integrated analogue circuits. High linearity of the transfer characteristic is necessary to a transconductor. However, along with miniaturisation of a device, linearity of the transconductor has deteriorated because of the mobility degradation from an effect of a vertical electric field. This paper proposes a new technique to reduce the influence of mobility degradation and to improve linearity of a transconductor. In order to improve the linearity, a source-coupled pair is combined with the transconductor. It is confirmed that the proposed technique reduces the transconductance error by about 1/5. For a sinusoidal input voltage of 1 V_p-p and 1 MHz, the total harmonic distortion is 3% or less.     

Design and simulation of high-performance lateral bipolar junction transistor on partial buried oxide

In this work, we propose a new structure of a lateral bipolar junction transistor (LAT-BJT) on partial buried oxide (PBOX). The novelty of the proposed LAT-BJT device is the use of PBOX, covering just base and emitter regions only. A two-dimensional (2D) calibrated simulation study of the proposed LAT-BJT device has shown that the proposed LAT-BJT on PBOX’s performance is unique when the PBOX is just covering base and emitter regions. At this length of PBOX, a sharp enhancement in cut-off frequency (f_T) (~10 times higher) is achieved in the proposed LAT-BJT on PBOX in comparison to an LAT-BJT on silicon-on-insulator (SOI). The breakdown voltage of the proposed LAT-BJT on PBOX is double than that of the LAT-BJT on SOI device at this PBOX length. A notable enhancement in current gain (β) is observed in the proposed LAT-BJT on PBOX in comparison to the LAT-BJT on bulk device. To check the performance of the proposed LAT-BJT on PBOX at the circuit level, two inverters have been designed and simulated using the mixed-mode simulations of Atlas simulator. It has been observed that the proposed LAT-BJT on PBOX significantly outperforms the conventional LAT-BJT device in switching performance. A notable improvement of 32% in ON delay and 72.9% in OFF delay is obtained in the proposed LAT-BJT on PBOX device in comparison to the conventional LAT-BJT device.     

双极型电路通用综合方法与电路三要素理论

该文在电路三要素(信号,网络和负载)理论的基础上提出双极型电路通用综合方法。文中首先引入适用于电压型和电流型电路的广义二值信号,推导出源信号和负载简化定理。由此分析各单元电路结构和推导出相应的元件级电路表达式,进一步找出一种新的电路实现方式。在此基础上设计出新的低压TTL和多射型ECL元件级电路。最后经过电路实验证明理论的正确性。     

Component reduced all-pass filter with a grounded capacitor and high-impedance input

In the literature, opportunities of the current conveyors with reduced current gains are not adequately emphasised for filter designs. In this study, we show a new all-pass filter (APF) possibility using a current conveyor with half current gain. Although many first-order voltage mode APFs were proposed, most of them either cannot provide high input impedance and grounded capacitor features together or they provide these features with components more than necessary. The presented circuit provides both of these features using reduced number of elements. Spice simulation and experimental results are given to verify the theoretical results.     

Lumped-element analysis and design of CMOS distributed amplifiers with image impedance termination

This paper presents a systematic matrix-based lumped-element analysis of CMOS distributed amplifiers (DAs). Since transmission lines (TLs) of the DAs are artificially constructed from a ladder of a finite number of inductors and capacitors, the conventional TL-based analysis of microwave DAs can not be accurately applied to CMOS DAs. The proposed lumped-analysis method is also more intuitive for analog circuit designers than the TL analysis adapted from microwave amplifiers analysis because it provides the performance characteristics of the amplifiers as functions of circuit elements values, and not the TL characteristics. The image impedance technique is used for the design of input/output terminating networks. A new image impudence matrix is defined to accommodate the extension of the theory from two- to four-port networks, and a practical realization of the image impedance matrix is presented using the available circuit elements in CMOS technology. The simulation results clearly indicate an improved voltage gain and a better gain uniformity over the bandwidth of the proposed DA design terminated at its image impedance compared with the amplifier terminated at its nominal TL characteristics impedance.     

1.25Gb/s InP基多量子阱激光器与HBT驱动电路的单片集成

描述了一种基于InP材料沿[011]晶向湿法化学腐蚀形成平滑侧壁实现的InP基多量子阱激光器和异质结双极晶体管驱动电路单片集成.通过一个横向缓冲台面结构,降低了激光器阳极和晶体管集电极互连工艺的难度,改善了光发射单片光电集成电路的可制造性.采用该方法制作的光发射单片直流功耗为120mW,在码长223-1传输速率1.5Gb/s伪随机码信号调制下有清晰的眼图,光输出功率为2dBm.     

A realization of a high-frequency monolithic integrator with low power dissipation and its application to an active RC filter

According as the fine LSI process technique develops, the technique to reduce power dissipation of high-frequency integrated analog circuits is getting more important. This paper describes a design of high-frequency integrator with low power dissipation for monolithic leapfrog filters. In the design of the conventional monolithic integrators, there has been a great difficulty that a high-frequency integrator which can operate at low supply voltage cannot be realized without additional circuits, such as unbalanced-to-balanced conversion circuits and common-mode feedback circuits. The proposed integrator is based on the Miller integrator. By a PNP current mirror circuit, high CMRR is realized. However, the high-frequency characteristic of the integrator is independent of PNP transistors. In addition, it can operate at low supply voltage. The excess phase shift of the integrator is compensated by insertion of the compensation capacitance. The effectiveness of the proposed technique is confirmed by PSPICE simulation. The simulation results of the integrator shows that the common-mode gain is efficiently low and the virtual ground is realized, and that moderate phase compensation can be achieved. The simulation results of the 3rd-order leapfrog filter using the integrator shows that the 50 MHz-cutoff frequency filter is obtained. Its power dissipation in operating 2 V-supply voltage is 5.22 mW.     

一种分高低压供电的低压差线性稳压器的设计

针对传统低压供电的低压差线性稳压器线性响应比较慢的情况,提出了一种基于BICMOS 0.5μm工艺分高低压供电的低压差线性稳压器。经过Hspice仿真验证,该稳压器具有高增益、高PSRR（Power Supply Rejection Ratio,电源抑制比）、低功耗、响应速度快的特点,输入电压范围为0.5~28.0 V,输出电压为5 V。此稳定器低频时的开环增益达到86 dB,相位裕度为68o,低频时的电源电压抑制比为–91 dB,高频时也能达到–2 dB,静态电流只有13.5μA。     

Experimental and theoretical study of an improved breakdown voltage SOI LDMOS with a reduced cell pitch

An improved breakdown voltage （BV） SOI power MOSFET with a reduced cell pitch is proposed and fabricated. Its breakdown characteristics are investigated numerically and experimentally. The MOSFET features dual trenches （DTMOS）, an oxide trench between the source and drain regions, and a trench gate extended to the buried oxide （BOX）. The proposed device has three merits. First, the oxide trench increases the electric field strength in the x-direction due to the lower permittivity of oxide （eox） than that of Si （esi）. Furthermore, the trench gate, the oxide trench, and the BOX cause multi-directional depletion, improving the electric field distribution and enhancing the RESURF （reduced surface field） effect. Both increase the BV. Second, the oxide trench folds the drift region along the y-direction and thus reduces the cell pitch. Third, the trench gate not only reduces the on-resistance, but also acts as a field plate to improve the BV. Additionally, the trench gate achieves the isolation between high-voltage devices and the low voltage CMOS devices in a high-voltage integrated circuit （HVIC）, effectively saving the chip area and simplifying the isolation process. An 180 V prototype DTMOS with its applied drive IC is fabricated to verify the mechanism.     

一种低功耗宽频带LDO线性稳压电路设计

设计了一种用HHNEC0.35μmBCD工艺实现的LDO线性稳压器,该LDO是一款低功耗,带宽大的低压差线性稳压器。对其结构和工作原理进行分析,讨论了关键电路的设计,模拟结果验证了设计的正确性。     

1.25Gb/s InP基多量子阱激光器与HBT驱动电路的单片集成

描述了一种基于InP材料沿[011]晶向湿法化学腐蚀形成平滑侧壁实现的InP基多量子阱激光器和异质结双极晶体管驱动电路单片集成.通过一个横向缓冲台面结构,降低了激光器阳极和晶体管集电极互连工艺的难度,改善了光发射单片光电集成电路的可制造性.采用该方法制作的光发射单片直流功耗为120mW,在码长223-1传输速率1.5Gb/s伪随机码信号调制下有清晰的眼图,光输出功率为2dBm.     

Design and development of an integrated device consisting of an independent solar cell with electrical storage capacity

A thin film‐integrated device was constructed consisting of photovoltaic layers combined with additional layers to store charge in real time within the same device. In our design, a dye‐sensitized solar cell and capacitor layers are integrated by a double‐anodized titanium plate, which consists of TiO₂ nanotubes grown on either side by electrochemical anodization. The combination device can act either as an independent solar cell, a capacitor, or as a solar cell/capacitor device. The results presented here illustrate the capacitive behavior of high surface area nanotubular metal oxide films, with an achieved capacitance of 140 μF cm⁻². Copyright © 2012 John Wiley & Sons, Ltd.     

Initial theoretical study of solar cells with an intermediate band of non‐zero width and a thermalized electron population

A model based on detailed balance principles is developed to study how the thermalized nature of the electrons in the intermediate band (IB) affects the efficiency of intermediate band solar cells. Published work on intermediate band solar cells with finite IB width has focused on the fundamental case when the absorptivity is assumed to be high for all photon energies above the smallest band gap. In this work, an attempt is made to incorporate variations in the absorptivity due to the thermal distribution of the IB electrons. In a wide IB with a thermalized electron population, there will be a low density of electrons close to the upper band edge. The density of unoccupied electron states close to the lower band edge will also be low. As a consequence, the absorption coefficients for photon energies where the only energetically allowed transitions involve exciting electrons from or to, respectively, such states can be expected to be low. The presented model incorporates the effect of the thermalized electron population in an idealized way. In some cases, the calculated efficiency is well above the limit for single band gap cells, whereas in other cases it is not. It is concluded that absorption coefficients rising rapidly from very low values to higher values are advantageous, that overlap between the absorption coefficients can be beneficial when the IB becomes sufficiently wide, and finally, that a case‐by‐case study probably is required to evaluate whether a particular IB material can give cells with high efficiency. Copyright © 2011 John Wiley & Sons, Ltd.