The temperature dependent analysis of Au/TiO2 (rutile)/n-Si (MIS) SBDs using current–voltage–temperature (I–V–T) characteristics

In this study, the main electrical parameters of Au/TiO₂(rutile)/n-Si Schottky barrier diodes (SBDs) were analyzed by using current–voltage–temperature (I–V–T) characteristics in the temperature range 200–380 K. Titanium dioxide (TiO₂) thin film was deposited on a polycrystalline n-type Silicon (Si) substrate using the DC magnetron sputtering system at 200 °C. In order to improve the crystal quality deposited film was annealed at 900 °C in air atmosphere for phase transition from amorphous to rutile phase. The barrier height (Φ_b) and ideality factor (n) were calculated from I–V characteristics. An increase in the value of Φ_b and a decrease in n with increasing temperature were observed. The values of Φ_b and n for Au/TiO₂(rutile)/n-Si SBDs ranged from 0.57 eV and 3.50 (at 200 K) to 0.82 eV and 1.90 (at 380 K), respectively. In addition, series resistance (R_s) and Φ_b values of MIS SBDs were determined by using Cheung's and Norde's functions. Cheung's plots are obtained from the donward concave curvature region in the forward bias semi-logarithmic I–V curves originated from series resistance. Norde's function is easily used to obtain series resistance as a function of temperature due to current counduction mechanism which is dominated by thermionic emission (TE). The obtained results have been compared with each other and experimental results show that R_s values exhibit an unusual behavior that it increases with increasing temperature.     

Estimation of built-in voltage from steady-state current–voltage characteristics of organic diodes

A technique for extraction of built-in voltage from the steady-state current–voltage characteristics of a two terminal organic diode is described which does not require assumption of quadratic dependence of current on voltage. The technique relies instead on current voltage characteristics being exponential below built-in voltage and power-law above it to generate a sharply defined peak at a voltage proportional to built-in voltage. Simulation results are used to validate the proposed method and experimental results obtained with P3HT and P3HT:PCBM blends are presented.     

The effect of frequency and temperature on capacitance/conductance–voltage (C/G–V) characteristics of Au/n-GaAs Schottky barrier diodes (SBDs)

The capacitance–voltage (C–V) and conductance–voltage (G/ω–V) characteristics of the Au/n-GaAs Schottky barrier diodes (SBDs) have been investigated for 10, 100 and 500 kHz at 80 and 280 K. To evaluate the reason of non-ideal behavior in C–V and G/ω–V plots, the measured C and G/ω values were corrected by taking into accounts series resistance effect. Experimental results show that the values of C and G/ω were found to be a strong function of interface states (N_ss) at inverse and depletion regions especially at low frequencies, but R_s is effective only at the accumulation region especially at high frequencies. Such behavior of the C and G/ω values may be attributed to an increase in polarization especially at low frequencies and the existence of N_ss or dislocations between metal and semiconductor. It can be concluded that the increase in C and G/ω at low frequencies especially at weak and depletion regions results from the existence of N_ss. The values of doping concentration (N_d) and barrier height (BH) between metal and semiconductor were also obtained from the linear part of high frequency (500 kHz) C⁻² vs. V plots at 80 and 280 K, respectively.     

Current–voltage and capacitance–voltage characteristics of Al Schottky contacts to strained Si-on-insulator in the wide temperature range

The electrical characteristics of Al/strained Si-on-insulator (sSOI) Schottky diode have been investigated using current–voltage (I–V) and capacitance–voltage (C–V) measurements in the wide temperature range of 200–400 K in steps of 25 K. It was found that the barrier height (0.57–0.80 eV) calculated from the I–V characteristics increased and the ideality factor (1.97–1.28) decreased with increasing temperature. The barrier heights determined from the C–V measurements were higher than those extracted from the I–V measurements, associated with the formation of an inhomogeneous Schottky barrier at the interface. The series resistance estimated from the forward I–V characteristics using Cheung and Norde methods decreased with increasing temperature, implying its strong temperature dependence. The observed variation in barrier height and ideality factor could be attributed to the inhomogeneities in Schottky barrier, explained by assuming Gaussian distribution of barrier heights. The temperature-dependent I–V characteristics showed a double Gaussian distribution with mean barrier heights of 0.83 and 1.19 eV and standard deviations of 0.10 and 0.16 eV at 200–275 and 300–400 K, respectively. From the modified Richardson plot, the modified Richardson constant were calculated to be 21.8 and 29.4 A cm⁻² K⁻² at 200–275 and 300–400 K, respectively, which were comparable to the theoretical value for p-type sSOI (31.6 A cm⁻² K⁻²).     

Temperature dependent of the current–voltage (I–V) characteristics of TaSi2/n-Si structure

Tantalum silicide (TaSi₂) thin films were deposited on n-type silicon single crystal substrates using a dual electron-gun system and with Ta and Si targets. The electrical transport properties of the TaSi₂/n-Si structures were investigated by temperature-dependent current–voltage (I–V) measurements. The temperature-dependent I–V characteristics revealed that the forward conduction was determined by thermionic-emission and space-charge-limited current mechanisms at low and high voltage respectively. On the other hand, the reverse current is limited by the carrier generation process.     

A compare of electrical characteristics in Al/p-Si (MS) and Al/C20H12/p-Si (MPS) type diodes using current–voltage (I–V) and capacitance–voltage (C–V) measurements

In this study, both the metal-semiconductor (MS) and metal-polymer-semiconductor (MPS), (Al/C₂₀H₁₂/p-Si), type Schottky barrier diodes (SBDs) were fabricated using spin coating method and they were called as D₁ and D₂ diodes, respectively. Their electrical characterization have been investigated and compared using the forward and reverse bias I–V and C–V measurements at room temperature. The main electrical parameters such as ideality factor (n), reverse saturation current (I_o), zero-bias barrier height (Φ_Bo), series (R_s) and shunt (R_sh) resistances, energy dependent profile of interface states (N_ss), the doping concentration of acceptor atoms (N_A) and depletion layer width (W_D) were determined and compared each other and literature. The rectifying ratio (RR) and leakage current (I_R) at ±3 V were found as 2.06×10³, 1.61×10⁻⁶ A and 15.7×10³, 2.75×10⁻⁷ A for D₁ and D₂, respectively. Similarly, the R_s and R_sh values of these diodes were found as 544 Ω, 10.7 MΩ and 716 Ω and 1.83 MΩ using Ohm’s Law, respectively. In addition, energy and voltage dependent profiles of N_ss were obtained using the forward bias I–V data by taking into account voltage dependent effective barrier height (Φ_e) and n and low-high frequency capacitance (C_LF–C_HF) methods, respectively. The obtained value of N_ss for D₂ (MPS) diode at about the mid-gap of Si is about two times lower than D₁ (MS) type diode. Experimental results confirmed that the performance in MPS type SBD is considerably high according to MS diode in the respect of lower values of N_ss, R_s and I_o and higher values of RR and R_sh.     

Engineering the current–voltage characteristics of metal–insulator–metal diodes using double-insulator tunnel barriers

The femtosecond-fast transport in metal–insulator–metal (MIM) tunnel diodes makes them attractive for applications such as ultra-high frequency rectenna detectors and solar cells, and mixers. These applications impose severe requirements on the diode current–voltage I(V) characteristics. For example, rectennas operating at terahertz or higher frequencies require diodes to have low resistance and adequate nonlinearity. To analyze and design MIM diodes with the desired characteristics, we developed a simulator based on the transfer-matrix method, and verified its accuracy by comparing simulated I(V) characteristics with those measured in MIM diodes that we fabricated by sputtering, and also with simulations based on the quantum transmitting boundary method. Single-insulator low-resistance diodes are not sufficiently nonlinear for efficient rectennas. Multi-insulator diodes can be engineered to provide both low resistance and substantial nonlinearity. The improved performance of multi-insulator diodes can result from either resonant tunneling or a step change in tunneling distance with voltage, either of which can be made to dominate by the appropriate choice of insulators and barrier thicknesses. The stability of the interfaces in the MIIM diodes is confirmed through a thermodynamic analysis.     

Specific features of the current–voltage characteristics of SiO2/4H-SiC MIS structures with phosphorus implanted into silicon carbide

The effect of phosphorus implantation into a 4H-SiC epitaxial layer immediately before the thermal growth of a gate insulator in an atmosphere of dry oxygen on the reliability of the gate insulator is studied. It is found that, together with passivating surface states, the introduction of phosphorus ions leads to insignificant weakening of the dielectric breakdown field and to a decrease in the height of the energy barrier between silicon carbide and the insulator, which is due to the presence of phosphorus atoms at the 4H-SiC/SiO₂ interface and in the bulk of silicon dioxide.     

Numerical simulation study of current–voltage characteristics of a Schottky diode with inverse doped surface layer

The Poisson’s equation and drift–diffusion equations are used to simulate the current–voltage characteristics of Schottky diode with an inverse doped surface layer. The potential inside the bulk semiconductor near the metal–semiconductor contact is estimated by simultaneously solving these equations, and current as a function of bias through the Schottky diode is calculated for various inverse layer thicknesses and doping concentrations. The Schottky diode parameters are then extracted by fitting of simulated current–voltage data into thermionic emission diffusion equation. The obtained diode parameters are analyzed to study the effect of inverse layer thickness and doping concentration on the Schottky diode parameters and its behavior at low temperatures. It is shown that increase in inverse layer thickness and its doping concentration give rise to Schottky barrier height enhancement and a change in the ideality factor. The temperature dependences of Schottky barrier height and ideality factor are studied. The effect of temperature dependence of carrier mobility on the Schottky diode characteristics is also discussed.     

Capacitance–conductance–current–voltage characteristics of atomic layer deposited Au/Ti/Al2O3/n-GaAs MIS structures

We have studied the admittance and current–voltage characteristics of the Au/Ti/Al₂O₃/n-GaAs structure. The Al₂O₃ layer of about 5 nm was formed on the n-GaAs by atomic layer deposition. The barrier height (BH) and ideality factor values of 1.18 eV and 2.45 were obtained from the forward-bias ln I vs V plot at 300 K. The BH value of 1.18 eV is larger than the values reported for conventional Ti/n-GaAs or Au/Ti/n-GaAs diodes. The barrier modification is very important in metal semiconductor devices. The use of an increased barrier diode as the gate can provide an adequate barrier height for FET operation while the decreased barrier diodes also show promise as small signal zero-bias rectifiers and microwave. The experimental capacitance and conductance characteristics were corrected by taking into account the device series resistance R_s. It has been seen that the non-correction characteristics cause a serious error in the extraction of the interfacial properties. Furthermore, the device behaved more capacitive at the reverse bias voltage range rather than the forward bias voltage range because the phase angle in the reverse bias has remained unchanged as 90° independent of the measurement frequency.     

Calculation of the Schottky barrier and current–voltage characteristics of metal–alloy structures based on silicon carbide

A simple but nonlinear model of the defect density at a metal–semiconductor interface, when a Schottky barrier is formed by surface defects states localized at the interface, is developed. It is shown that taking the nonlinear dependence of the Fermi level on the defect density into account leads to a Schottky barrier increase by 15–25%. The calculated barrier heights are used to analyze the current–voltage characteristics of n-M/p-(SiC)_1–x(AlN)_x structures. The results of calculations are compared to experimental data.     

Impact of defect on I(V) instabilities observed on Ti/4H–SiC high voltage Schottky diodes

Anomaly in current at low forward bias is observed for large-area Ti Schottky diodes on n type 4H–SiC. Random telegraph signal (RTS) measurements, carried out on these defective devices, show discrete time switching of the current. Thermal activation of RTS signal gives two related trap signature (activation energy and cross section). Frequency analysis, using power spectral densities (PSDs) numerically calculated, confirms the presence of an extended defect which presents different charge states (i.e. an extended defect decorated by punctual traps). PSDs show two cut-off frequencies proving the individual response of two traps. Simulations of the I–V characteristics using two barrier heights modulated by a Gaussian function which represents the defect distribution show a good agreement with the experimental results. Finally we note that there's a strong correlation between traps observed by telegraph noise techniques and excess current.     

Effect of temperature on the capacitance–frequency and conductance–voltage characteristics of polyaniline/p-Si/Al MIS device at high frequencies

A polyaniline/p-Si/Al MIS device has been fabricated by forming a polyaniline layer on Si by using the electrochemical polymerization method. The conductance–voltage and capacitance–frequency measurements have been performed as a function of temperature. The capacitance of the device decreased with increasing frequency. The increase in capacitance results from the presence of interface states. The peaks have been observed in the conductance curves of the device and attributed to the presence of an interfacial layer between polyaniline and p-Si. For each temperature, the plot of series resistance/voltage gave a peak. The voltage and temperature dependence of series resistance has been attributed to the particular distribution density of interface states and the interfacial insulator layer.     

Accurate surface potential determination in Schottky diodes by use of correlated current and capacitance voltage measurements. Application to n–InP

Based on current voltage (I-V_g) and capacitance voltage (C-V_g) measurements, a reliable procedure is proposed to determine the effective surface potential V_d.V_g/ in Schottky diodes. In the framework of thermionic emission, our analysis includes both the effect of the series resistance and the ideality factor, even voltage dependent. This technique is applied to n-type indium phosphide (n-InP) Schottky diodes with and without an interfacial layer and allows us to provide an interpretation of the observed peak on the C-V_g measurements. The study clearly shows that the depletion width and the flat band barrier height deduced from C-V_g, which are important parameters directly related to the surface potential in the semiconductor, should be estimated within our approach to obtain more reliable information.     

Modeling the effect of deep traps on the capacitance–voltage characteristics of p-type Si-doped GaAs Schottky diodes grown on high index GaAs substrates

Numerical simulation, using SILVACO-TCAD, is carried out to explain experimentally observed effects of different types of deep levels on the capacitance–voltage characteristics of p-type Si-doped GaAs Schottky diodes grown on high index GaAs substrates. Two diodes were grown on (311)A and (211)A oriented GaAs substrates using Molecular Beam Epitaxy (MBE). Although, deep levels were observed in both structures, the measured capacitance–voltage characteristics show a negative differential capacitance (NDC) for the (311)A diodes, while the (211)A devices display a usual behaviour. The NDC is related to the nature and spatial distribution of the deep levels, which are characterized by the Deep Level Transient Spectroscopy (DLTS) technique. In the (311)A structure only majority deep levels (hole traps) were observed while both majority and minority deep levels were present in the (211)A diodes. The simulation, which calculates the capacitance–voltage characteristics in the absence and presence of different types of deep levels, agrees well with the experimentally observed behaviour.     

The influence of a voltage ramp on the measurement of I–V characteristics of a solar cell

For convenience and efficiency the voltage applied to a Si solar cell is often fairly rapidly driven from zero to the open circuit value typically at a constant rate of 1 V per millisecond. During this time the values of the current are determined as a function of the instantaneous voltage thus producing an I–V characteristic. It is shown here that the customary expressions for the current as a function of cell parameters remain still valid provided that the diffusion length in the expression for the dark current is changed from its steady state value L to the effective diffusion length L_i given by

$\text{L}{}_1\text{= L}\text{1+}\text{q}\text{V}\text{?}\text{kT}{}^{\mathrm{\tau }}\text{,}{}^{\mathrm{<mtext>1</mtext><mtext>2</mtext>}}$

where V is the ramp rate considered constant and τ is the lifetime of minority carriers. This result is true to a very good approximation provided that low level injection prevails.     

Temperature dependence of current–voltage characteristics of MoS2/Si devices prepared by the chemical vapor deposition method

Layers of MoS₂ are directly deposited on the n-type Si (n-Si) substrate by chemical vapor deposition for fabricating a MoS₂/n-Si heterojunction device. The rectification current–voltage (I–V) characteristics of MoS₂/n-Si devices were measured in the temperature range from 80 to 300 K in steps of 20 K. The temperature-dependent forward-bias I–V characteristics can be explained on the basis of the thermionic emission theory by considering the presence of the interfacial inhomogeneous barriers at the MoS₂/n-Si interfaces. The dominance of the induced carrier capture/recombination by states at the MoS₂/n-Si interface that lead to the formation of the inhomogeneous barriers serves to influence the photo-response at room temperature. The fabricated MoS₂/n-Si devices exhibit reversible switching between high and low current densities, when the simulated sunlight is turned on and off. The sensitivity of the I–V characteristics to temperature provides an opportunity to realize stable and reliable rectification behaviors in the MoS₂/n-Si devices. It is found that the electron mobility in the n-Si layer reduces as temperature increases, which leads to the noticeably increased value of the series resistance of MoS₂/n-Si devices.     

Isothermal current–voltage characteristics of high-voltage 4<Emphasis Type="Italic">H</Emphasis>-SiC junction barrier Schottky rectifiers

The forward-pulse isothermal current–voltage characteristics of 4H-SiC junction barrier Schottky rectifiers (JBSs) with a nominal blocking voltage of 1700 V are measured in the temperature range from–80 to +90°C (193–363 K) up to current densities j of ~5600 A/cm² at–80°C and 3000 A/cm² at +90°C. In these measurements, the overheating of the structures relative to the ambient temperature, ΔT, did not exceed several degrees. At higher current densities, the effective injection of minority carriers (holes) into the base of the structures is observed, which is accompanied by the appearance of an S-type differential resistance. The pulsed isothermal current–voltage characteristics are also measured at a temperature of 77 K.     

Temperature dependence of the threshold current density in semiconductor lasers (λ = 1050–1070 nm)

The temperature dependences of the threshold current density and threshold concentration in semiconductor lasers based on MOVPE-grown asymmetric separate-confinement heterostructures with an extended waveguide have been studied (wavelengths ?? = 1050?C1070). It is shown that the temperature dependence of the threshold current density in semiconductor lasers becomes markedly stronger at above-room temperatures, which is due to temperature-induced carrier delocalization into the waveguide layers of a laser heterostructure. It was found that the sharp decrease in the thermal stability of the threshold current density with increasing temperature correlates with the coincidence of the Fermi level with the conduction-band bottom of the waveguide layer in the laser heterostructure. It is experimentally demonstrated that an increase in the energy depth and number of quantum wells in the active region of a semiconductor laser improves the thermal stability of the threshold current density. It is demonstrated that the characteristic parameter T ₀ attains a value of 220 K in the temperature range from ?20 to +70°C.