Flexible active filter design using operational amplifier pole

A synthesis procedure for generating second-order active filters using the operational amplifier pole and a single external capacitor is given. The proposed method is based on drawing the signal-flow graph from the given transfer function and obtaining the circuit realization from the graph.     

Stabilizing magamp control loop by using an inner-loop compensation

Using an inner-loop compensation scheme, the order of the open-loop transfer function of a magamp control circuit is essentially reduced from two to one for a self-reset scheme. The problem normally associated with compensating a control transfer function with resonance peaking is thereby eliminated. Moreover, if the inner loop gain is designed high enough, the closed-loop gain can be insensitive to the variation of power circuit parameters such as saturable reactor permeability and capacitor equivalent series resistance (ESR). A design example is given to illustrate the step-by-step design procedure for a practical magamp control circuit. The results are verified by loop gain measurements     

A versatile signal flow graph realization of a general transfer function by using CDBA

A general synthesis procedure is given for a versatile signal flow graph realization of a general transfer function by using current differencing buffered amplifier (CDBA). The proposed configuration uses n+1 CDBAs, n capacitors and at most 2n+4 resistors. This number of resistors can be reduced to n+1 for special cases. The circuit is eligible to obtain a variety of transfer characteristics with the same common denominator polynomial, and it is easily converted to different modes of operations. It is straightforward to find the values of the passive elements from the coefficients of the transfer function to be realized. Simulations results are obtained by using commercially available active component AD844 and CMOS technology as well. All of these make the proposed circuit attractive.     

RSYN: a system for automated synthesis of reliable multilevelcircuits

Conventional logic synthesis systems are targeted towards reducing the area required by a logic block, as measured by the literal count or gate count; or, improving the performance in terms of gate delays; or, improving the testability of the synthesized circuit, as measured by the irredundancy of the resultant circuit. In this paper, we address the problem of developing reliability driven logic synthesis algorithms for multilevel logic circuits, which are integrated within the MIS synthesis system. Our procedures are based on concurrent error detection techniques that have been proposed in the past for two level circuits, and adapting those techniques to multilevel logic synthesis algorithms. Three schemes for concurrent error detection in a multilevel circuit are proposed in this paper, using which all the single stuck at faults in the circuit can be detected concurrently. The first scheme uses duplication of a given multilevel circuit with the addition of a totally self-checking comparator. The second scheme proposes a procedure to generate the multilevel circuit from a two level representation under some constraint such that, the Berger code of the output vector can be used to detect any single fault inside the circuit, except at the inputs. A constrained technology mapping procedure is also presented in this paper. The third scheme is based on parity codes on the outputs. The outputs are partitioned using a novel partitioning algorithm, and each partition is implemented using a multilevel circuit. Some additional parity coded outputs are generated. In all three schemes, all the necessary checkers are generated automatically and the whole circuit is placed and routed using the Timberwolf layout package. The area overheads for several benchmark examples are reported in this paper. The entire procedure is integrated into a new system called RSYN     

A New Technique for Synthesis of Broad-Band Parametric Amplifiers

A new synthesis technique for providing precise design values for the realization of broad-band parametric amplifiers incorporating practical varactor diode models is presented. The method provides the designer considerable flexibility in choosing the topology of matching networks employed. An integral part of the synthesis scheme is the application of a least-squares optimization procedure which employs exact partial derivatives of the objective function. The partial derivatives are used in the optimization to compute the gain sensitivity of the amplifier with respect to all matching network and diode parameters. For the first time, sensitivity data is presented which quantitatively shows the effect of the device and matching network parameter variations on overall amplifier response. This permits the determination of critical parameters and provides a means for establishing tolerances for various circuit parameters. In comparison with conventional procedures, significantly improved broad-band designs are shown to result.     

Time-multiplexed active filters

The inductorless realization of high-order voltage transfer functions is achieved by subdividing a conventional realization into identical memoryless active subnetworks; the realization is then achieved by time multiplexing one of the memoryless active subnetworks such that it effectively replaces the total number of active subnetworks. The result of this time-multiplexing operation is to create a new type of RC-active filter that exhibits many practical advantages, such as lower power dissipation and a considerable saving in circuit complexity. The synthesis technique is illustrated by means of the design of a sixteenth-order low-pass transfer function. Nonideal performance is analyzed.     

Design formulas for biquad active filters using three operational amplifiers

A circuit configuration and its design formulas are presented for the realization of all the useful forms of a biquadratic voltage transfer function. The circuit employs three single-ended operational amplifiers, two capacitors, and at most eight resistors. With an additional resistor, it can realize any biquadratic voltage transfer function.     

Minimal realization of a symmetric transfer-function matrix using expansion about a general point "a"

A procedure for the minimal realization of symmetric transfer function matrix by its expansion about an arbitrary point "a" is proposed. The procedure results in realizations leading to reciprocal network synthesis.     

有源模拟滤波器的快速协同设计方法

为了解决有源模拟滤波器传递特性函数设计中手工计算方法复杂、时间长,查表法精度不高的问题,提出了一种快速协同设计方法,该方法先通过在MATLAB环境下将基于频率变换的有源模拟滤波器传递函数设计方法程序化,之后只需给出滤波器电压衰减设计指标和边界频率即可快速获得滤波器传递函数或其二阶级联传递函数中各多项式的系数并在此基础上...     

The Design and Synthesis of a Class of Microwave Bandpass Linear Phase Filters

This paper is concerned with the design procedure and synthesis of a class of microwave bandpass linear phase filters which simultaneously exhibit a maximally flat amplitude and delay response about band center. In the first part of the paper a systematic procedure is developed for the construction of a nonminimum phase transfer function which exhibits a maximally flat delay and maximally flat amplitude characteristic. In the second part, a synthesis procedure is presented for the realization of the general nth-ordered transfer function by a generalized interdigital network. To simplify the design and construction of this filter, typical characteristics for filters of degree n = 3,4,5,6,7 are graphically presented together with a tabular representation of the polynomials which are required to design the filter. Finally, the results of an experimental filter of degree 3 are incorporated to illustrate that this class of nonminimum phase filters may readily be constructed in practice.     

Realization of multidimensional systems in Fornasini-Marchesini state-space model

This paper presents a constructive procedure that can generate a Fornasini-Marchesini (local) state-space model realization for a given n-D system with lower order than the existing procedure given by Alpay and Dubi. It is clarified that the method of Alpay and Dubi usually generates a realization with unnecessarily high order even for a simple rational transfer function, and, by taking into account of the structural characteristic of the given transfer function or transfer matrix, it is possible to construct a realization with much lower order. Nontrivial examples are given to illustrate the basic idea as well as the effectiveness of the proposed approach.     

S－域行为描述的模拟集成电路综合方法

本文提出了一种通用的、从Ｓ－域传输函数入手进行模拟集成电路结构级综合的方法，并详细地讨论了提高电路性能和合格率的电路技巧。此外，本文还给出了生成物理版图的一点建议，本文采用该方法完成了切比雪夫滤波器的综合，ＳＰＩＣＥ模拟结果表明该方法是可行的。     

Synthesis of transfer functions by dependent sources

A new procedure is given for the synthesis of nth-order voltage transfer functions by two dependent current sources as active elements. In the letter, by using a simple voltage-divider circuit configuration, the problem of the synthesis of transfer functions has been transformed to the synthesis of driving-point admittance functions.     

Realisation of current-mode low pass filters using CFCCIIs

A synthesis procedure for generating current-mode low pass filters using a pair of four terminal p-type active current conveyors (CFCCII _p) is presented, and a circuit that realises nth-order low pass current transfer function is given     

Exact Design of TEM Microwave Networks Using Quarter-Wave Lines

Modem network theory procedures, based on Ozaki-Ishii synthesis techniques, are reviewed for application in the design of TEM mode microwave networks using parallel coupled bars and/or series and shunt stubs. The circuit equivalences and identities obtained are theoretically valid over the entire frequency spectrum and lead to several physical configurations having identical response functions. These equivalent circuits often allow simplification of the physicrd circuitry and realization of both broad and narrow bandwidths. The problem of practical circuit configurations is discussed from the viewpoint of bandwidth and circuit element values. Neglecting multiple responses, TEM low-pass, high-pass and band-pass butterworth filters are shown to offer steeper bandedge characteristics than those of corresponding lumped element filters. The use of complementary filters to match a source and load over a wide frequency range is outlined and TEM realizations of these complements are obtained. A simple procedure for obtaining element values of butterworth complements is described. An analysis of parallel coupled filters is made and a simplified equivalent circuit is obtained. An exact synthesis procedure for parallel coupled bar filters and their equivalent forms is given. Construction details and experimental results are described for two filters which use series stubs.     

CFA based fully integrated nth-order lowpass filter

A general synthesis procedure for the realisation of an nth-order lowpass voltage transfer function by a fully integrated circuit is presented, and a CFA based fully integrated nth-order filter which uses (n) CFA based integrators and only grounded capacitors is given. This circuit is especially suitable for monolithic implementation     

RGB格式数据向BT.656视频标准转换的关键技术

针对当前多数场合需要将RGB格式图像数据转换成BT.656视频标准的现状,提出了基于FPGA的实现方案,分析了系统的各组成模块和关键技术。利用状态转移机制,产生了BT.656视频标准时序;通过线性循环补偿法,避免了RGB向YUV格式转换的颜色失真现象;使用带有输入输出选择控制功能的FIFO电路,解决了输入输出数据的速率匹配问题。仿真验证结果表明,所提出的方案效果良好,具有广阔的应用前景。     

Realization of n‐th Order Voltage Transfer Function Using a Single Operational Transresistance Amplifier

4 new configuration to realize the most general n‐th order voltage transfer function is proposed. It employs only one operational transresistance amplifier (OTRA) as the active element. In the synthesis of the transfer function, the RC:–RC decomposition technique is used. To the best of the author's knowledge, this is the first topology to be used in the realization of an n‐th order transfer function employing a single OTRA.     

Comments on "Realization of an all-pass transfer function using the second generation current conveyor"

It is pointed out that an error exists in the circuit given in the above letter [1]. In correcting the circuit, it becomes identical to the general configuration previously described in the literature [1]. The realization of a first-order all-pass transfer function should not be compared with that of a second-order all-pass based on the number of circuit components.     

A Method of Transformation from Symbolic Transfer Function to Active-RC Circuit by Admittance Matrix Expansion

Active-RC circuits containing 2-terminal linear passive elements and ideal transistors or operational amplifiers are derived from symbolic voltage or current transfer functions by admittance matrix transformations without any prior assumption concerning circuit architecture or topology. Since the method is a reversal of symbolic circuit analysis by Gaussian elimination applied to a circuit nodal admittance matrix, it can generate all circuits using the specified elements that possess a given symbolic transfer function. The method is useful for synthesis of low-order circuits, such as those used for cascade implementation, for deriving alternative circuits with the same transfer function as an existing circuit or for realizing unusual transfer functions, as may arise, for example, where a transfer function is required that contains specific tuning parameters