Stability of oscillation frequency of ECL-based multivibrator

The stability (with temperature and power supply voltage variations) of the oscillation frequency f₀ of an ECL-based multivibrator is considered. This circuit is a non-saturated multivibrator. Its operation is revised and an exact expression for calculation of f₀ is obtained. Then the temperature coefficient and sensitivity to the power supply voltage are derived. The results were verified experimentally. Some recommendations on the choice of the external timing components are given.     

A low-voltage,versatile CMOS four-quadrant analogue multiplier

This paper describes a four-quadrant analogue multiplier circuit using a low-voltage power supply. It comprises two voltage/current adders and a basic multiplier. Its major advantages over other low-voltage multipliers are that it can operate on either a single power supply or two power supplies, and that its output can be the product of two signal currents, the product of two signal voltages, or the product of a signal current and a signal voltage. Second-order effects were analysed and the simulated results revealed that: (1) for a two-power supply voltage of 2?V, the total harmonic distortion is about 1%, whereas the input voltage is 0.4?V_P–P, the power dissipation is about 0.4?mW and the ?3?dB bandwidth is more than 55?MHz; (2) for a single-power supply voltage of 2?V, the total harmonic distortion is about 1%, whereas the input voltage is 0.4?V_P–P, the power dissipation is about 0.2?mW and the ?3?dB bandwidth is more than 55?MHz. Experimental results are provided to confirm the operation of the circuit.     

A Low-Voltage Fully Differential Constant-Gm Rail-to-Rail CMOS Operational Amplifier

A low-voltage fully differential CMOS operational amplifier withconstant-g_mand rail-to-rail input and output stages ispresented. It is the fully differential version of a previously realizedsingle-ended operational amplifier where a novel circuit to ensure constanttransconductance has been implemented [1]. The input stage is a rail-to-railstructure formed by two symmetrical OTAs in parallel (the input transistorsare operating in weak inversion). The class-AB output stages have also afull voltage swing. A rail-to-rail input common mode feedback structureallows the output voltage control. Measurements in a 0.7 µ standardCMOS process with threshold voltages of about 0.7 V have been done. Theminimum experimental supply voltage is about 1.1 V. The circuit provides a60 dB low frequency voltage gain and about 1.5 MHz unity gain frequency fora total power consumption of about 0.72 mW at a 1.5 V supply voltage.     

A 14-bit 250 kS/s two-step inverter-based incremental $$\varSigma \varDelta$$ ADC for CMOS image sensor in $$0.18\,\upmu \hbox {m}$$0.18μm technology

This paper presents an ultra-low-power, bulk-driven, source-degenerated fully differential transconductor (FD-OTA), operating in subthreshold region. The source-degeneration (SD) and bulk-drive ensure linearity and rail-to-rail input swing. The flipped voltage follower and SD resistor perform V–I conversion in input core with power efficient class AB mode of operation. The reduction in open loop gain and gain bandwidth (GBW) of bulk-drive is compensated by applying partial positive feedback at diode connected MOSFET pair. The current gain from input core to output load side is set (1:1) in OTA₁ and (1:4) in OTA₂. The OTA₂ offers increased transconductance and GBW whereas self-cascode load increases the output impedance and overall gain of the FD-OTAs. Both the input core and common source self-cascode load operate in class AB mode so these FD-OTAs provide enhanced slew rates. These OTAs have been employed to implement Biquadratic low-frequency G_m-C filter suitable for bio-signal applications. The proposed OTA₂ has used dual supply voltage of ± 0.3 V and dissipates around 70 nW power and provides 62 dB FD-open loop gain with GBW of 7.73 kHz while driving the FD-load of 2 × 15 pF. The Cadence VIRTUOSO environment using UMC 0.18 µm CMOS process technology has been used to simulate the proposed circuit. The Simulation results verified fully differential total harmonic distortion of ? 72 dB, for 1.2 V_p–p signal at 200 Hz frequency in unity gain configuration with resistive degeneration of 1 MΩ for OTA₁.     

Analysis of a source-coupled MOS multivibrator with resistive drain loads

The determinant of the system of nodal equations of a source-coupled MOS multivibrator is calculated. Equating this determinant to zero, one can obtain the condition of transition from one quasistable state to another. This condition is used to calculate the currents in the multivibrator transistors at the instant of transition. Then the voltage amplitude at the coupling capacitor is calculated and the oscillation frequency is found. The oscillation frequency in this multivibrator depends on the value of currents supplied to the circuit and the power supply voltage. The results were verified experimentally.     

Electronically tunable high-input impedance voltage-mode universal biquadratic filter based on simple CMOS OTAs

This paper describes a new electronically tunable three inputs and single output voltage-mode universal biquadratic filter based on simple CMOS operational transconductance amplifiers (OTAs) and grounded capacitors. The proposed configuration provides lowpass, highpass, bandpass, bandstop and allpass voltage responses at a high impedance input terminal, which enable easy cascadability. Additionally, the circuit parameters ω_o${\omega }_o$ and Q   can be set orthogonally by adjusting the transconductances and grounded capacitors. The filter also offers an independent electronic control of parameters ω_o${\omega }_o$ by adjusting the transconductance through the bias current/voltage of the OTA. For realizing all the filter responses, no critical component matching condition is required, and all the incremental parameter sensitivities are low. PSPICE simulation results are performed to confirm the theoretical analysis.     

A 1.2?V 10-bit 60-MS/s 23?mW CMOS pipeline ADC with 0.67?pJ/conversion-step and on-chip reference voltages generator

A 1.2?V 10-bit 60?MS/s pipeline Analog-to-Digital Converter (ADC), fabricated in a 130?nm CMOS technology, is presented. The prototype is composed by five 3-bit pipeline stages and a Sample and Hold (S&H) circuit at the front. Two-stage Miller-compensated Operational Transconductance Amplifiers (OTAs), offset-compensated comparators and bootstrapping sampling switches have been used due to the low voltage supply requirements. Special attention has been paid to the reduction of the power consumption using a thorough design methodology. The converter only consumes 23?mW including on-chip reference voltages and bias current generators. The differential and integral nonlinearity of the ADC are below 0.60 and 0.61 LSBs, respectively. The pipeline converter achieves an effective resolution above 9 bits along the Nyquist bandwidth, and obtains 0.67?pJ energy consumption per conversion, making it one of the most energy-efficient 10-bit video-rate pipeline ADC reported to date.     

Fully integrated signal conditioning of an accelerometer for implantable pacemakers

This paper shows the development of a fully integrated G _m -C 0.5–7 Hz bandpass amplifier (gain G = 400), for a piezoelectric accelerometer to be employed in rate adaptive pacemakers. The circuit, fabricated in a standard 0.8 micron CMOS technology, operates with a power supply as low as 2 V, consumes 230 nA of current, and has only a 2.1 μV_rms input referred noise. Detailed circuit specifications, measurements, and a system performance comparative analysis are presented. The physical activity system includes a fully integrated G _m -C rectifier and 3-second time average. Fully integrated very low frequency circuits were implemented with the aid of series-parallel current division in symmetrical OTAs. OTAs as low as 33 pS (equivalent to a 30 GΩ resistor) were designed, fabricated, and tested.     

A low power sub-BGR with multi-curvature self-compensation

This paper proposes a low power sub bandgap reference (sub-BGR) with a novel multi-curvature self-compensation. The proposed circuit generates a curvature-compensation-less reference voltage (V_{REF_NC}), which is compared with the emitter–base voltage of a PNP transistor to generate a pair of complementary curvature currents. The curvature currents are used to compensate the temperature coefficient (TC) of the voltage V_{REF_NC} itself, resulting in a low-power and low-TC sub-BGR. The proposed circuit is implemented in a standard 65 nm complementary metal oxide semiconductor process. Simulation and measured results show the total power consumption is about 230 nW at the minimum supply voltage of 1.0 V. The power supply rejection ratio at low frequency is less than ?66 dB. After trimming, the average TC of 23 ppm/°C in the temperature range of ?45 to 125 °C and the accuracy of ± 0.15% (σ/µ) can be achieved.     

Gain improvement in operational transconductance amplifiers using Graded-Channel SOI nMOSFETS

This paper studies the performance of operational transconductance amplifiers (OTAs) fabricated with Graded-Channel (GC) SOI nMOSFETs and designed to provide high open-loop voltage gain or high gain-bandwidth characteristics. Different design targets were taken in account such as similar power dissipation, transconductance over drain current ratio and die area. Comparisons with OTAs made with conventional SOI nMOSFETs, are performed showing that the GC OTAs presents larger open-loop voltage gain without degrading the phase margin, unit gain frequency and slew rate simultaneously with a significant required die area reduction depending on L_LD/L ratio used. Circuit simulations and experimental results are used to qualify the analysis.     

A novel loss-of-signal detector with programmable assert threshold for intelligent limiting amplifier

This paper presents a novel programmable assert threshold loss-of-signal (LOS) detector with fixed optical hysteresis for intelligent limiting amplifier (LA) using 0.5-??m 2P2M CMOS technology. By adjusting the gain of the LA, a programmable threshold range of 2?C20 mV_pp is implemented. The proposed detector circuit obtains a signal strength indication voltage V _SIG and a reference voltage V _REF, both of which can be dependent each other. With other special circuit design techniques, the detector circuit achieves stable LOS range, LOS hysteresis and LOS precision, and all of them are completely independent on all process, voltage supply and temperature deviations. This LOS detector is integrated with a 155-Mbps LA operating at a compatible supply voltage of 3.3 and 5.0?V. The measurement results demonstrate that the LOS detector achieves a stable programmable assert threshold and a 2?dB fixed optical hysteresis for a 155 Mbps input pseudo random sequence.     

OTA-based monostable multivibrators with current tuning properties

This paper presents two new monostable multivibrator circuits based on operational transconductance amplifiers (OTAs). Both configurations use two OTAs with a few passive components. The first circuit is operated under the positive-edge triggering mode, and the second one is a negative-edge triggering mode design. The width and height of the output pulse are tunable via the bias current of OTAs or an external resistor. The proposed monostable multivibrators are more compact compared to the existing designs. In order to verify the feasibility of the presented circuits, prototypes are implemented, using commercial ICs and discrete components. In addition, the circuit principles are described and analyzed in detail. Experimental results are close to the theoretical analysis.     

A highly linear CMOS transconductance amplifier in 180?nm process technology

The present article describes the design and analysis of an operational transconductance amplifier (voltage to current converter) with wide linear input range. The proposed configuration combines the techniques of signal attenuation and source degeneration in order to reduce the odd order harmonic distortion significantly. The proposed circuit is compared with several circuit topologies based on MOS differential pairs with respect to their achievable linearity, input referred noise and power consumption. The linear transconductor is designed and simulated in 180?nm CMOS process technology with 1.8?V power supply. Simulation results show third order harmonic distortion (HD ₃) of ?70?dB for 600?mV_pp input signal. For 1% transconductance variation the linear range is about 1.2?V_pp. The input referred noise of the transconductor is $70\,\hbox{nV}/\sqrt{\text {Hz}}$ at 10?MHz. The quiescent power consumption is only 450???W.     

用于相变存储器的超低输出纹波2X/1.5X电荷泵

本文针对相变存储器编程驱动电路,提出了一种超低输出电压纹波的开关电容型电荷泵。该电荷泵可根据输入电压的不同,自适应工作在2X/1.5X升压模式之间,以获得更高的电源转换效率。相比于传统开关电容型电荷泵,在充电阶段泵电容被充电至预先设定的电压值Vo-VDD(Vo为预期的输出电压);放电阶段,泵电容串联在输入电压VDD与输出端,通过此方法将电荷泵输出端电压稳定在Vo,并有效的降低了由于电荷分享所造成的输出纹波。在中芯国际40nm标准CMOS工艺模型下,对电路进行了仿真验证,结果表明在输入电压为1.6-2.1V,输出2.5V电压,最大负载电流为10mA,输出电压纹波低于4mV,电源效率最高可达91%。     

Robust Low Power CMOS Single-Ended to Fully-Balanced Converter Circuits

In this paper two novel single-ended-input fully-balanced-output circuits (SFC), namely unbuffered and buffered SFCs, are proposed for input interface to fully balanced signal processing systems. The unbuffered SFC overcomes the drawback of uncontrollable process variations of resistors and generate well-controlled process invariant common mode output voltage, V _o,com . The adopted active current common mode feedback compensation makes this possible. Simulations using MOSIS 2 m N-well process and a 3 V supply, show that with ±100% variation, V _o,com only varies by less than ±2%. In addition, it is shown that V _o,com is accurately controlled by a preset DC voltage. On the other hand, the buffered SFC adopts a novel body effect-free class AB buffer so as to have low standby power consumption but high current driving capability. It is implemented without resistors and common-mode feedback circuitry. Measurement results from a 1.2 m N-well CMOS chip indicate a bandwidth of 5.5 MHz while driving a 40 pF load with a supply voltage of ±1.5 V. The circuit is capable of supplying more than 3 mA of output current while consuming 1.1 mW of standby power. The THD is less than –55 dB at 1 KHz and the phase error is less than 2° for frequencies up to 1 MHz.     

Systematic approach for IG-FinFET amplifier design using gm/Id method

In this paper, a systematic approach has been used to apply gm/Id method for the design of Independent Gate (IG) FinFET amplifiers. The design of high-performance amplifiers using g_m/I_d method has been successfully applied to nanometer devices. IG-FinFETs have been widely used in digital circuit implementations. However, the application of IG-FinFETs in analog circuits is limited and brings many advantages including low power, low voltage operation of transistors. Independent gates of FinFET can receive different voltages that facilitate low voltage operation of the circuit. Simulation-based g_m/I_d method has been applied to IG-FinFET transistors and a systematic methodology has been developed for the design of IG-FinFET amplifiers. The Berkeley BSIM-IMG 55 nm technology parameters have been used for HSPICE simulations. The designed amplifier has a DC gain of about 45 dB while consuming 6.5 µW from single 1 V power supply.

     

New quartz multivibrator

A new quartz multivibrator having a frequency stability better than 0.0005 percent between 3 and 12-V supply voltage is described. The temperature variations influence the multivibrator frequency as claimed for the crystal itself--the influence of the circuit is negligible.     

Current-controllable monostable multivibrator with retriggerable function

This paper presents a novel current-controllable monostable multivibrator, which is composed of three operational transconductance amplifiers (OTAs), two grounded resistors, and one grounded capacitor. The pulse width and height of the output signal can be adjusted through the bias currents of OTAs and external resistors. In addition, this new monostable circuit features a retriggerable function that can efficiently overcome the problem of the recovery time. The proposed retriggerable monostable multivibrator including the parasitics and slew rate (SR) effect is analyzed in detail. A prototype circuit is built to conduct tests. Experimental results are shown to confirm the theoretical analysis. The presented current-controllable monostable circuits displays good linearities of current-to-pulse width and current-to-pulse height. Also the temperature stabilities are acceptable.     

Green biomass integrated electronic circuits

In this communication we report the successful development of an audio frequency amplifier and an astable multivibrator in a branch (with a stem and leaves) of a live Plumeria rubra (Indian Champo plant) and a cactus plant using external active devices (two Philips transistors BC 107B) and an external power supply. The green leaf mass structure substitutes for passive electronic components (R,?C,?L). A theoretical schematic circuit diagram along with the actual circuit layout and a potential speculative application scenario are presented.