数字多路选择器网络最小化设计的一种简便方法

多路选择是一种重要的多功能通用逻辑器件，已经证明利用多路选择器网络可以实现任何逻辑函数。本文给出数字多路选择器网络最小化设计的一种简便方法。这种方法的关键是求出待实现函数的简化的不相交积之和(SCIP)形式；选择合适的各级控制(地址)变量；利用展开定理分别求出原函数(或其子函数)的关于各积项的函数限制。从本文给出的设计实例说明这种方法是有效而易行的。     

Photonic access concentrator for ATM gigabit switching fabrics

In future broadband communication networks the interest for purely photonic switches is due to the bandwidth mismatch between optical transmission networks and electronic switching nodes. Photonic ATM switching fabrics mainly based on wavelength-switching stages are therefore being studied, to implement high capacity switches with also concentration, multiplexing and demultiplexing functions, using state-of-the-art photonic technology. The architecture of an ATM photonic access concentrator is described in this paper, illustrating the design and implementation of its basic subsystems, the traffic concentrator and the cell multiplexer. The design guidelines are outlined in detail referring to an example, where 128 user lines at 622 Mb/s are given access to 4 outlets at 2.488 Gb/s. The corresponding implementation, based on the systematic use of cell wavelength encoding, makes use either of well-known photonic components, such as Fabry-Perot filters, fiber delay lines, splitters and combiners, either of recently developed devices, like high-speed optical gates and tunable filters and lasers. Finally, the system feasibility is demonstrated presenting the results obtained on a reduced size and speed experimental setup of the cell multiplexer     

A Novel Control Method for Piezoelectric-Transformer Based Power Supplies Assuring Zero-Voltage-Switching Operation

In this paper, a new control strategy that allows zero-voltage-switching (ZVS) operation of power converters using piezoelectric transformers (PTs) is proposed. The control circuit operates in a closed loop by measuring the phase between the PTs resonant current and the switching pattern and adjusting the switching frequency to the optimum value so that ZVS operation is assured. An innovative nonlinear regulator based on an analog multiplexer is presented. The regulator automatically swaps the signs of the sensed signal and the reference signal to allow generation of the adequate control action. A laboratory prototype for a 6 W resonant inverter was tested; obtained experimental results are also shown.     

High-Order Switching Surface in Boundary Control of Inverters

A high-order switching surface for boundary control of inverters is presented in this paper. The concept is based on using the natural response of the power stage to formulate a logarithmic function to approximate the ideal switching surface. With the proposed control method, the inverter exhibits better dynamic responses than the ones with the first-order or recently proposed second-order switching surfaces. It will also be shown that the first- order and second-order switching surfaces are the low-order approximations of high-order switching surface. As the high-order switching surface is close to the ideal switching surface, its high trajectory velocity along the switching surface makes the inverter state trajectory move toward the steady-state operating point in two switching actions under large-signal disturbances. The effects of the parametric variations on the output voltage and the large- signal characteristics of the inverter will be discussed. The proposed control method has been successfully applied to a 300-W, 110-V, 60-Hz, single-phase full-bridge inverter. The steady-state and large-signal dynamic behaviors of the inverter supplying to resistive, nonlinear inductive, and full-wave rectifier loads will be given.     

Model Predictive Control of an Inverter With Output $LC$ Filter for UPS Applications

The use of an inverter with an output $LC$ filter allows for generation of output sinusoidal voltages with low harmonic distortion, suitable for uninterruptible power supply systems. However, the controller design becomes more difficult. This paper presents a new and simple control scheme using predictive control for a two-level converter. The controller uses the model of the system to predict, on each sampling interval, the behavior of the output voltage for each possible switching state. Then, a cost function is used as a criterion for selecting the switching state that will be applied during the next sampling interval. In addition, an observer is used for load-current estimation, enhancing the behavior of the proposed controller without increasing the number of current sensors. Experimental results under linear and nonlinear load conditions, with a 5.5-kW prototype, are presented, verifying the feasibility and good performance of the proposed control scheme.      

PWM Inverter Using High-Gain Pulse-Triggered Power Transistors and a New PWM Control Method

Rugged PWM transistor inverters are expected to be put into practical use for providing high reliability under adverse operating conditions. The bipolar power transistors are more common compared with MOSFET's power transistors in balance between power-handling capability and switching speed. High over current capability, low switching loss, high-speed switching, and high-current gain are requisite functions in the PWM inverter employing bipolar power transistors. These functions are of great concern in the power electronics field. A new PWM transistor inverter which can meet these requirements is presented in this paper. For this purpose, a concept of high-gain pulse-triggered power transistor (PTPT) with amorphous saturable current transformer (CT) is introduced.     

25.6 Gbit/s horizontally and vertically accessible embeddedmultiport SRAM

An architecture for an embedded 8-port SRAM with 256 bit simultaneous horizontal and vertical data access for adjacent or alternate addresses is proposed. This architecture makes possible four kinds of address configurations which are effective in video applications by selecting multiple word lines and one of four bit lines for each column multiplexer. The proposed SRAM provides 25.6 Gbit/s of high bandwidth     

A new quasi-resonant DC-link PWM inverter using single switch for soft switching

This paper presents a new quasi-resonant DC-link (QRDCL) inverter. Only one switching device is used to create zero voltage instants under all load conditions. The maximum voltage across the inverter devices is maintained at around (1.01-1.1) times the input source voltage. The circuit has the flexibility of selecting switching instants of the resonant link in synchronism with any PWM technique. Control technique does not require the help of inverter switches to create the zero voltage instants in the DC-link, and voltage and current sensors are eliminated from the control circuit. In this paper, the principle of operation and detailed analysis of the proposed QRDCL inverter are presented and design considerations for achieving soft switching are obtained. Detailed PSPICE simulation studies are carried out to study the feasibility of the proposed topology under various load conditions. The experimental results of the proposed QRDCL PWM inverter feeding a three phase induction motor are given.     

A Novel Four-Level Voltage Source Inverter—Influence of Switching Strategies on the Distribution of Power Losses

In this paper, a novel four-level inverter will be presented and analyzed. The proposed inverter topology, which is composed of a conventional two-level and a three-level neutral-point clamped (NPC) inverter, is suitable for high-voltage and high-power applications. The proposed inverter, when it is compared with the conventional four-level NPC pulsewidth modulation inverter, exhibits the following advantages: a) ability of changing the power losses distribution profile among the devices by selecting a suitable switching strategy; b) reduction of total inverter power semiconductor device losses; c) ability of bidirectional operation for all power semiconductor switches; and d) easy implementation using existing power semiconductor modules. The effect of conduction and switching losses profiles of the proposed inverter for different switching strategies is examined under different loads, power factors, and modulation indices. The dc-link capacitors voltages are effectively balanced via a proposed self-voltage balancing topology, without the need of isolated dc voltage sources or additional voltage stabilizing circuits. Finally, the theoretical results are confirmed by simulation and experimental results     

Soft switching space vector PWM inverter using a new quasi-parallelresonant DC link

A soft switching quasi-parallel resonant DC-link (QPRDCL) inverter with improved PWM capability has been recently presented. The circuit has the minimum voltage stress of the devices and provides the flexibility of selecting the on/off instants of the resonant link, resulting in improved PWM capability. In this paper, the operational principles and the detailed analysis of the QPRDCL inverter are presented for the resonant components design and the inverter control. An SVPWM with optimal vector sequence suitable for the QPRDCL inverter is also presented through the comparisons among five different modified space vector PWM (SVPWM) techniques classified by the voltage vector sequences. The performance of the selected optimal SVPWM is verified by the experimental results     

An APWM resonant inverter topology for high frequency AC power distribution systems

In this paper, an asymmetrical pulse-width-modulated (APWM) resonant inverter topology is presented for high frequency AC power distribution systems. The inverter system is comprised of simple power and control circuitry. The detailed analysis shows that the proposed inverter has very low total harmonic distortion, near-zero switching losses, and fast transient response. A design procedure is illustrated as well. Simulation and experimental results are presented to prove the performance of the proposed inverter.     

Low-power multi-core ATPG to target concurrency

A function-based automatic test pattern generation (ATPG) tool for embedded core testing is presented that reduces test cost and considers test power dissipation of system-on-chip (SoC). Cores are tested concurrently with the use of test functions, as opposed to simple patterns, and by I/O pin allocation on the test access mechanism (TAM) during a compact ATPG process. Turnaround time benefits from pre-existing test vectors, or test functions supplied by the provider of each core. The presented method also targets low-power dissipation by considering the switching activity on the SoC inputs. Experimental results show a significant reduction in the test application time due to the achieved level of concurrency.     

A Virtual-Flux Decoupling Hysteresis Current Controller for Mains Connected Inverter Systems

This paper proposes a new simple method of three- phase, sensorless mains voltage, power control with near constant switching frequency based on a decoupling hysteresis current controller (DHC), and the virtual-flux concept. The virtual flux method is used to extract the mains voltage from the switching state, dc voltage, and line currents. From the desired real and reactive powers the three-phase currents are generated using a DHC. The DHC avoids the switching interaction between the phases, and when a variable hysteresis band is employed a near constant switching frequency is achieved. The method is also extended for high power inverter applications that include an inductance- capacitance-inductance output filter, where some undesirable characteristic, such as filter resonance, have to be compensated. Theoretical analysis is presented and the performance of the proposed method is experimentally verified.     

Modulated integral control technique for compensating switch delaysand nonideal DC buses in voltage-source inverters

Standard pulsewidth modulation (PWM) techniques assume a ripple-free DC-link voltage at the inverter input terminals and ideal switches. Most techniques proposed in the literature to compensate the nonideal characteristics require additional and complex circuitry. This paper proposes and analyzes a simple method of generating PWM switching patterns which ensures a high-quality output voltage and inherently compensates for a nonideal DC bus and switching delays. The method is based on maintaining a sinusoidal volt-second distribution at the inverter output by sensing the output voltage and generating the gating pattern online. The principles of operation are explained, and a design procedure is presented. Simulation results illustrating the features of the proposed modulator are verified experimentally on a 3 kVA prototype unit     

Partial fraction expansion of functions with multiple poles

A simple and systematic technique is presented for the evaluation of partial fraction coefficients of functions having multiple poles. The procedure makes use of the derivatives of a function's numerator and denominator separately (rather than their ratio) and is not limited to rational functions.     

A generalized Undeland snubber for flying capacitor multilevel inverter and converter

This paper proposes a snubber circuit for a flying capacitor multilevel inverter and converter. It also explains the concept of constructing a snubber circuit for a multilevel inverter and converter. The proposed snubber circuit makes use of an Undeland snubber as a basic snubber unit, and thus can be regarded as a generalized Undeland snubber for a flying capacitor multilevel inverter and converter. It has such an advantage of Undeland snubber used in the two-level inverter. Compared with a conventional RLD/RCD snubber for multilevel inverter and converter, the proposed snubber keeps such good features as fewer number of components, reduction of voltage stress of main switching devices due to low overvoltage, and improved efficiency of system due to low snubber loss. In this paper, the proposed snubber is applied to a three-level flying capacitor inverter, and its features are in detail demonstrated by computer simulation and experimental result.     

Optimised PWM inverter control using artificial neural networks

A novel method of producing optimum switching functions for the voltage and harmonic control of DC-to-AC bridge inverters using neural networks is presented. Results obtained from an experimental implementation of a neural network-based inverter system are included. The implementation does not depend on any hardware configuration and can be modified without affecting the performance     

A high switching frequency IGBT PWM rectifier/inverter system forAC motor drives operating from single phase supply

A pulse width modulated (PWM) rectifier/inverter system using insulated gate bipolar transistors (IGBTs), capable of switching at 20 kHz is reported. The base drive circuit for the IGBT, incorporating short-circuit protection, is presented. The inverter uses an Undeland snubber together with a simple energy recovery circuit, which ensures reliable and efficient operation even for 20 kHz switching. The front end for the system is a regenerative single phase full bridge IGBT inverter along with an AC reactor. Steady-state design considerations are explained, and control techniques for unity power factor operation and fast current control of the front end power converter, in a rotating as well as a stationary reference frame, are discussed and compared. Results from computer simulations and experimental results for a 1.5 kW prototype system are presented     

Switching frequency optimal PWM control of a three-level inverter

A pulse-width-modulation (PWM) method for the control of a three-level inverter is described. The switching frequency optimal-PWM method (SFO-PWM) works with a constant carrier frequency not synchronized with fundamental stator frequency. SFO-PWM gives an optimal utilization of the mean thyristor switching frequency permitted; therefore, PWM carrier frequency may be chosen to a value of two times the permitted mean thyristor switching frequency. The signal processing structure is simple. Many applications of three-level inverter work with a DC-link neutral point not stabilized from the power input converter. A neutral-point potential control is described, which is capable of stabilizing potential by varying the switching sequences of the three-level inverter itself. Results from computer simulation and practical experience show the good performance of SFO-PWM     

基于AOA的多功能n–1阶电流模式滤波器

提出了一种基于AOA(abjoint Op-Amp)多环反馈电流模式多功能滤波器的系统设计方法。以三阶巴特沃思滤波器为例,进行了理论分析。通过改变输入、输出信号的位置,既可从同一端口分别实现低通、带通和高通滤波,又可从不同端口同时实现多种滤波功能。滤波器参数取决于无源电阻、电容,与温度无关,因而稳定性好;滤波器的理论误差小,精度高。计算机仿真证明该滤波器正确有效。