Thermally annealed Ni/n-GaAs(Si)/In Schottky barrier diodes

We have identically prepared as many as eight Ni/n-GaAs/In Schottky barrier diodes (SBDs) using an n-type GaAs substrate with a doping density of about 7.3 × 10¹⁵ cm⁻³. The thermal stability of the Ni/n-GaAs/In Schottky diodes has been investigated by means of current-voltage (I-V) techniques after annealed for 1 min in N₂ atmosphere from 200 to 700 °C. For Ni/n-GaAs/In SBDs, the Schottky barrier height Φ_b and ideality factor n values range from 0.853 ± 0.012 eV and 1.061 ± 0.007 (for as-deposited sample) to 0.785 ± 0.002 eV and 1.209 ± 0.005 (for 600 °C annealing). The ideality factor values remained about unchanged up to 400 °C annealing. The I-V characteristics of the devices deteriorated at 700 °C annealing.     

Controlling of electronic parameters of GaAs Schottky diode by poly(3,4-ethylenedioxithiophene)-block-poly(ethylene glycol) organic interlayer

The electronic properties of metal-organic semiconductor-inorganic semiconductor structure between GaAs and poly(3,4-ethylenedioxithiophene)-block-poly(ethylene glycol) organic film have been investigated via current-voltage and capacitance-voltage methods. The Au/PEDOT/n-GaAs contact exhibits a rectification behavior with the barrier height of 0.69 eV and ideality factor value of 3.94. The barrier height of the studied diode (0.67 eV) is lower than that of Ni/n-GaAs/In (0.85 eV) and Au/n-GaAs/In Schottky diodes. The decrease in barrier height of Au/n-GaAs/In Schottky diode is likely to be due to the variation in the space charge region in the GaAs. The obtained results indicate that control of the interfacial potential barrier for metal/n-GaAs diode was achieved using thin interlayer of the poly(3,4-ethylenedioxithiophene)-block-poly(ethylene glycol).     

The effects of the temperature and annealing on current-voltage characteristics of Ni/n-type 6H-SiC Schottky diode

The temperature dependence of current-voltage (I-V) characteristics of as-fabricated and annealed Ni/n-type 6H-SiC Schottky diode has been investigated in the temperature range of 100-500 K. The forward I-V characteristics have been analysed on the basis of standard thermionic emission theory. It has been shown that the ideality factor (n) decreases while the barrier height (Φ_b) increases with increasing temperature. The values of Φ_b and n are obtained between 0.65-1.25 eV and 1.70-1.16 for as-fabricated and 0.74-1.70 eV and 1.84-1.19 for annealed diode in the temperature range of 100-500 K, respectively. The I-V characteristics of the diode showed an increase in the Schottky barrier height, along with a reduction of the device leakage current by annealing the diode at 973 K for 2 min.     

Effect of annealing temperature on the electrical characteristics of Platinum/4H-SiC Schottky barrier diodes

Pt/4H-SiC Schottky barrier diodes have been fabricated to investigate the effect of annealing on the electrical characteristics of the fabricated devices. The parameters such as barrier height, ideality factor and donor concentration were deduced from the current–voltage (I–V) and the capacitance–voltage (C–V) measurements at room temperature. Diodes showed non-ideal behaviour like high value of ideality factor and lower value of barrier height. A barrier height of 1.82?eV was obtained from C–V measurements and it was 1.07?eV when obtained from the I–V measurements with ideality factor 1.71 for as-deposited diodes at room temperature. The diodes, therefore, were annealed in the temperature range from 25°C to 400°C to observe the effect of annealing temperature on these parameters. Schottky barrier height and ideality factors were found to be temperature-dependent. After rapid thermal annealing upto 400°C, a barrier height of 1.59?eV from C–V measurements and the value of 1.40?eV from I–V measurements with ideality factor 1.12 were obtained. Barrier heights deduced from C–V measurements were consistently larger than those obtained from I–V measurements. To come to terms with this discrepancy, we re-examined our results by including the effect of ideality factor in the expression of the barrier height. This inclusion of ideality factor results in reasonably good agreement between the values of barrier height deduced by the above two methods. We believe that these improvements in the electrical parameters result from the improvement in the quality of interfacial layer.     

GaAs肖特基二极管中不连续性电路仿真分析

在太赫兹技术应用系统中,太赫兹混频器是太赫兹接收前端的关键部件,而太赫兹肖特基二极管是太赫兹混频器的核心器件。本文采用信号完整性的方法对肖特基二极管在无源区的特性进行建模分析,并对不连续性、寄生电容等参数进行分析。根据肖特基二极管设计的物理参数,如尺寸、材料的介电常数等,在高频结构仿真器(HFSS)中对肖特基二极管进行建模。通过多次建模仿真,最终给出肖特基二极管的等效电路模型。通过对比 HFSS中提取二极管欧姆焊盘的S参数和 Ansoft-designer中对二极管欧姆焊盘的等效电路进行仿真得到的S参数,证明了等效电路的合理性。该模型可以应用在对太赫兹混频器的电路级仿真中。     

Improved Ni Schottky Contacts on <Emphasis Type="Italic">n</Emphasis>-Type 4H-SiC Using Thermal Processing

High-temperature processing was used to improve the barrier properties of three sets of n-type 4H-SiC Schottky diodes fabricated with Ni Schottky contacts. We obtained an optimum average barrier height of 1.78 eV and an ideality factor of 1.09 using current–voltage measurements on diodes annealed in vacuum at 500°C for 24 h. Nonannealed contacts had an average barrier height of 1.48 eV and an ideality factor of 1.85. The Rutherford backscattering spectra of the Ni/SiC contacts revealed the formation of a nickel silicide at the interface, accompanied by a substantial reduction in oxygen following annealing.     

Compositional dependence of thermal stability of refractory metal silicide schottky contacts to GaAs

Thermal stability of refractory metal silicide Schottky contacts, WSi_x, TaSi_x and MoSi_x withx = 0.6 andx = 2, to GaAs have been studied. It was found that the outdiffusion of Ga and As through the silicide films depends on the silicide composition, with much higher diffusion rate in films withx = 2 than in films withx = 0.6 and, therefore, contributes to the degradation of the Schottky barriers after high temperature anneal-ing.     

Influence of Al2O3 barrier on the interfacial electronic structure of Au/Ti/n-GaAs structures

The Au/Ti/n-GaAs structures with and without Al₂O₃ interfacial layer have been fabricated.The Al₂O₃ interfacial layer has been formed on the GaAs substrate by atomic layer deposition.The effects of the interfacial layer on the current-voltage (I-V) and capacitance-voltage (C-V) characteristics of the devices have been investigated in the temperature range of 60-300 K.It has been seen that the carrier concentration from C-V characteristics for the MIS (metal/insulating layer/semiconductor) diode with Al₂O₃ interfacial layer has a higher value than that for the reference diode without the Al₂O₃ interfacial layer (MS).Such a difference in the doping concentration has been attributed not to doping variation in the semiconductor bulk but to the presence of the Al₂O₃ interfacial layer because both diodes have been made on the pieces cut from the same n-type GaAs wafer.The temperaturedependent I-V characteristics of the MIS diode do not obey the thermionic emission current theory because of the presence of the Al₂O₃ layer.An electron tunneling factor,aδ(χ)^1/2,value of 20.64 has been found from the I-V-T data of the MIS diode.An average value of 0.627 eV for the mean tunneling barrier height,χ,presented by the Al₂O₃ layer has been obtained.     

The Cu/n-GaAs schottky barrier diodes prepared by anodization process

The metal-insulating semiconductor (MIS) Cu/n-GaAs diodes with thin anodic-insulating layer, which is formed by anodic oxidazation on the n-GaAs substrate in aqueous 4C₂H₆O₂+2H₂O+0.1H₃PO₄ electrolyte with pH=2.02; anodically untreated control Cu/n-GaAs diodes; and anodically treated Cu/n-GaAs diodes (several steps of anodization in the same electrolyte followed by a dip in diluted aqueous HCl solution and a subsequent rinse in deionized water) have been prepared. The anodization has increased the barrier heights as well as the ideality factors. We have obtained barrier heights of approximately 0.68 eV, 0.90 eV, and 0.92 eV for the control sample, anodically treated sample, and MIS sample, respectively, adding the contribution caused by image-force effect only. Thus, the barrier height has been increased by at least 140 meV. Furthermore, we have calculated a mean tunneling-barrier height of x=0.025 eV for the MIS Cu/n-GaAs Schottky barrier diode (SBD).     

Temperature dependent dielectric studies of Ni/n-GaP Schottky diodes by capacitance and conductance measurements

The dielectric properties of Ni/n-GaP Schottky diode were investigated in the temperature range 140–300 K by capacitance–voltage (C–V) and conductance–voltage (G/ω–V) measurements. The effect of temperature on series resistance (R_s) and interface state density (N_ss) were investigated. The dependency of dielectric constant (ε′), dielectric loss (ε′′), loss tangent (tan δ), ac conductivity (σ_ac), real (M′) and imaginary (M′′) parts of the electric modulus over temperature were evaluated and analyzed at 1 MHz frequency. The temperature dependent characteristics of ε′ and ε′′ reveal the contribution of various polarization effects, which increases with temperature. The Arrhenius plot of σ_ac shows two activation energies revealing the presence of two distinct trap states in the chosen temperature range. Moreover, the capacitance–frequency (C–f) measurement over 1 kHz to 1 MHz was carried out to study the effect of localized interface states.     

钨硅化物砷化镓Schottky接触的形成和特性

本文报道了钨硅化物-砷化镓Schottky接触的形成过程和电学特性.实验表明,WSi_x/GaAs Schottky接触具有优越的I-V特性,势垒高度保持在0.8V,理想性因子实际上保持在1,并具有高温稳定性.研究表明,除了硅化物的成份,表面处理工艺和硅化物淀积技术也将对Schottky接触的I-V特性和热稳定性产生强烈的影响.本文提出利用对GaAs衬底的溅射腐蚀和在淀积过程中加以负的衬底偏置能显著地改进金属层与衬底的粘附性.     

退火温度对Au/Ti/4H-SiC肖特基接触特性的影响

采用电子束蒸发法在4H-SiC表面制备了Ti/Au肖特基电极,研究了退火温度对Au/Ti/4H-SiC肖特基接触电学特性的影响.对比分析了不同退火温度下样品的电流密度-电压(J-V)和电容-电压(C-V)特性曲线,实验结果表明退火温度为500℃时Au/Ti/4H-SiC肖特基势垒高度最大,在.J-V测试和C-V测试中分别达到0.933 eV和1.447 eV,且获得理想因子最小值为1.053,反向泄漏电流密度也实现了最小值1.97×10-8 A/cm2,击穿电压达到最大值660 V.对退火温度为500℃的Au/Ti/4H-SiC样品进行J-V变温测试.测试结果表明,随着测试温度的升高,肖特基势垒高度不断升高而理想因子不断减小,说明肖特基接触界面仍然存在缺陷或者横向不均匀性,高温下的测试进一步证明肖特基接触界面还有很大的改善空间.     

ZrN/n-GaAs肖特基势垒特性研究

本文用RBS,AES和电特性测量等方法,研究了ZrN/n-GaAs肖特基势垒.结果表明ZrN/GaAs势垒有良好的电特性和高温稳定性.经850℃高温退火后,势垒高度为0.90eV,理想因子n=1.02.同时我们观察到,随着退火温度升高(从500℃升高到850℃),ZrN/GaAs势垒电特性有明显改进:肖特基势垒高度增大、二极管反向电流减小、二极管电容减小和反向击穿电压增大.以上特点表明,ZrN/GaAs是用于自对准高速GaAs集成电路的较为理想的栅材料.     

Correlation of microstructure with electrical behavior of Ti/GaN schottky contacts

We correlate structural and electrical characteristics of as-deposited and low-temperature annealed Ti contacts on GaN. Temperature dependent currentvoltage measurements are used to determine the effective barrier heights of the respective contacts, while high-resolution transmission electron microscopy is utilized for structural characterization. As-deposited Ti contacts are slightly rectifying with an effective barrier height of ∼200 meV. After annealing at 230°C, the barrier height increases to values of ∼450 meV. A similar behavior of Schottky contacts with more strongly rectifying diodes upon low-temperature annealing is observed for Zr metal contacts on GaN. As-deposited Ti already forms a thin TiN layer at the GaN interface. After annealing at 230°C, the average thickness and the distribution of TiN grains remain practically unchanged, but the interface with GaN roughens. We correlate the observed barrier height changes with interface roughness and phase formation and we discuss the results in terms of interface damage and the Schottky-Mott theory.     

JTE结构4H-SiC肖特基二极管的研究

借助半导体仿真软件Silvaco,仿真一种具有结终端扩展（JTE）结构的碳化硅（SiC）肖特基二极管（SBD）。其机理是通过JTE结构降低肖特基结边缘的电场集中效应,从而优化肖特基二极管的反向耐压能力。研究JTE区深度、宽度及掺杂浓度对碳化硅肖特基二极管的反向耐压的影响。通过优化结终端结构的结构参数使碳化硅肖特基二极管的反向耐压特性达到更好的性能要求。     

The influence of high-temperature annealing on SiC schottky diode characteristics

The influence of high temperature (up to 800C) annealing on the current-voltage characteristics of n-type 6H-SiC Schottky diodes is presented. Our experimental results indicate that high-temperature annealing can result in the improvement of the forw ard and reverse electrical characteristics of SiC Schottky diodes by repairing any leaky low barrier secondary diode parallel to the primary diode that may be present due to the barrier inhomogeneities at the Schottky contact interface.     

Numerical analysis of inhomogeneous Schottky diode with discrete barrier height patches

The potential profile inside the semiconductor at the metal–semiconductor contact is simulated by numerically solving the Poisson equation and the drift diffusion equations for inhomogeneous Schottky diode. From the simulated potential and the electron and hole concentrations, the drift-diffusion current as a function of bias is calculated. The simulation is carried out for various distribution patterns of barrier height patches at the metal–semiconductor contact to study the effect of barrier inhomogeneities on the Schottky diode parameters, namely barrier height and ideality factor and their temperature dependence. It is found that barrier height decreases and ideality factor increases with increase in the deviation of discrete barrier height patches in the distribution. The resulting barrier parameters are studied to understand the effect of barrier inhomogeneities on the current–voltage characteristics of inhomogeneous Schottky contact.     

4H-SiC结型势垒肖特基二极管的制作与特性研究

本文设计制作了两种具有不同结构参数的4H-SiC结型势垒肖特基二极管,在制作过程中采用了两种制作方法：一种是对正电极上的P型欧姆接触进行单独制作,然后制作肖特基接触的工艺过程;另一种是通用的通过一次肖特基接触制作就完成正电极制作的工艺过程。器件制作完成后,通过测试结果比较了采用场限环作为边界终端与未采用边界终端的器件的反向特性,结果显示采用场限环有效地提高了该器件的击穿电压,减小了其反向电流。另外,测试结果还显示采用独立制作P型欧姆接触的工艺过程有效提高了4H-SiC结型势垒肖特基二极管的反向特性,其中P型欧姆接触的制作过程和结果也在本文中做出了详细叙述。     

Ta/Si Schottky diodes fabricated by magnetron sputtering technique

Electrical properties of Ta/n-Si and Ta/p-Si Schottky barrier diodes obtained by sputtering of tantalum (Ta) metal on semiconductors have been investigated. The characteristic parameters of these contacts like barrier height, ideality factor and series resistance have been calculated using current voltage (I-V) measurements. It has seen that the diodes have ideality factors more than unity and the sum of their barrier heights is 1.21 eV which is higher than the band gap of the silicon (1.12 eV). The results have been attributed the effects of inhomogeneities at the interface of the devices and native oxide layer. In addition, the barrier height values determined using capacitance-voltage (C-V) measurements have been compared the ones obtained from I-V measurements. It has seen that the interface states have strong effects on electrical properties of the diodes such as C-V and R_s-V measurements.     

双面Schottky势垒型GaAs粒子探测器特性

双面肖特基势垒型 Ga As粒子探测器由半绝缘砷化镓材料制成 ,器件结构为金属 -半导体-金属结构 ,该探测器能经受能量为 1 .5Me V、剂量高达 1 0 0 0 k Gy的电子、50 0 k Gy的 γ射线、β粒子、X射线等粒子的辐照测试 ,辐照后器件击穿曲线坚挺 ,反向漏电流最低为 0 .48μA.器件的另一特征是其反向漏电流与 X射线的照射量呈线性关系 .该探测器在 2 4 1Am( Eα=5.48Me V) α粒子辐照下 ,其最大的电荷收集率和能量分辩率分别为 45%和 7% .在由 90 Sr( Eβ=2 .2 7Me V)发出的 β粒子辐照下 ,探测器有最小的电离粒子谱 .该探测器对光照也有明显的响应