Double-image Green's function method for 3-D capacitance and conductance extraction of on-chip transmission lines

A new double-image Green's function approach is developed to compute the frequency-dependent capacitance and conductance for three-dimensional multilayered on-chip transmission lines on silicon substrate. The ε-algorithm of the Pade approximation is adopted to reduce the time for establishing the coefficient matrix. The parameters gained from this new approach are shown to be in good agreement with the data obtained by the total charge Green's function method.     

Low-frequency capacitance measurements

The letter proposes a technique for the fast determination at extremely low frequencies of the capacitance and leakage components of capacitors. The proposed method permits the measurement of C and G in only a few cycles. An apparatus is described employing this technique for the automatic measurement of m.o.s. capacitance as a function of frequency and bias voltage.     

Admittance and nonlinear capacitance of a multilayer metal-semiconductor structure

Nonlinear properties of capacitance and frequency dependence of admittance for a multilayer metal-semiconductor structure are studied theoretically. It is shown that admittance of such structure depends on the frequency of a small probe signal. The voltage dependence of capacitance measured using a low-frequency probe signal can be nonmonotonic. The behavior of the structure’s capacitance at a large amplitude of external signal is studied. After some time from the instant of switching-on of the high-frequency signal, the system is found in a steady state with certain charge of the metal layer and predefined capacitance of the system. In the steady state, the charge of metal and the capacitance do not depend on the instantaneous value of the voltage; rather, they are governed by the signal’s amplitude.     

Electron ground state in the semiconductor inversion layer and low frequency MIS capacitance

By varying the total energy and electrostatic energy functionals which represent an approximate self-consistent solution of Schrödinger's and Poisson's equation, the ground state of electrons is determined in a semiconductor inversion layer. It was assumed that all the electrons in the semiconductor inversion layer are in the ground state.The low frequency capacitance metal-insulator-semiconductor (MIS) capacitors is calculated by the proposed theory and the results are compared with classically calculated capacitance. Numerical results are given for a silicon (111) p-type bulk at 77°K.     

Junction capacitance and related characteristics using graded impurity semiconductors

The transition capacitance of a junction of semiconductors with constant impurity density is well-known and varies inversely with the square root of the bias voltage. This paper analyzes the variation of transition capacitance with bias voltage of a junction of semiconductors with graded impurity densities; i. e., densities which are an arbitrary function of position. It is found that the transition capacitance can be simply related to a depletion width and that, in turn, depletion width can be related to the bias voltage. An analysis is also carried out for the impurity grading to produce a specified transition capacitance variation, as for instance, a linear variation of capacitance with bias voltage. It is also possible to determine impurity gradings to satisfy certain special conditions. An example of this type that is considered in some detail is the determination of the impurity grading which will produce avalanche breakdown simultaneously throughout the semiconductor. An important result of the analysis is that the capacitance vs bias voltage relation can be favorably modified by suitable choice of impurity grading (see Fig. 7). The practical realization of the various characteristics considered in this article is contingent upon techniques for fabricating semiconductors with specified impurity gradings.     

Analysis of interconnect capacitance for sub nano CMOS technology using the low dielectric material

A vital parameter interconnect capacitance in the ULSI has been investigated in this paper. The potential and static capacitance under the metal line strip has been determined by solving the Poisson’s equation by finite difference method. It has been observed that, the lowering of interconnect width and spacing between the two metal lines affect significantly on coupling capacitance. The total capacitance (C_T) is dominantly being contributed by coupling capacitance (C_c). The calculations of C_T have been made by using the low dielectric constant (k = 2.97) of the deposited hybrid thin film.     

Effect of pad capacitance on the notch frequency of the MOS distributed RC (MOS-RC) notch network

In this communication the effect of pad capacitance on the characteristics of the MOS distributed RC ($\text{RC}$) notch network is studied. It is shown that as a result of the presence of pad capacitances, the notch frequency and the ratio of distributed resistance to the shunt resistance ($\text{A}\text{=}\text{r}{}_{\mathrm{<mtext>o</mtext>}}\text{L}\text{R}{}_{\mathrm{<mtext>sh</mtext>}}$) change. Both notch requency and resistance ratios decrease with pad capacitance.The pad capacitance is treated as external capacitances to the distributed structure and the implications of it's presence is studied.The results show that, if properly considered, additional fabricating technique to reduce the pad capacitance may not be necessary as appropriate expressions for the resistance ratios and notch frequency would be used to compute the corresponding notch frequency of the structure.Plots of open circuit voltage transfer functions for various values of distributed capacitance to pad capacitance ratio k are given from which rejections of 60 ab's and over have been obtained.     

Thermodynamic considerations of p-n junction capacitance

Recently, accurate solutions for the hole and electron densities and the electric field in a $\text{p-n}$ junction have become available. By use of these solutions it is possible to calculate $\text{p-n}$ junction capacitance more accurately. The literature contains several different viewpoints on the details of the calculation of junction capacitance. In this paper several formulations are briefly reviewed and a numerical comparison is given for an asymmetrical $\text{p-n}$ step junction. Space-charge capacitance and diffusion capacitance are shown to be well-defined quantities even if the depletion approximation is not valid. An extension of the so-called “energetic” definition of capacitance is presented. In particular, it is shown that the definition involving energy stored in the electrical field of a junction is valid only for large reverse bias. The range of validity may be extended to any bias, by consideration of both chemical and electrical energy: i.e., the total thermodynamic energy stored in the junction.     

Exact closed-form expressions for substrate resistance and capacitance extraction in nanoscale VLSI

A new exact formula to determine the substrate resistance and capacitance is presented in this work. It is derived from the solution of the Laplace equations for equivalent problems. It achieves the level of accuracy of standard electromagnetic methods while it is orders of magnitude faster than them. Equations for both rectangular and non-rectangular shapes of interconnect lines which apply to sub-micron technologies are presented. Both data from commercial simulators and measurement data obtained from a fabricated test chip are utilized in order to show the validity of the proposed formula. The results show that the proposed formula succeeds in computing the substrate's resistive and capacitive coupling.     

A simplified high-frequency MOS capacitance formula

A simple modification of Lindner's formula for the high-frequency capacitance is proposed which requires neither a numerical integration nor tabulated constants. The formula is accurate to within 1.5% at all biases for uniform doping in the range 10¹⁴/cm³ to 10¹⁸/cm³.     

Analysis of the channel inversion layer capacitance in the very thin-gate IGFET

As the gate insulator thickness approaches the channel thickness, the gate capacitance is speculated to be smaller than its gate insulator capacitance. The gate capacitance of the thin-gate IGFET is calculated using Maxwell-Boltzmann and Fermi-Dirac statistics and is experimentally measured. The results show that the gate capacitance approaches the gate insulator capacitance regardless of the gate thickness within the practical range (T_{ox} > 50Å). To explain why the channel thickness is not reflected in the measured gate capacitance, the channel inversion layer capacitance is analyzed numerically. Based on that, its effects on the gate capacitance are discussed quantitatively and an equivalent circuit is proposed.     

Classical capacitance of few-electron dielectric spheres

The capacitance of few-electron dielectric spheres differs from the many-electron Gauss model of infinitesimally-divisible charge as a result of the electrostatic interaction of discrete electrons. Minimization of the total classical interaction energy for nanometer-size devices without quantum effects for up to 12 electrons is obtained. Unlike the Gauss model, capacitance is non-constant. The variation of capacitance with N, thus, with voltage, in a non-magnetic, classical domain, opens a new field of discrete charge nanometer-size devices and applies to the general chemistry of nanoparticles.     

Interdigitated pn junction device with novel capacitance/voltage characteristic, ultralow capacitance and low punch-through voltage

The first demonstration of the recently disclosed channelling diode is reported. The structure combines important and unique features which can be used for a large variety of applications. The diode exhibits a novel capacitance/voltage characteristic; large capacitance variations (1 pF) have been achieved over a small voltage range. Operated as a PIN diode the device has an ultralow capacitance (0.05 pF) and a low punch-through voltage (2?3 V). This small capacitance is largely independent of the detector area and of the doping of the layers. These features are important for ultralow noise PINFET receiver applications.     

An experimental determination of the forward-biased emitter-base capacitance

An accurate f_T measurement technique is presented, enabling to derive, after correction for the diffusion capacitance, the emitter transition capacitance from f_T(IC). Results are compared with the Poon-Gummel C-V expression, confirming experimentally a maximum of transition-layer capacitance at the “built-in” voltage V₁.     

Error analysis of high-frequency MOS capacitance calculations

An error analysis of the Lindner and Grove et al. methods of computing the high-frequency capacitance of metal-oxide-semiconductor (MOS)_capacitors is presented. The analysis is based upon a differential equation for the capacitance introduced by Sah, Pierret and Tole (the “SPT capacitance”). This equation does not employ the minority-carrier-depletion approximation of Lindner, nor the depletion-width approximation of Grove et al., nor does it require matching different solutions in different bias regions. Consequently, all these approximations can be tested.Our results show that the approximations in the Lindner capacitance introduce only $\text{1}\text{to}\text{2}\text{1}\text{2}$ per cent deviation from the SPT capacitance in the doping range from 10¹⁷/cm³ to 10¹³/cm³, respectively. The simple Grove capacitance based upon the majority carrier depletion approximation differs by 10 per cent from the SPT capacitance at a band bending 5 kT/q on the depletion side of flatbands, and differs by 6–11 per cent in strong inversion for the same doping range. Finally, it is shown that by resorting to a numerical integration the Lindner capacitance can be made to agree with the SPT capacitance to 10^?10C_FB at 10¹⁷/cm³ and 10^?5C_FB at 10¹³/cm³ (C_FB = flatband capacitance). These results indicate that the SPT calculation is rather well approximated by the Lindner capacitance, and that for most purposes some form of the Lindner capacitance would be adequate.Our results also indicate the level of accuracy that is meaningful in any numerical evaluation of the various calculations.Finally, it should be noted that errors due to overidealizations in the SPT formulation itself have not been evaluated. However, whatever this error may be, the net error in any of the other methods is the sum of the SPT error and the error computed here. Consequently, any future error analysis need not repeat what has been done here, but may confine itself to the error in the SPT calculation.     

A physics based model for the RTD quantum capacitance

A simple derivation of the form for the compact model of the quantum capacitance in a resonant tunneling diode (RTD) is presented. The quantum capacitance is shown to reduce the resistive cutoff frequency. The implementation of the model into SPICE is described. The distorting effect of the strongly nonlinear quantum capacitance on an oscillator circuit is demonstrated in a SPICE simulation. The nonlinearity becomes important for the highest frequency applications when the RTD capacitance is comparable to the capacitance in the rest of the circuit.     

ESD protection structure with reduced capacitance and overshoot voltage for high speed interface applications

Dual diodes with embedded silicon controlled rectifier (DD-SCR) for high-speed applications are presented. A new DD-SCR topography is shown to exhibit a high failure current (I_t2), small on-state resistance (R_ON), low voltage overshoot and low parasitic capacitance. This is a preferred device option for broadband high-speed data converter applications in advanced 28 nm CMOS processes. A comprehensive device characterization demonstrates the design tradeoffs and the superior ESD performance in relation to the devices' variations capacitance in the sub 40 fF range.     

Calculation of the mutual capacitance of nanoobjects

A method for determination of the mutual effective capacitance for molecules, molecular clusters, and nanoparticles on the basis of the quantum-mechanical calculation of the interaction energy of nanoscale charged objects is proposed. The mutual effective capacitance for pairs of similar molecules (carborane C₂B₁₀H₁₂, fullerene C₆₀, and molecular cluster Pt₅(CO)₆(PPh₃)₄) with a size of 0.3 to 0.7 nm is calculated for distances between these molecules from 2 to 20 nm. It is demonstrated that this method makes it possible to determine the scale of distances between nanoobjects for which it is necessary to take into account quantum corrections.     

On the two-dimensional capacitance calculation of multiconductor multilayered interconnects

In this paper a method for analysis and modelling of transmission interconnect lines on multilayered dielectric media is presented. The analysis is based on semianalytical layered Green’s function and the electromagnetic concept of free charge density. It allows us to obtain integral equations between electric scalar potential and charge density distributions. These equations are solved by the Galerkin procedure of the Method of Moments. After this, the capacitance matrix of multiconductor interconnect lines in the presence of planar dielectric interfaces is calculated. When there exists no infinite ground plane, we enforce the constraint that the sum of all free charges is zero. The feasibility of the method has been shown by simulations of several transmission-line problems. The results have been compared with reported data obtained by free-space Green’s function method, conformai mapping formulas, generalized method of lines and inverted capacitance coefficient matrix technique. The proposed approach is not inferior to other procedures in terms of generality and memory requirements. At the same time, a reduction of the central processing unit (cpu) time is achieved because the integral equations are solved numerically only on the surface of conductor lines.     

Diagnostics of the models of the diode barrier capacitance

The model characteristics of the barrier capacitance of the p-n junction at an arbitrary distribution of impurities in the base are studied. It is demonstrated that the simulation of the C-V characteristic of the nonlinear capacitance can be supplemented with the analysis of its first two derivatives. The identification of the model parameters using the least-squares method is considered.