A high-linear wide-tunable CMOS transconductor for video frequency applications

In this paper a new CMOS transconductor structure based on a g_m-boosted degenerated differential pair is presented for applications in the video frequency range. The proposed circuit combines two techniques, a switchable array of source degenerating MOS resistors and a programmable output current mirror, in order to widen the G_m tuning range while maintaining linearity. Degeneration MOS resistors are made common-mode voltage independent thanks to a simple control circuit. Post-layout simulation results from a 0.35 μm design supplied at 3.3 V show a wide tuning range (10–100 MHz), good linearity (−58.4 dB for an output signal voltage of 1.1 V_p–p) and low excess phase (<0.5° over the whole tuning range).     

神经MOS晶体管

神经ＭＯＳ晶体管是１９９１年发明出来的一种具有高功能度的多输入栅控制的浮栅ＭＯＳ器件。本文介绍了它的基本结构和特点,论述了这种新哭喊 件及其电路的国外研究现状、研究趋以及笔者所完成的研究工作。     

用于智能功率集成电路中的LDMOS/LIGBT混合结构

本文提出了一种新型的LDMOS/LIGBT混合结构.它兼具LIGBT的驱动能力强和LDMOS的速度快的特点,并且衬底电流小,能很好的抗闭锁.利用此结构可在很宽的电压范围内得到一稳定的输出信号.数值模拟和实验表明此结构对实现智能功率集成电路中的高、低压端信号传输具有突出的优点.     

Low-Voltage Differentiator for VHF Filtering

In this paper a G _m -C resonator circuit is proposed which is based on a new current-mode differentiating concept, compatible with low voltage and very high frequency operation.A prototype 4th-order 200 MHz band pass filter has been fabricated using a 0.8 m CMOS process and shows a side-band rejection lower than –80 dB. This response confirms the feasibility of the proposed resonator in very-high frequency applications such as IF band pass sections of RF front-end circuits. The filter consumes less than 5.5 mW from a 2.7 V supply and the measured dynamic range is 57 dB at IM3 of 0.5%, where the active area is 0.12 mm².     

Pass-transistor based implementations of threshold logic gates for WOS filtering

This paper presents a systematic procedure to implement threshold functions by using a pass-transistor network. A main feature of the threshold gates (TGs) produced by this technique is that they do not exhibit the fan-in limitations usual when other implementation techniques are used. Thus, they are especially useful for Weighted Order Statistical (WOS) filters because the binary filters required are threshold functions which usually present a high total sum of weights. A WOS filter with its binary filters implemented as pass-transistor TGs is demonstrated in an standard 0.35 μm CMOS technology at 3.3 V. The filter shows a sample frequency well over 100 MHz at the nominal process condition and it is cheaper, faster and consumes less power than a conventional approach.     

A CMOS Quadrature Baseband Frequency Synthesizer/Modulator

A quadrature baseband frequency synthesizer/modulator IC has been designed and fabricated in a 0.5 m CMOS. This quadrature baseband frequency synthesizer/modulator is intended for use in a wide variety of indoor/outdoor portable wireless applications in the 2.4–2.4835 GHz ISM frequency band. This frequency synthesizer/modulator is a capable of frequency and phase modulation. The major components are: a quadrature direct digital synthesizer, digital-to-analog converters and lowpass filters. By programming the quadrature direct digital synthesizer, adaptive channel bandwidths, modulation formats, frequency hopping and data rates are easily achieved. The quadrature baseband direct digital synthesizer produces an 80 MHz frequency band. The quadrature baseband spectrum could be upconverted with off-chip mixers into the 2.4 GHz ISM frequency band. The chip has a complexity of 17,803 transistors with a die area of 24 mm² and a core area of 9 mm². The power dissipation is 496 mW at 3.3 V.     

基于SET/MOS混合结构的译码器电路的设计

基于SET的I-V特性以及SET与MOS管互补的特性,以MOS管的逻辑电路为设计思想,首先提出了一个SET/MOS混合结构的反相器,进而推出或非门电路,并最终实现了一个唯一地址译码器.通过SET和MOS管两者的混合构建的电路与纯SET实现的电路相比,电路的带负载能力增强;与纯MOS晶体管实现的电路相比,电路同样仅需要单电源供电,且元器件数目得到了减少,电路的静态功耗大大降低.仿真结果验证了电路设计的正确性.     

New CMOS Fully‐Differential Transconductor and Application to a Fully‐Differential Gm‐C Filter

A new CMOS voltage‐controlled fully‐differential transconductor is presented. The basic structure of the proposed transconductor is based on a four‐MOS transistor cell operating in the triode or saturation region. It achieves a high linearity range of ± 1 V at a 1.5 V supply voltage. The proposed transconductor is used to realize a new fully‐differential Gm‐C low‐pass filter with a minimum number of transconductors and grounded capacitors. PSpice simulation results for the transconductor circuit and its filter application indicating the linearity range and verifying the analytical results using 0.35 μm technology are also given.     

一种基于标准CMOS工艺的新型单片集成紫外图像传感器

我们提出了一种基于标准CMOS工艺的浮栅紫外图像传感器。传感器单元是由一个非常紧凑的紫外线灵敏器件构成。整个紫外图像传感器有一CMOS像素单元阵列、高压开关、读出电路和数字控制等部分组成。在一0.18μm标准工艺上实现了1个1616的图像传感器芯片。我们对传感器单元和阵列进行了测试,测试结果表明传感器的灵敏度为0.072 V/(mJ/cm2),并且可以获得紫外图像。此紫外图像传感器适合于大规模集成的生物医药和太空探测等领域。     

CDBA‐Based Synthetic Floating Inductance Circuits with Electronic Tuning Properties

This paper introduces two different current differencing buffered amplifier (CDBA)‐based synthetic floating inductance circuits. Both configurations use a grounded capacitor. They are fully integrable and provide the advantages of electronic tuning.     

Design of Two‐Stage Class AB CMOS Buffers: A Systematic Approach

A systematic approach for the design of two‐stage class AB CMOS unity‐gain buffers is proposed. It is based on the inclusion of a class AB operation to class A Miller amplifier topologies in unity‐gain negative feedback by a simple technique that does not modify quiescent currents, supply requirements, noise performance, or static power. Three design examples are fabricated in a 0.5 µm CMOS process. Measurement results show slew rate improvement factors of approximately 100 for the class AB buffers versus their class A counterparts for the same quiescent power consumption (< 200 µW).     

一种跨导线性化低相噪压控振荡器

介绍了一种跨导线性化的宽带压控振荡器,由谐振腔电路、偏置电路、可编程电容阵列组成。提出一种通过电容隔直将有源器件进行交叉耦合的谐振腔结构,实现了有源器件的跨导线性化,大幅减小了有源器件自身的固有噪声,改善了压控振荡器的相位噪声特性。通过可编程电容阵列电路,可在压控振荡器内进行频率调节,扩展了振荡频率范围。测试结果表明,压控振荡器的振荡频率覆盖5 400~7 300 MHz,频率覆盖比达26%,在7 300 MHz时,相位噪声达到-128 dBc/Hz@1 MHz。该压控振荡器可作为高性能频率合成器的核心器件,构成本振信号源,可被广泛应用于无线基站、频谱监测等多种领域。     

一种1.5～2 μm双掺杂多晶硅栅CMOS工艺研究

采用常规Ｐ阱硅栅ＣＭＯＳ改进工艺,进行１．５￣２μｍＣＭＯＳ工艺研究。与常规工艺相比,做出的ＰＭＯＳ管漏源击穿电压可达１８￣２３Ｖ,５Ｖ工作电压下沟道调制效应较小,相应的欧拉电压可达２５￣３０Ｖ,工艺特点在于采用了硼掺杂多晶硅作ＰＭＯＳ管栅电极,磷掺杂多晶硅作ＮＭＯＳ管栅电极。     

一种自适应时间常数匹配Gm-C电感电流采样方法

提出了一种自适应时间常数匹配G_m-C电感电流采样方法。该方法通过比较Buck变换器SW点电压的过零时间与G_m-C滤波采样电压的过零时间,判断G_m-C时间常数是否与DCR时间常数匹配。使用鉴频鉴相器检测二者过零时间差,并控制双向计数器,实现对电容阵列等效容值的调制,最终实现自适应时间常数匹配G_m-C电感电流采样。与前序工作相比,该校准过程平滑,并且可以在DC-DC变换器正常工作情况下进行在线调制,能有效适应DC-DC变换器工作中温度、电压、电流等外部条件的变化。     

氨气敏Pd-Ir合金栅MOS晶体管

本文介绍一种新型氨气敏MOS场效应晶体管.采用Pd-Ir合金作为场效应晶体管的金属栅极.器件对氨气有足够的灵敏度和较好的选择性.文章分析了器件对氨气的敏感机理.