A novel current-feedback op-amp exploiting bootstrapping techniques

The operation of the conventional current feedback operational amplifier (CFOA) is reviewed and its performance parameters used as benchmarks in the development of a new input stage architecture that provides a common-mode rejection ratio (CMRR) improvement of some 45 dB and offset voltage less than 10 mV.     

Wide-bandwidth CFOA with high CMRR performance

In this paper the authors analyze the conventional current-feedback operational amplifier (CFOA) in terms of common-mode-rejection ratio (CMRR) performance, and having identified the mechanism primarily responsible for the CMRR, they propose two new architecture CFOAs. These new CFOAs are further developed, and modified to provide improved bandwidth, AC gain accuracy and high CMRR performance. The key features of the two proposed new CFOAs are the designs of the internal voltage followers which have two separate biasing currents with a similar dynamic architecture to that of the conventional CFOA. The magnitude of one bias current determines the value of the maximum CMRR, and the second can be used to maximize bandwidth.     

Continuous monitoring of electrode-skin impedance mismatch during bioelectric recordings

In bioelectric recordings, an electrode-skin impedance mismatch leads to a reduced common-mode rejection ratio (CMRR) of the amplifier. For this reason, the impedance of each individual electrode-skin contact is usually measured prior to a recording. The measurement circuit itself degrades the CMRR and is switched off during the bioelectric recording. In this paper, we present a new method that allows to monitor the electrode-skin impedance in a continuous way without reducing the CMRR of the amplifier. The new method is based on an additional common-mode signal that is superimposed on the bioelectric signal.     

Novel input stages for current feedback operational amplifiers

This paper considers the trade-offs involved in the design of six new input stages intended to improve the performance of a current feedback operational amplifier (CFOA), over that possible using an established input circuit configuration, with respect to three major characteristics, viz, common mode rejection ratio (CMRR), offset voltage and slew-rate.     

On the measurement of common-mode rejection ratio

In this brief, several commonly used measurement configurations for common-mode rejection ratio (CMRR) are analyzed and compared with the definition; their advantages and limitations are also discussed. Finally, an improved measurement setup is proposed to characterize CMRR more accurately according to its definition over wider frequency range.     

Combined differential and common-mode analysis of power splittersand combiners

Power splitter/combiner phase and magnitude imbalance is analyzed in terms of simultaneous orthogonal modes of propagation. These simultaneous modes are defined as differential and common-mode. A new measure of splitter imbalance is suggested in the common-mode rejection ratio (CMRR). Measured response of a 180° hybrid splitter is represented in terms of the differential and common-mode responses, and the CMRR is calculated. Combiner imbalance is also analyzed in terms of differential and common-mode responses, and response metrics are suggested. Analytical expressions for CMRR of several common splitters is given as functions of phase and magnitude imbalance     

A rail-to-rail input/output CMOS power amplifier

A rail-to-rail amplifier that maintains a high common-mode rejection ratio (CMRR) over the whole common-mode range and has a low harmonic distortion despite the use of relatively small output devices is discussed. The circuit, which measures only 0.3 mm² in a 3-μm technology, has a quiescent current consumption of 600 μA and a CMRR larger than 55 dB. It handles up to 4 nF, and can, with a 5-V supply, drive 3.8 V_pp into 100 Ω (0.1% total harmonic distortion at 10 kHz)     

Offset voltage, CMRR and PSRR of a long-tailed pair: an integrated approach

An integrated treatment of the input offset-voltage Vos, common-mode rejection ratio (CMRR) and power supply rejection ratio (PSRR) of a simple resistively loaded bipolar differential amplifier establishes the basic theoretical relationships between these parameters and indicates that `Early-voltage? mismatch of the constituent devices limits the attainable CMRR and PSRR.     

A 100-dB CMRR CMOS Operational Amplifier With Single-Supply Capability

A CMOS operational amplifier that has a common-mode rejection ratio (CMRR), a power-supply rejection ratio (PSRR), and gain above 100 dB for each of these parameters is described. This is achieved by combining a high output-impedance tail current source with a stable drain-source voltage of the input transistors. The common-mode input signal range includes the negative rail. This is obtained by controlling the bulk bias of the input and cascoding transistors. The amplifier consists of two gain stages connected via cascoded current mirrors. The gain is improved by using gain boost in the current mirrors, and by the suppression of impact ionization current in the output stage     

一种基于准浮栅技术的折叠差分结构及其应用

提出了一种基于准浮栅技术的新型折叠差分结构,其偏置电流源的电压降被折叠到输出电压摆幅中,且不受共模输入电压限制而达到较大范围,非常适于低压应用。基于此结构,实现了一种超低压运算放大器。仿真分析表明,该运算放大器能够实现轨到轨(rail-to-rail)的共模输入电压范围和输出电压摆幅,以及较高的共模抑制比。     

Common-mode rejection of monolithic operational amplifiers

A simple expression is derived for the common-mode rejection ratio (CMRR) of monolithic operational amplifiers in terms of transistor processing parameters. The tradeoffs between transistor current gain and CMRR are investigated. The feasibility of 120-dB CMRR is demonstrated with a common-emitter differential pair. The addition of eight active devices can further improve CMRR, although at the expense of other parameters.     

Current-feedback operational amplifier with high CMRR

A novel current-feedback operational amplifier, the input stage of which is based on the design and use in a repeated pattern of a current-transfer cell, exhibits performance characteristics superior to those obtained with an established input architecture: in particular, the common-mode rejection ratio (CMRR) is 105 dB, and the DC offset voltage less than 200 /spl mu/V.     

Low power DDA-based instrumentation amplifier for neural recording applications in 65 nm CMOS

The low power instrumentation amplifier (IA) presented in this paper has been designed to be the front-end of an integrated neural recording system, in which common-mode rejection ratio (CMRR), input referred noise and power consumption are critical requirements. The proposed IA topology exploits a differential-difference amplifier (DDA) whose differential output current drives a fully differential, high-resistance, transimpedance stage, with an embedded common-mode feedback loop to increase the CMRR. This stage is followed by a differential-to-single-ended output amplifier. Low-power operation has been achieved by exploiting sub-threshold operation of MOS transistors and adopting a supply voltage of 1 V. Simulation results in a commercial 65 nm CMOS technology show a 1 Hz to 5 kHz bandwidth, a CMRR higher than 120 dB, an input referred noise of 8.1 μVrms and a power consumption of 1.12 μW.     

Constant-gm rail-to-rail CMOS op-amp input stage withoverlapped transition regions

Conventional techniques to achieve a constant-g_m rail-to-rail complementary N-P differential input stage require complex additional circuitry. In addition, the frequency response and common-mode rejection ratio (CMRR) are degraded. An economical but efficient design technique to overcome these problems is proposed. The proposed technique strategically overlaps the transition regions of the tail currents for the n- and p-pairs to achieve constant overall transconductance. Experimental results demonstrate that g_m variation can be restricted to within ±4% with improved CMRR and frequency response     

Unifying the concepts of offset voltage and common-mode rejection ratio [bipolar differential amplifiers]

A unified treatment of offset voltage and common-mode rejection ratio (CMRR) of bipolar differential amplifiers using large signal models is presented. The offset voltage expressions for the differential pair and 741 stages are first calculated in terms of transport model parameters. CMRR may then be calculated from these expressions. Two distinct mechanisms contributing to CMRR are identified.     

A wide-band monolithic instrumentation amplifier [application of voltage-current convertor]

Describes a new voltage-to-current converter. This converter combines accuracy with differential signal handling and a high common-mode rejection ratio (CMRR). An application in an instrumentation amplifier consisting of two voltage-to-current converters in a balancing circuit shows the versatility of these units in analog circuit design. A remarkable point of the instrumentation amplifier is that the bandwidth (800 kHz) remains constant although the voltage gain varies from 1 to 10/SUP 4/.     

1-V operational amplifier with rail-to-rail input and output ranges

A bipolar operational amplifier (OA) with rail-to-rail input and output ranges which can operate at supply voltages down to 1 V is presented. At this supply voltage, the input offset voltage is typically 1.0 mV in an input common-mode voltage range that extends beyond both supply rails for about 300 mV, with a common-mode rejection ratio (CMRR) between 38 and 100 dB, depending on conditions. The output voltage can reach both supply rails within 100 mV, the output current is limited to ±10 mA, the voltage gain is 100 dB, and the bandwidth is 450 kHz. The die is 2.5×5.5 mm². Qualities such as offset, input-bias current, and CMRR are improved when the supply voltage is increased and the dynamic level shift is autonomically turned off. The OA has been protected against unintentional reversal of the output signal when the inputs are substantially overdriven. The output stage of the circuit consists of two full complementary composite transistors, whose HF characteristics have been improved by internal Miller compensation and linearization of the transconductance     

Common-mode rejection limitations of differential amplifiers

The common-mode rejection ratio (CMRR) equations of the differential pair and differential cascade amplifiers are reformulated in terms of imbalances in the saturation current. Early voltage, and current gain parameters of the transport model of the bipolar transistor. The effect of source resistance on CMRR is included in the formulation. The CMRR of this class of amplifier is shown to be limited by the magnitude and imbalance of the open-circuit voltage gain of the active devices. Also, a design characteristic, common to a wider class of differential amplifiers, is shown to produce a lower bound on the attainable CMRR.     

A DC offset and CMRR analysis in a CMOS 0.35 μm operational transconductance amplifier using Pelgrom's area/accuracy tradeoff

Nonideal factors which play a key role in performance and yield in high-precision operational amplifiers are rigorously investigated. Expressions for the offset voltage (V_os) and the common-mode rejection ratio (CMRR) are derived and correlated. The mismatch accuracy is analyzed for different transistor geometries in a CMOS OTA (operational transconductance amplifier) in 0.35 μm technology by using the Monte Carlo approach.     

Common-mode rejection ratio of differential amplifiers

The common-mode rejection ratio (CMRR) of differential amplifier stages is treated by means of the matrix analysis of networks with the amplifier gain elements represented as four-pole devices. Two generalized CMRR equations are obtained in terms of imbalances in the transconductance and open-circuit voltage gain parameters of the composiste devices for both the resistor-loaded stage and the current-mirror-loaded stage, respectively. The nonlinear characteristic of the current mirror load has also been derived, and it is demonstrated that the high load sensitivity of CMRR in stages loaded by current mirrors is due to the mirror's nonlinearity. The effects of the second stage of an operational amplifier on its CMRR are considered. The CMRR expressions for a number of typical stages incorporating source resistances are given, and the experimental results with these stages are discussed in detail.