基于滑模控制的DC-DC降压变换器实验平台

为了实现DC-DC降压变换器的高精度控制,设计了一种基于滑模控制的输出电压调节器。首先根据DC-DC降压变换器的工作原理建立了系统的动态模型;接着利用转换后的受扰动态模型设计了滑模控制器,同时基于李雅普诺夫函数证明了闭环系统的稳定性;最后使用Matlab/Simulink软件和DC-DC降压变换器硬件电路搭建了实验测试平台。测试结果表明与传统的PID控制方法相比,DC-DC降压变换器系统在所设计的滑模控制器的作用下可以获得更快的动态性能与更强的扰动抑制能力。该实验平台不仅有利于大学生理解和掌握滑模控制理论,还可以提高大学生的工程应用能力。     

用降压型单电感多输出DC-DC变换器输出高电压

本文发现并证明了降压型单电感多输出DC-DC变换器当电感工作于连续导通模式下能够产生高于电源电压的输出。这个发现将降低需要同时输出高压和低压的DC-DC变换器的结构复杂性。本文实现了一个降压型结构的单电感双输出的直流变换器,供电电压3.3V,输出为1V和4V。实验结果很好的证明了本文的结论。     

具有快速动态响应的高稳定性电流型降压DC-DC转换器

提出了一种高稳定性的电流型DC-DC转换器.首先应用一种新型的电流型转换器的模型推导了控制环路的增益表达式,在分析其环路增益的基础上,提出了一种新颖的控制环路频率补偿的方法,从而使转换器的稳定性不受负载电流和电源电压变化的影响.其次应用这种新的频率补偿方法,使用0.5μm-CMOS工艺设计了一种电流模式的降压型转换器.仿真结果表明,该稳压器具有高度的稳定特性,其稳定性与负载和电源电压无关.并且由于这种新的频率补偿为环路提供了极高的带宽,所以该转换器具有优异的动态响应.其提供的全负载瞬态响应的建立时间小于5μs,过冲电压小于30mV.     

Ultra Fast Fixed-Frequency Hysteretic Buck Converter With Maximum Charging Current Control and Adaptive Delay Compensation for DVS Applications

An integrated DC-DC hysteretic buck converter with ultrafast adaptive output transient response for reference tracking is presented. To achieve the fastest up-tracking speed, the maximum charging current control is introduced to charge up the output voltage with the maximum designed current. For down-tracking, the output is discharged by the load only to save energy. Although the converter works with hysteretic voltage mode control, an adaptive delay compensation scheme is employed to keep the switching frequency constant at 850 kHz to within plusmn2.5% across the whole operation range. The integrated buck converter was fabricated using a 0.35 mum CMOS process. With an input voltage of 3 V, the output voltage can be regulated between 0.5 and 2.5 V. With a load resistor of 10 Omega, the up-tracking speed of the maximum reference step (0.5 to 2.5 V) is 12.5 mus/V. All design features are verified by extensive measurements.     

DCM,FSM,dead time and width controllers for a high frequency high efficiency buck DC-DC converter over a wide load range

This paper presents a width controller,a dead time controller,a discontinuous current mode(DCM) controller and a frequency skipping modulation(FSM) controller for a high frequency high efficiency buck DC-DC converter. To improve the efficiency over a wide load range,especially at high switching frequency,the dead time controller and width controller are applied to enhance the high load efficiency,while the DCM controller and FSM controller are proposed to increase the light load efficiency.The proposed D...     

同步降压式DC-DC转换器的稳定性设计

DC-DC转换器因其相比于传统的线性稳压器具有较高的电源转换效率,而被广泛地应用到各种现代电子设备中。同时随着电源整流技术的不断进步,DC-DC转换器也正在从以肖特基二极管作为续流二极管的异步整流模式向同步整流模式转变。同步整流式DC-DC转换器具有极高的电源转换效率(可超过95%),是各种手持设备电源设计的首选。本文从分析同步降压式DC-DC转换器的闭环增益和相位曲线入手,研究了多种条件下如何实现同步降压式DC-DC转换器的稳定性设计。     

Design of high efficiency dual-mode buck DC-DC converter

A buck DC-DC switching regulator with high efficiency is implemented by automatically altering the modulation mode according to load current,and it can operate with an input range of 4.5 to 30 V.At light load current,the converter operates in skip mode.The converter enters PWM mode operation with increasing load current.It reduces the switching loss at light load and standby state,which results in prolonging battery lifetime and stand-by time.Meanwhile, externally adjustable soft-start minimizes the inru...     

A high-efficiency,low-noise power solution for a dual-channel GNSS RF receiver

A high-efficiency low-noise power solution for a dual-channel GNSS RF receiver is presented.The power solution involves a DC-DC buck converter and a followed low-dropout regulator(LDO).The pulsewidth -modulation(PWM) control method is adopted for better noise performance.An improved low-power highfrequency PWM control circuit is proposed,which halves the average quiescent current of the buck converter to 80μA by periodically shutting down the OTA.The size of the output stage has also been optimized to achieve high efficiency under a light load condition.In addition,a novel soft-start circuit based on a current limiter has been implemented to avoid inrush current.Fabricated with commercial 180-nm CMOS technology,the DC-DC converter achieves a peak efficiency of 93.1%under a 2 MHz working frequency.The whole receiver consumes only 20.2 mA from a 3.3 V power supply and has a noise figure of 2.5 dB.     

Boolean-based fractional order SMC for switching systems: application to a DC-DC buck converter

The combination of sliding mode control and fractional order control (FOC) has received a considerable attention in the last years due to the advances and effectiveness of FOC solving robust control problems. This paper collects different methods to apply FOC in sliding mode problems through the use of fractional order surfaces and proposes a direct boolean control (BC) strategy based on this kind of surfaces. The application of BC is novel and takes advantage of avoiding the use of PWM. Simulation results for a DC-DC buck converter application are given to show the goodness of the proposed approach.     

Implementation of zero current switch turn-ON based buck-boost-buck type rectifier for low power applications

A single-stage single-switch AC–DC integrated converter is proposed in this paper, as a tight DC voltage regulator with unity input power factor for the fundamental component of the input current. Proposed converter is formed by the integration of buck-boost configuration with a buck converter operated by a single switch. The buck-boost section of the proposed configuration is operated in current discontinuous conduction mode (DCM) to get unity input power factor at the supply terminals and the buck section is operated up to boundary current conduction mode (BCM). The features acquired by the converter operating in complete discontinuous conduction mode (DCM) are unity input power factor, zero-current turn-ON for the Switch, fast and good DC output voltage regulation with extensive conversion range and low voltage stress on the switch. Additionally, the intermediate capacitor voltage stress is independent of converter load variations and so the switch also is subjected to constant peak voltage stress. A comprehensive study is carried out to obtain the necessary design equations. A design model is implemented using simulation and hardware. The results confirm the performance of the proposed configuration.     

Single-Inductor Multi-Output (SIMO) DC-DC Converters With High Light-Load Efficiency and Minimized Cross-Regulation for Portable Devices

A load-dependant peak-current control single-inductor multiple-output (SIMO) DC-DC converter with hysteresis mode is proposed. It includes multiple buck and boost output voltages. Owing to the adaptive adjustment of the load-dependant peak-current control technique and the hysteresis mode, the cross-regulation can be minimized. Furthermore, a new delta-voltage generator can automatically switch the operating mode from pulse width modulation (PWM) mode to hysteresis mode, thereby avoiding inductor current accumulation when the total power of the buck output terminals is larger than that of the boost output terminals. The proposed SIMO DC-DC converter was fabricated in TSMC 0.25 $muhbox{m}$ 2P5M technology. The experimental results show high conversion efficiency at light loads and small cross-regulation within 0.35%. The power conversion efficiency varies from 80% at light loads to 93% at heavy loads.      

Buck型变换器的线性化小信号补偿前馈控制

为减小由输入电源扰动引起的输出电压工频纹波,改善DC/DC变换器动态性能,根据平均变量建模思想,为电压型PWM控制的Buck型变换器建立连续导电工作模式（CCM）下统一的平均变量等效电路。分析等效电路并根据前馈控制的不变性原理提出Buck型变换器针对输入电压扰动的线性化小信号补偿前馈控制原理及实现方法,采用该方法的Buck型变换器可快速补偿输入电压扰动,加快变换器在输入电压扰动时的动态调节过程,显著减小输出电压中包括工频在内的低频纹波,改善变换器的动态性能。仿真研究结果验证了文中线性化小信号补偿前馈控制原理、方法及其分析的正确性。     

一种提高单电感双输出升/降压型转换器轻载效率的设计策略

为了提高单电感双输出升/降压型直流-直流转换器在轻载下的效率,设计实现了适用于不同转换条件的非连续导通模式(DCM)功能和脉冲频率调制(PFM)控制。前者降低了电感电流的均方根值,减少了导通损耗;后者降低了开关频率,减少了开关损耗。详细分析了在PFM控制下转换器的驱动能力、电感电流纹波和输出电压纹波之间相互制约的关系,并采取了一种可以由两路任意升/降压输出灵活复用的自适应导通时间控制方法。经0.25μm 2P4M CMOS混合信号工艺流片验证,测试结果显示DCM和PFM时序与设计方案吻合,各种转换条件下输出电压纹波在40~70 mV。通过比较发现,对轻载效率的提升可以达到30%以上。     

采用分段式自适应PWM/PFM调制的Buck型DC-DC转换器设计北大核心

为了在轻重负载条件下获得更高的转换效率，采用分段式结构和导通电阻更小的NMOS作为输入级，并采用PWM/PFM双调制方式，设计了一种Buck型DC-DC转换器。为解决PWM/PFM调制信号切换问题，采用零电流检测方式进行切换。利用断续导通模式(DCM)和连续导通模式(CCM)下端NMOS管导通时电感电压的不同，检测下端NMOS在导通时电感电压大于零的周期。当电感电压大于零的周期大于2时，则处于DCM模式并自动采用PFM调制模式，关闭一部分功率管以减小开关频率和功率管寄生电容，优化轻载效率；反之则处于CCM模式并采用PWM调制。仿真结果表明，在负载电流10～1 000 mA范围内，该电路可以在两种调制模式平稳切换，在800 mA时峰值效率可提升到96%以上。     

A 0.5-V power-supply scheme for low-power system LSIs using multi-V/sub th/ SOI CMOS technology

This paper proposes a novel power-supply scheme suitable for 0.5-V operating silicon-on-insulator (SOI) CMOS circuits. The system contains an on-chip buck DC-DC converter with over 90% efficiency, 0.5-V operating logic circuits, 100-MHz operating flip-flops at 0.5-V power supply, and level converters for the interface between the 0.5-V operating circuit and on-chip digital-to-analog (D/A) converters or external equipment. Based on the theory, the values of on-resistance and threshold voltage of SOI transistors are clarified for the 0.5-V/10-mW output DC-DC converter, which satisfies both high efficiency and low standby power. The proposed flip-flop can hold the data during the sleep with the use of the external power supply, while maintaining high performance during the active. The level converter comprises dual-rail charge transfer gates and a CMOS buffer with a cross-coupled nMOS amplifier to operate with high speed even in a conversion gain of higher than 6, where the conversion gain is defined as the ratio of the output and input signal swings. The test chip was fabricated for the 0.5-V power supply scheme by using multi-V/sub th/ SOI CMOS technology. The experimental results showed that the buck DC-DC converter achieved a conversion efficiency of 91% at 0.5-V/10-mW output with stable recovery characteristics from the sleep, and that the dual-rail level converter operated with a maximum data rate of 300 Mb/s with the input signal swing of 0.5 V.     

Emulating DC constant power load: a robust sliding mode control approach

This article presents emulation of a programmable power electronic, constant power load (CPL) using a dc/dc step-up (boost) converter. The converter is controlled by a robust sliding mode controller (SMC). A novel switching surface is proposed to ensure a required power sunk by the converter. The proposed dc CPL is simple in design, has fast dynamic response and high accuracy, and offers an inexpensive alternative to study converters for cascaded dc distribution power system applications. Furthermore, the proposed CPL is sufficiently robust against the input voltage variations. A laboratory prototype of the proposed dc CPL has been developed and validated with SMC realised through OPAL-RT platform. The capability of the proposed dc CPL is confirmed via experimentations in varied scenarios.     

A PWM DC-DC converter with optimum segmented output stage and current detector

High efficiency is very important for DC-DC power supplies in portable applications. A PWM DC-DC converter with optimum segmented output stage is proposed in this paper whose efficiency at light load is improved. The segmented output stage is optimally divided into 5 small segments plus 4 big segments. The segmented number of the output stage can be adaptively regulated according to the load current. Moreover, two current detector circuits are simultaneously adopted to form a mixed load current sensor in the converter to improve the detecting accuracy. A segmented current SenseFET (SCS) is used to sense the load current in continuous current mode, and a time digital converter with digital judgement (TDC-D) is designed to detect the load current in discontinuous current mode. The structure of the proposed PWM converter with optimum segmented output stage and mixed load current detector circuits is described in this paper, which has been implemented in a 0.13 μm CMOS process. Simulation and testing results show that the output stages of the PWM converter can self transit from one segment stage to another segment stage according to the load condition. And the maximum efficiency improvement of the proposed converter can reach 15%.     

Finite-time control of DC–DC buck converters via integral terminal sliding modes

This article presents novel terminal sliding modes for finite-time output tracking control of DC–DC buck converters. Instead of using traditional singular terminal sliding mode, two integral terminal sliding modes are introduced for robust output voltage tracking of uncertain buck converters. Different from traditional sliding mode control (SMC), the proposed controller assures finite convergence time for the tracking error and integral tracking error. Furthermore, the singular problem in traditional terminal SMC is removed from this article. When considering worse modelling, adaptive integral terminal SMC is derived to guarantee finite-time convergence under more relaxed stability conditions. In addition, several experiments show better start-up performance and robustness.     

Dynamics analysis and controller synthesis forzero-voltage-transition PWM power converters

A small signal model for zero-voltage-transition pulse width modulation (ZVT-PWM) buck converters is proposed in this paper. It shows that the ZVT-PWM buck converter exhibits better dynamical behavior than the conventional PWM buck converter. Based on the derived model consisting of line voltage disturbances and load variations, μ-synthesis is applied for a robust controller design to achieve performance requirement. In addition, a classical controller and a sliding mode controller with modified integral variable structure are also designed for performance comparisons. Finally, simulation and experimental results are presented to verify the requirement for robust performance of ZVT-PWM converters     

On-chip CMOS current-sensing circuit for DC-DC buck converter

An on-chip CMOS current-sensing circuit for a DC-DC buck converter is presented. The circuit can measure the inductor current through sensing the voltage of the switch node during the converter on-state. By matching the MOSFETs, the achieved sense ratio is almost independent of temperature, model and supply voltage. The proposed circuit is suitable for low power DC-DC applications with high load current.