Harmonic Minimization in Multilevel Inverters Using Modified Species-Based Particle Swarm Optimization

Harmonic minimization in multilevel inverters is a complex optimization problem that involves nonlinear transcendental equations having multiple local minima. In this paper, a solution to the harmonic minimization problem using a novel particle swarm optimization (PSO) approach based on species-based PSO (SPSO) is presented. The original SPSO is modified, which increased the robustness of algorithm to find global optimum of the search space. The proposed method is able to find the optimum switching angles when their number is increased, while it is not possible to determine them using either conventional iterative techniques or resultant theory method. Theoretical results are verified by experiments and simulations for an 11-level H-bridge inverter. Results show that the proposed method effectively minimizes a large number of specific harmonics, and the output voltage results in very low total harmonic distortion and switching frequency.      

H桥级联型多电平逆变器调制策略对比分析

针对H桥级联型多电平逆变器,对比分析了传统的多电平PWM调制策略,指出其存在的输出电压谐波性能问题。提出一种改进的调制策略,不仅抑制了直流母线电压波动引起的低次谐波含量,而且有效地降低了高、次谐波含量。最后通过对比实验,验证了所提出方法的正确性与有效性。     

Economical design of H-bridge multilevel inverter drive controlled by modified fast algorithm

Traditional cascaded multilevel inverter needs n DC voltage sources to give 2n + 1 levels. As number of levels increased, the amount of switching devices, their proper related drive circuits and their controllers and other components are also increased excessively, making the inverter more complex and costly. A simple and low cost single-phase cascade multilevel inverter with no transformers can be implemented using only single-DC source with n-1 DC sources represented by capacitors and with reduced switches. So, current inverter hardware cost can be reduced abruptly as compared with conventional one.When the number of DC sources is increased, inverter output has higher harmonic content characterized by their transcendental equations that become more complicated and required more time to be solved. New technique is exhibited to find the inverter switching angles by executing modified fast recursive algorithm providing an on-line precise solution for the Harmonic Elimination (HE) problem. The suggested optimized algorithm technique have been used to find optimum switching angles necessary to eliminate any number of lowest order harmonics and maintain the desired fundamental voltage for driving an AC motor. Simulation results of cascade 7-level inverter with single-DC source under the optimized HE stepped waveform technique is used to eliminate the 3rd and 5th harmonics. Prototype design for the proposed inverter loaded by single-phase fan motor is built.     

A cascade boost-switched-capacitor-converter - two level inverter with an optimized multilevel output waveform

Two structures, a switched-capacitor (SC)-based boost converter and a two-level inverter, are connected in cascade. The dc multilevel voltage of the first stage becomes the input voltage of the classical inverter, resulting in a staircase waveform for the inverter output voltage. Such a multilevel waveform is close to a sinusoid; its harmonics content can be reduced by multiplying the stage number of the SC converter. The output low-pass filter, customary after a two-level inverter, becomes obsolete, resulting in a small size of the system, as the SC circuit can be miniaturized. Both stages are operated at a high switching frequency, resulting in a high-frequency inverter output, as required by some industrial applications. A Fourier analysis of the output waveform is performed. The design is optimized with reference to the nominal duty-cycle for obtaining the minimum total harmonic distortion. Simulations and experiments on two prototypes, one with a five-level output and one with a seven-level output, confirm the theoretical analysis.     

Active harmonic elimination for multilevel converters

This paper presents an active harmonic elimination method to eliminate any number of specific higher order harmonics of multilevel converters with equal or unequal dc voltages. First, resultant theory is applied to transcendental equations characterizing the harmonic content to eliminate low order harmonics and to determine switching angles for the fundamental frequency switching scheme and a unipolar switching scheme. Next, the residual higher order harmonics are computed and subtracted from the original voltage waveform to eliminate them. The simulation results show that the method can effectively eliminate the specific harmonics, and a low total harmonic distortion (THD) near sine wave is produced. An experimental 11-level H-bridge multilevel converter with a field programmable gate array controller is employed to implement the method. The experimental results show that the method does effectively eliminate any number of specific harmonics, and the output voltage waveform has low THD.     

Harmonic optimization of multilevel converters using genetic algorithms

In this letter, a genetic algorithm (GA) optimization technique is applied to determine the switching angles for a cascaded multilevel inverter which eliminates specified higher order harmonics while maintaining the required fundamental voltage. This technique can be applied to multilevel inverters with any number of levels. As an example, in this paper a seven-level inverter is considered, and the optimum switching angles are calculated offline to eliminate the fifth and seventh harmonics. These angles are then used in an experimental setup to validate the results.     

A new n-level high voltage inversion system

This paper deals with a new multilevel high-voltage source inverter with gate-turn-off (GTO) thyristors. Recently, a multilevel approach seemed to be the best suited for implementing high-voltage power conversion systems because it leads to a harmonic reduction and deals with safe high-power conversion systems independent of the dynamic switching characteristics of each power semiconductor device. A conventional multilevel inverter has some problems; voltage unbalance between DC-link capacitors and larger blocking voltage across the inner switching devices. To solve these problems, the novel multilevel inverter structure is proposed     

Modelling and analysis of a multilevel voltage source inverter applied as a static var compensator

A multilevel PWM voltage source inverter, especially a five-level one, is introduced to obtain a static var compensator (SVC) as a large scale power source. The multilevel inverter has many advantages, such as better utilization of the switching devices, lower switching frequency at each semiconductor switch and reduced harmonics. In this paper, the SVC with five-level inverter is modelled using circuit DQ transformation and completely analysed including DC and AC characteristics. It is also pointed out that the modulation indexes depend on the values of the DC side capacitors to meet the DC side voltage balancing, Finally, through the experimental results from a 5kVA SVC, the validity of the analyses and the feasibility of the var compensation system are shown for high power applications.     

Multiple sets of solutions for harmonic elimination PWM bipolar waveforms: analysis and experimental verification

Multiple sets of solutions for the selective harmonic elimination pulse-width modulation method for inverter control exist. These sets present an independent solution to the same problem but further investigation reveals that certain sets may offer an improved overall harmonic performance. In this paper, a minimization method is discussed as a way to obtain these multiple sets of switching angles. A simple distortion harmonic factor that takes into account the first two most significant harmonics present in the generated waveform is considered in order to evaluate the performance of each set. The bipolar waveform is thoroughly analyzed and two cases are considered; single-phase patterns which eliminate all odd harmonics and three-phase counterparts which eliminate only the nontriplen odd harmonics from the line-to-neutral pattern but such harmonics are naturally eliminated from the line-to-line waveform. Experimental results support the theoretical considerations reported in the paper.     

Cascaded Multilevel Inverter Employing Three-Phase Transformers and Single DC Input

This paper proposes an isolated cascaded multilevel inverter employing low-frequency three-phase transformers and a single dc input power source. The proposed circuit configuration can reduce a number of transformers compared with traditional three-phase multilevel inverters using single-phase transformers. It controls switching phase angles to obtain an optimal switching pattern identified with the fundamental frequency of the output voltage. Owing to this control strategy, harmonic components of the output voltage and switching losses can be diminished considerably. To verify the performance of the proposed approach, we implemented computer-aided simulations and experiments using a prototype.      

A Space Vector Modulation Scheme to Reduce Common Mode Voltage for Cascaded Multilevel Inverters

Multilevel inverters can reduce the common mode voltage generated. Schemes have been reported for multilevel inverters that reduce the common mode voltage. However, most of the schemes result in reduced modulation depth, high switching losses, and high harmonic distortion. This paper proposes a space-vector modulation scheme to reduce common mode voltage for cascaded multilevel inverters. The proposed scheme can increase the voltage range of operation by about 17% and can produce lower total harmonic distortion than the previously proposed schemes. The scheme is explained for five-level inverter. The scheme can be easily extended to a n-level inverter. Both experimental and simulation results are provided.     

不平衡电网电压下三相PWM整流器控制策略的研究

在不平衡电网电压下三相电压型PWM整流器的优越性能受到了很大的影响,其原因是由于直流电压产生了奇次谐波以及交流的电流产生了偶次谐波。三相PWM整流器直流侧电压的二次谐波以及在交流侧电流所产生的负序分量都将对整流器负载性能产生影响,同时还将影响直流侧电容寿命。文章提出一种新型不平衡观测器及其控制策略可有效地对不平衡电压进行补偿。通过此控制策略可同时抑制直流侧电压的2次谐波以及减小网侧电流的不平衡度。分析及仿真结果证明了此控制策略的有效性。     

连铸坯视觉定重线结构光平面调整方法研究

鉴于传统三电平逆变电路存在谐波含量高的缺点, 在分析模块化多电平换流器(MMC)工作原理的基础上, 提出使用模块化多电平电路实现光伏并网逆变功能, 采用微分-跟踪器法实现光伏阵列最大功率点跟踪(MPPT)及逆变器PQ解耦控制, 实现了光伏系统以单位功率因数并网。在PSCAD中建立光伏并网系统动态仿真模型, 仿真结果表明, 所建模型具有开关损耗低、谐波量小的优点, 验证了所提方法的正确性和可行性。     

Fast Dynamic Control of Medium Voltage Drives Operating at Very Low Switching Frequency—An Overview

Medium voltage AC machines fed by high-power inverters operate at a low switching frequency to restrain the switching losses of power semiconductor devices. Particular care is thus required in the design of the drive control system. The signal delay caused by low switching frequency operation increases undesired cross-coupling effects in vector-controlled schemes. These are not sufficiently compensated by established methods like feedforward control. Improvements are achieved by a more accurate modeling of the machine and the inverter. An adequate controller is introduced, having a transfer function with complex coefficients. The high harmonic distortion due to the low switching frequency is a tradeoff. Using synchronous optimal pulsewidth as an alternative permits reducing the switching frequency without increasing the harmonics. The detrimental effects of conventional control methods are eliminated by forcing the harmonic components on an optimal spatial trajectory. Deadbeat behavior and complete decoupling are thus achieved. The performance of the aforementioned schemes is compared based on mathematical analyses and experimental results.     

Output voltage distortion characterization in multilevel PWM converters

One of the main features to consider in the development of new pulsewidth modulations (PWM) for multilevel converters is the high-frequency output-voltage distortion. In this letter, a novel per-switching-cycle figure, the harmonic distortion of order n for switching cycle k(HD/sub n,k/), is introduced to quantitatively characterize the output three-phase voltage harmonic distortion of multilevel converters around all the integer multiples of the switching frequency. This figure allows for the decomposing of the modulation design problem within an output voltage fundamental cycle into an independent set of smaller problems for every switching cycle. The expression of HD/sub n,k/ as a function of the switching states' duty-ratio is presented for the three-level three-phase neutral-point-clamped voltage source inverter and it can be easily obtained for any other multilevel converter. From the evaluation of HD/sub n,k/ over 1/6th of the output-voltage fundamental-period the value of HD/sub n/ is obtained, providing a measure of the output voltage distortion in a fundamental period. This information is obtained at a lower computational cost than conventional fast Fourier transform (FFT) analysis. The accuracy of the HD/sub n/ distortion predictions is verified by comparing it to FFT-based results obtained from simulation and experiments. The expression to compute the total harmonic distortion (THD) as a function of HD/sub n/ is also derived.     

Hybrid Cascaded H-Bridge Multilevel-Inverter Induction-Motor-Drive Direct Torque Control for Automotive Applications

This paper presents a hybrid cascaded H-bridge multilevel motor drive direct torque control (DTC) scheme for electric vehicles (EVs) or hybrid EVs. The control method is based on DTC operating principles. The stator voltage vector reference is computed from the stator flux and torque errors imposed by the flux and torque controllers. This voltage reference is then generated using a hybrid cascaded H-bridge multilevel inverter, where each phase of the inverter can be implemented using a dc source, which would be available from fuel cells, batteries, or ultracapacitors. This inverter provides nearly sinusoidal voltages with very low distortion, even without filtering, using fewer switching devices. In addition, the multilevel inverter can generate a high and fixed switching frequency output voltage with fewer switching losses, since only the small power cells of the inverter operate at a high switching rate. Therefore, a high performance and also efficient torque and flux controllers are obtained, enabling a DTC solution for multilevel-inverter-powered motor drives.      

A novel control scheme for the multilevel rectifier/inverter

A novel three-level pulsewidth modulation (PWM) rectifier/inverter is proposed: this single-phase three-level rectifier with power factor correction and current harmonic reduction is proposed to improve power quality. A three-phase three-level neutral point clamped (NPC) inverter is adopted to reduce the harmonic content of the inverter output voltages and currents. In the adopted rectifier, a switching mode rectifier with two AC power switches is adopted to draw a sinusoidal line current in phase with mains voltage. The switching functions of the power switches are based on a look-up table. To achieve a balanced DC-link capacitor voltage, a capacitor voltage compensator is employed. In the NPC inverter, the three-level PWM techniques based on the sine-triangle PWM and space vector modulation are used to reduce the voltage harmonics and to drive an induction motor. The advantages of the adopted th-ree-level rectifier/inverter are (1) the blocking voltage of power devices (T1, T2, S_a1-S_c4) is clamped to half of the DC-link voltage, (2) low conduction loss with low conduction resistance due to low voltage stress, (3) low electromagnetic interference, and (4) low voltage harmonics in the inverter output. Based on the proposed control strategy, the rectifier can draw a high power factor line current and achieve two balance capacitor voltages. The current harmonics generated from the adopted rectifier can meet the international requirements. Finally, the proposed control algorithm is illustrated through experimental results based on the laboratory prototype.     

A centroid-based PWM switching technique for full-bridge inverterapplications

A novel centroid-based pulse-width-modulation (PWM) switching strategy is proposed which is suitable for full-bridge inverter applications. This method is evaluated, and its performance is compared with existing PWM switching strategies. The performance evaluation and comparison are based on the total harmonic distortion (THD) and number of pulses per cycle of the inverter output waveform. The objective of the new switching strategy is to minimize both the THD and low-order harmonics. Simulation results show that this technique yields a significant improvement in performance. In addition, a hybrid switching sequence is developed for the proposed scheme, which can lead to further reduction in switching losses     

Four-wire dynamic voltage restorer based on a three-dimensional voltage space vector PWM algorithm

A modified voltage space vector pulse-width modulated (PWM) algorithm for a four-wire dynamic voltage restorer (DVR) is described. The switching strategy based on a three-dimensional (3-D) /spl alpha//spl beta/O voltage space is applicable to the control of three-phase four-wire inverter systems such as the split-capacitor PWM inverter and the four-leg PWM inverter. In contrast to the conventional voltage space vector PWM method, it controls positive, negative and zero sequence components of the terminal voltages instantaneously. Three 3-D modulation schemes are analyzed with respect to total harmonic distortion (THD), weighted total harmonic distortion (WTHD), neutral line ripple and switching loss over the whole range of the modulation index when the DVR experiences both balanced and unbalanced sags with phase angle jumps. Experimental results from a 9 kW DVR system using a split-capacitor PWM inverter are presented to validate the simulation results.     

Novel Direct Current-Space-Vector Controlfor Shunt Active Power Filters Basedon the Three-Level Inverter

The growing number of electric drives with non-sinusoidal line currents has given increased interest in active power filters (APF), to avoid grid problems caused by harmonic distortions. In this paper, a novel direct current-space-vector control scheme (DCSVC) is presented for a three-level, neutral-point-clamped voltage source inverter, which is employed as an active power filter. The proposed method generates the compensation current reference indirectly generating an equivalent ohmic conductance for the fundamental component by means of the APF's dc-link voltage control. Based on the fast Fourier transform the compensation of the reactive fundamental current and selectable harmonics can be cancelled, confining the operation to only harmonic compensation and thus saving the APF's apparent power. The novel DCSVC, operating in synchronously rotating coordinates is implemented in a field programmable gate array, realizing the switching states from switching tables. The proposed control reduces the average switching frequency and thus, the switching power loss significantly, compared with a previous DCSVC, operating in stationary coordinates. Simulation and experimental results validate the feasibility and highly dynamic performance of the proposed control, both for harmonic and total non-active current compensation.