Implementation of a three-level rectifier for power factorcorrection

In this paper, a new single-phase switching mode rectifier (SMR) for three-level pulse width modulation (PWM) is proposed to achieve high input power factor, low current harmonics, low total harmonic distortion (THD) and simple control scheme. The mains circuit of the proposed SMR consists of six power switches, one boost inductor, and two DC capacitors. The control algorithm is based on a look-up table. There are five control signals in the input of the look-up table. These control signals are used to control the power flow of the adopted rectifier, compensate the capacitor voltages for the balance problem, draw a sinusoidal line current with nearly unity power factor, and generate a three-level PWM pattern on the AC side of adopted rectifier. The advantages of using three-level PWM scheme compared with two-level PWM scheme are using low voltage stress of power switches, decreasing input current harmonics, and reducing the conduction losses. The performances of the proposed multilevel SMR are measured and shown in this paper. The high power factor and low harmonic currents at the input of the rectifier are verified by software simulations and experimental results from a laboratory prototype     

A new control scheme for single-phase PWM multilevel rectifier withpower-factor correction

A new control scheme for a single-phase bridge rectifier with three-level pulsewidth modulation is proposed to achieve high power factor and low current distortion. The main circuit consists of a diode-bridge rectifier, a boost inductor, two AC power switches, and two capacitors. According to the proposed control scheme based on a voltage comparator and hysteresis current control technique, the output capacitor voltages are balanced and the line current will follow the supply current command. The supply current command is derived from a DC-link voltage regulator and an output power estimator. The major advantage of using a three-level rectifier is that the blocking voltage of each AC power device is clamping to half of the DC-link voltage and the generated harmonics of the three-level rectifier are less than those of the conventional two-level rectifier. There are five voltage levels (0, ±V_DC/2, ±V_DC) on the AC side of the diode rectifier. The high power factor and low harmonic currents at the input of the rectifier are verified by software simulations and experimental tests     

Single-phase high power factor pre-regulator with three-level modulation scheme

A control scheme for the single-phase three-level pulse-width modulation active rectifier is proposed. A hysteresis current control scheme is used to draw the sinusoidal line current in phase with the mains voltage. The line current command is derived from a voltage controller and a phase-locked loop circuit. The blocking voltage of each power device is clamped to half of the DC-link voltage in the proposed active rectifier. In order to generate the three-level voltage pattern on the DC side of the active rectifier, the region detector of the line voltage, capacitor voltage compensator and hysteresis current comparator are employed in the adopted control algorithm to achieve high input power factor and low current distortion. To investigate the proposed control algorithm, the adopted rectifier is simulated and experimental tests from a laboratory prototype undertaken.     

A single-phase capacitor clamped converter operated simultaneously as a PWM rectifier and an active power filter

A control scheme is proposed that employs an active rectifier to work simultaneously as an active power filter to decrease current harmonics. The adopted capacitor clamped rectifier is controlled to draw a sine wave line current with low current harmonics. A voltage controller, three capacitor voltage compensators and one current controller are used in the proposed control algorithm to achieve a constant DC bus voltage, balanced capacitor voltages and line current tracking. The validity of the proposed system is proved by the results of computer simulations and experimental tests.     

A novel PWM scheme for single-phase three-levelpower-factor-correction circuit

This paper presents a control scheme for a single-phase AC-to-DC power converter with three-level pulsewidth modulation. A single-phase power-factor-correction circuit is proposed to improve the power quality. The hysteresis current control technique for a diode bridge, with two power switches is adopted to achieve a high power factor and low harmonic distortion. A control scheme is presented where the line current is driven to follow the reference sinusoidal current which is derived from the DC-link voltage regulator, the capacitor voltage balance compensator and the output power estimator. The blocking voltage of each power device is clamped to half of the DC-link voltage. The high power factor and low current total harmonic distortion are verified by computer simulations and hardware tests     

Implementation of a Three-Phase Capacitor-Clamped Active Power Filter Under Unbalanced Condition

A capacitor-clamped voltage-source inverter for active power filter operation under balanced and unbalanced conditions is proposed to suppress current harmonics and compensate the reactive power generated from the nonlinear loads. The adopted voltage-source inverter is based on a three-level capacitor-clamped topology to reduce the voltage stress of power semiconductors. Two control loops are used in the control scheme to achieve harmonic and reactive currents compensation and to regulate the inverter dc side voltage. In the adopted inverter, the neutral point voltage is compensated by a voltage compensator to obtain the balanced capacitor voltages on the dc side. In order to control the flying capacitor voltages, two redundant states in each inverter leg can be selected to compensate the flying capacitor to obtain a better voltage waveform with low harmonic contents on the ac terminals. The balanced and sinusoidal line currents are drawn from the ac source under the balanced and unbalanced conditions. The feasibility of the proposed scheme is confirmed through experimental results     

A Novel Four-Level Voltage Source Inverter—Influence of Switching Strategies on the Distribution of Power Losses

In this paper, a novel four-level inverter will be presented and analyzed. The proposed inverter topology, which is composed of a conventional two-level and a three-level neutral-point clamped (NPC) inverter, is suitable for high-voltage and high-power applications. The proposed inverter, when it is compared with the conventional four-level NPC pulsewidth modulation inverter, exhibits the following advantages: a) ability of changing the power losses distribution profile among the devices by selecting a suitable switching strategy; b) reduction of total inverter power semiconductor device losses; c) ability of bidirectional operation for all power semiconductor switches; and d) easy implementation using existing power semiconductor modules. The effect of conduction and switching losses profiles of the proposed inverter for different switching strategies is examined under different loads, power factors, and modulation indices. The dc-link capacitors voltages are effectively balanced via a proposed self-voltage balancing topology, without the need of isolated dc voltage sources or additional voltage stabilizing circuits. Finally, the theoretical results are confirmed by simulation and experimental results     

单相三电平PWM实验系统中数字滤波器设计

为了实现网侧电流正弦化及输入端高功率因数,针对单相三电平PWM整流器,本文首先分析了单相三电平PWM整流器的工作原理,给出了控制系统的总体控制思想,为了减少直流侧电压、网侧电压、网侧电流因传感器采样误差和电磁干扰等因素产生的高次谐波,探讨了一种适用于单相PWM整流器谐波抑制的数字滤波器设计方法,实验验证了该算法的有效性。     

Power factor correction based on diode clamped rectifier

Multilevel converters are recent alternative ways of implementing high power medium voltage applications compared with two-level converters. This paper presents a three-level pulse-width modulation scheme based on the diode clamped rectifier for power factor correction. Eight power switches are employed in the adopted switching mode rectifier. The voltage stress of each power switch is only half of the dc-link voltage. This advantage allows the low voltage stress semiconductor to be used in the high voltage applications. The control scheme is based on a look-up table to achieve high power factor and low current harmonics to meet the harmonic limits of International Electrotechnical Commission standard 1000-3-2. The neutral point voltage balance problem is overcome by using a voltage compensator to reduce the voltage variation under the unbalanced load condition. The proposed control technique illustrates its validity and effectiveness through simulations and experiments.     

Zero-voltage switching for three-level capacitor clamping inverter

A zero-voltage switching (ZVS) scheme for a three-level capacitor clamping inverter based on the true pulsewidth modulation (PWM) pole is proposed in this paper. With this scheme, the main switches work with ZVS through the assistance of a small rating zero current switching (ZCS) lossless auxiliary circuitry without imposing any voltage/current spikes on the main devices or any extra control complexities. Consequently, a three-level capacitor clamping inverter system can operate at a promoted switching frequency and becomes more eligible to be considered for high-power advanced applications, for example, in high-speed drives or power active filter areas. In this paper, the main circuit operation issues as regards the clamping voltage stability, damping capacitor stress, and output voltage spectrum are shortly reviewed first, after which the commutation principle, auxiliary circuitry stress analysis, and auxiliary circuitry designing methodology are presented in detail. Experimental results from a 700 V supply 3 kW half-bridge three-level capacitor clamping inverter are demonstrated which conform well to the proposal     

Three-phase power quality compensator under the unbalanced sources and nonlinear loads

A three-phase voltage-source inverter for a power quality compensator under the unbalanced mains and nonlinear loads is proposed to provide balanced three-phase source current and improve input power factor. The proposed converter is based on the conventional three-phase voltage-source inverter with three additional ac power switches to achieve three-level pulsewidth modulation. The voltage stress of three ac power switches is clamped to half the dc-link voltage. The balanced reference mains currents are estimated using the dc-bus voltage and load currents. A proportional-integral voltage controller is used in the outer loop to compensate the switching losses of the voltage-source inverter. To perform the integrated power quality compensation, a hysteresis current control scheme is adopted to track the balanced line current command in phase with mains voltage. Three voltage levels are generated on the ac terminal of the proposed inverter. Computer simulation and experimental results are provided to verify the effectiveness of the proposed control scheme.     

Analysis,design and implementation of an interleaved three-level PWM DC/DC ZVS converter

This paper presents a new parallel three-level soft switching pulse-width modulation (PWM) converter. The proposed converter has two circuit cells operated by the interleaved PWM modulation. Thus, the ripple currents at input and output sides are reduced. Each circuit cell has two three-level zero voltage switching circuits sharing the same power switches. Therefore, the current and power rating of the secondary side components are reduced. Current double rectifier topology is selected on the secondary side to decrease output ripple current. The main advantages of the proposed converter are soft switching of power switches, low ripple current on the output side and low-voltage rating of power switches for medium-power applications. Finally, the performance of the proposed converter is verified by experiments with 1 kW prototype circuit.     

无电压传感器的三电平PWM整流器定频直接功率控制

给出了三电平PWM整流器的数学模型,在传统的直接功率控制和电压定向控制的基础上,结合虚拟磁链控制的优点,提出了一种新的三电平PWM整流器定频直接功率控制方法。该控制方法省略了电网电压传感器,实现了有功功率和无功功率的动态解耦,调制环节采用空间电压矢量调制,开关频率固定。仿真结果表明,该控制方法实现了单位功率因数运行,网侧电流谐波小,具有良好的动静态性能,保证了中点电位的平衡。     

A Modular Strategy for Control and Voltage Balancing of Cascaded H-Bridge Rectifiers

In this paper, a new strategy for voltage balancing of distinct dc buses in cascaded H-bridge rectifiers is presented. This method ensures that the dc bus capacitor voltages converge to the reference value, even when the loads attached to them are extracting different amounts of power. The proposed method can be used for an arbitrary number of series H-bridges, different voltage levels, and different power levels in unidirectional or bidirectional rectifiers. To reduce the current harmonics and distortion, the input current is programmed to be sinusoidal and in phase with the input voltage; however, it is possible to adjust the input power factor to control both the active and reactive powers. In the proposed approach, both the low frequency (stepped modulation) and high frequency [pulse-width modulation (PWM)] switching methods are utilized to improve the performance of the rectifier. Using theoretical analysis, the acceptable load power limits for a rectifier with N-H-bridge cells are derived. The validity of the proposed method is verified by simulation and experimental results.      

Performance investigation of a current-controlled voltage-regulatedPWM rectifier in rotating and stationary frames

Active front-end rectifiers with reduced input current harmonics and high input power factor will be required in the near future for utility interfaced applications. In order to meet the new and more stringent regulations with force-commutated switches, the voltage source inverter approach is superior to the conventional current source approach, in terms of number of components and control options. However, the straightforward power angle control of the rectifier is characterized by a slow response and potential stability problems. This paper proposes a current-controlled PWM rectifier as an alternative. It provides near sinusoidal input currents with unity power factor and a low output voltage ripple. Moreover, it produces a well-defined input current harmonic spectrum, exhibits fast transient response to load voltage variations, and is capable of regenerative operation. PWM pattern generation is based on a carrier technique and the current controller is implemented in the: (a) stationary (abc) frame; and (b) rotating (dqo) frame. The design and the performance of the two controller options are investigated and compared     

A 6.6-kV Transformerless Motor Drive Using a Five-Level Diode-Clamped PWM Inverter for Energy Savings of Pumps and Blowers

This paper describes a 6.6-kV adjustable-speed motor drive for pumps and blowers without transformer. The power conversion system consists of a front-end diode rectifier, a five-level diode-clamped pulsewidth modulation (PWM) inverter with a voltage balancing circuit, and a hybrid active filter for harmonic-current mitigation of the diode rectifier. The control of the inverter is characterized by superimposing a third-harmonic zero-sequence voltage on each of the three-phase reference voltages to achieve the so-called overmodulation and reduce the switching stress of insulated gate bipolar transistors (IGBTs). A 200-V 5.5-kW downscale model is designed, constructed, and tested with focus on the five-level PWM inverter and the voltage balancing circuit. Experimental results obtained from the 200-V downscale model verify the viability and effectiveness of the 6.6-kV adjustable-speed motor drive, showing that the four split dc capacitor voltages are well balanced in all the operating conditions and that the switching stress of the IGBTs is reduced at low modulation indexes.     

A fuzzy-controlled active front-end rectifier with current harmonicfiltering characteristics and minimum sensing variables

A control strategy which allows conventional voltage-source current-controlled (VSCC) pulsewidth modulation (PWM) rectifiers to work simultaneously as active power filters is presented. The proposed control strategy also allows compensating the system power factor and compensating unbalanced loads. The measurement and/or calculation of the harmonics and reactive power are not required, making the proposed control scheme very simple. The active front-end rectifier acts directly on the mains line currents, forcing them to be sinusoidal and in phase with the mains voltage supply. To improve the dynamic of the system, the amplitude of the current is controlled by a fuzzy system, which adjusts the DC-link voltage of the PWM rectifier. The strategy is based on connecting all the polluting loads between the PWM rectifier and their input current sensors. The main advantages of this approach are the following: (1) there is no need to install a specially dedicated active power filter; (2) it also works simultaneously as a power factor compensator; and (3) no special and complicated calculations are required for harmonic elimination. The viability of the proposed active front-end rectifier is proved by simulation and with experimental results obtained from a 2 kVA PWM prototype     

Diode-clamped multilevel converters: a practicable way to balance DC-link voltages

The converter topologies identified as diode-clamped multilevel (DCM) or, equivalently, as multipoint clamped (MPC), are rarely used in industrial applications, owing to some serious drawbacks involving mainly the stacked bank of capacitors that constitutes their multilevel DC link. The balance of the capacitor voltages is not possible in all operating conditions when the MPC converter possesses a passive front end. On the other hand, in AC/DC/AC power conversion, the back-to-back connection of a multilevel rectifier with a multilevel inverter allows the balance of the DC-link capacitor voltages and, at the same time, it offers the power-factor-correction capability at the mains AC input. An effective balancing strategy suitable for MPC conversion systems with any number of DC-link capacitors is presented here. The strategy has been carefully studied to optimize the converter efficiency. The simulation results related to a high-power conversion system (up to 10 MW) characterized by four intermediate DC-link capacitors are shown.     

A simple slip-power recovery system with a DC voltage intermediatecircuit and reduced harmonics on the mains

A different circuit configuration for the slip-power recovery system is presented in this paper. A boost chopper is used to connect the diode rectifier to the DC-link voltage, which is composed of a capacitor and a voltage-source inverter (VSI). The diode rectifier gives rise to mains current harmonies of variable frequency, which can present subharmonics, harmonics, and interharmonics that can lead to flicker in the mains. Two simple solutions to this drawback are studied. In the first solution, additional inductances were connected on the AC side of the rotor circuits to increase the overlap angle. In the second solution, the stator current harmonics are compensated by a VSI that can work simultaneously as an inverter and as an active power filter. This system represents a very interesting and useful application for active power filters. The merits of the configuration presented are cost, control simplicity, the possibility of reactive power control over a wide range, and quasi-optimum exploitation of the electrical machine. The characteristics of the proposed system and its control are presented in this paper. It is concluded that, although the system proposed is much simpler than others, it has interesting performance     

Three-Level Inverter-Based Shunt Active Power Filter in Three-Phase Three-Wire and Four-Wire Systems

This paper presents a direct current-space-vector control of an active power filter (APF) based on a three-level neutral-point-clamped (NPC) voltage-source inverter. The proposed method indirectly generates the compensation current reference by using an equivalent conductance of the fundamental component using APF's dc-link voltage control. The proposed control can selectively choose harmonic current components by real-time fast Fourier transform to generate the compensation current. The compensation current is represented in a rotating coordinate system with chosen switching states from a switching table implemented in a field-programmable gate array. In addition, a three-phase four-wire APF based on a three-level neutral-point-clamped inverter is also presented. The proposed APF eliminates harmonics in all three phases as well as the neutral current. A three-phase three-wire NPC inverter system can be used as a three-phase four-wire system since the split dc capacitors provide a neutral connection. To regulate and balance the split dc-capacitor voltages, a new control method using a sign cubical hysteresis controller is proposed. The characteristics of the APF system with an LCL-ripple filter are investigated and compared with traditional current control strategies to evaluate the inherent advantages. The simulation and experimental results validated the feasibility of the proposed APF.