采用噪声抵消技术的宽带SiGe HBT 低噪声放大器设计

宽带低噪声放大器的输入匹配需要兼顾阻抗匹配和噪声匹配.通常,这两个指标是耦合在一起的.现有的宽带匹配技术需要反复协调电路参数,在阻抗匹配和噪声匹配之间折衷,给设计增大了难度.提出一种噪声抵消技术,通过两条并联的等增益支路,在输出端消除了输入匹配网络引入的噪声,实现阻抗匹配和噪声匹配的去耦.基于Jazz 0.35 μm SiGe工艺,设计了一款采用该噪声抵消技术的宽带低噪声放大器.放大器的工作带宽为0.8-2.4 GHz,增益在 16 dB以上,噪声系数小于3.25 dB, S11在-17 dB以下.     

Designing a mirrored Howland circuit with a particle swarm optimisation algorithm

Electrical impedance spectroscopy usually requires a wide bandwidth current source with high output impedance. Non-idealities of the operational amplifier (op-amp) degrade its performance. This work presents a particle swarm algorithm for extracting the main AC characteristics of the op-amp used to design a mirrored modified Howland current source circuit which satisfies both the output current and the impedance spectra required. User specifications were accommodated. Both resistive and biological loads were used in the simulations. The results showed that the algorithm can correctly identify the open-loop gain and the input and output resistance of the op-amp which best fit the performance requirements of the circuit. It was also shown that the higher the open-loop gain corner frequency the higher the output impedance of the circuit. The algorithm could be a powerful tool for developing a desirable current source for different bioimpedance medical and clinical applications, such as cancer tissue characterisation and tissue cell measurements.     

采用集成滤波器的低噪声D类放大器

This paper investigates the noise sources in a single-ended class D amplifier (SECDA) and suggests corresponding ways to lower the noise. The total output noise could be expressed as a function of the gain and noises from different sources. According to the function, the bias voltage (V_B) is a primary noise source, especially for a SECDA with a large gain. A low noise SECDA is obtained by integrating a filter into the SECDA to lower the noise of the V_B. The filter utilizes an active resister and an 80 pF capacitance to get a 3 Hz pole. A noise test and fast Fourier transform analysis show that the noise performance of this SECDA is the same as that of a SECDA with an external filter.     

宽带单片低噪声放大器的增益温度补偿

分析了PHEMT的增益-温度特性和漏电流-温度特性,发现PHEMT增益和漏电流都是随温度的升高而降低,并发现了一定栅宽的PHEMT在大于某一频率时,其增益受温度变化较小的原因.提出了两种自动温度补偿的方法,并分析了每种方法的温度补偿原理.串联源电阻的温度补偿可使PHEMT的漏电流基本保持不变,在一定程度上能降低温度对增益的影响.而自动栅压温度补偿则是强温度补偿,它可随温度的升高,自动提高栅极电压,提高PHEMT的跨导,从而大大减少温度对增益的影响,达到温度补偿的目的.把这两种自动温度补偿的方法结合应用到宽带低噪声放大器中,发现补偿效果良好.试验发现温度补偿后,温度从-55℃~+85℃时和-55℃~+125℃时,放大器的增益在6GHz时的降差分别减小了60%和51%,较大地改善了放大器的温度-增益性能.     

Optimization of input impedance and mechanism of noise suppressionin a DC SQUID RF amplifier

The optimal input impedance and noise of a DC SQUID RF amplifier at frequencies of the order of 1 GHz with a resonant input matching circuit have been studied analytically, numerically, and experimentally. A model for noise temperature and power gain has been developed for the practical resonant input tank circuit. A new effect of the output noise increasing or decreasing with changing the sign of voltage-to-flux transfer coefficient has been observed experimentally and explained analytically. The different values of noise temperature for the opposite dV/dΦ values have been interpreted using a model with partially correlated current and voltage noise sources. The equivalent layout for optimal input matching of a SQUID amplifier comprising series and parallel resonant circuits has been presented. Using such a matching circuit and SIS junction as a signal source the SQUID amplifier noise temperature about 1 K has been measured at 1.1 GHz     

A 0.18μm CMOS low noise amplifier using a current reuse technique for 3.1-10.6 GHz UWB receivers

A new,low complexity,ultra-wideband 3.1-10.6 GHz low noise amplifier(LNA),designed in a chartered 0.18μm RFCMOS technology,is presented.The ultra-wideband LNA consists of only two simple amplifiers with an inter-stage inductor connected.The first stage utilizing a resistive current reuse and dual inductive degeneration technique is used to attain a wideband input matching and low noise figure.A common source amplifier with an inductive peaking technique as the second stage achieves high flat gain and wide -3 dB bandwidth of the overall amplifier simultaneously.The implemented ultra-wideband LNA presents a maximum power gain of 15.6 dB,and a high reverse isolation of—45 dB,and good input/output return losses are better than -10 dB in the frequency range of 3.1-10.6 GHz.An excellent noise figure(NF) of 2.8-4.7 dB was obtained in the required band with a power dissipation of 14.1 mW under a supply voltage of 1.5 V.An input-referred third-order intercept point(IIP3) is -7.1 dBm at 6 GHz.The chip area,including testing pads,is only 0.8×0.9 mm2.     

2.5Gb/s CMOS低噪声有源电感反馈跨阻放大器

分析各种结构前置放大器性能的基础上,给出了一个应用于2.5 Gbit/s光纤通信系统的,基于CMOS工艺的共栅结构跨阻放大器。为了减小输入等效噪声电流和提高带宽,采用了有源反馈和有源电感代替传统结构中的电阻反馈。测试结果表明,该电路具有61.8 dB的跨阻增益,2.01 GHz的带宽,输入等效噪声电流为9.5 pA/Hz～(1/2),核心电路功耗仅为3.02 mW。     

有源电阻RTIA红外焦平面读出电路

提出了一种基于有源电阻的电阻反馈跨导放大器(RTIA)红外焦平面读出电路,该电路采用工作在亚阈区的MOS管实现1011 以上的有源大电阻,不仅能与热释电红外探测器的高阻抗良好匹配,而且配合两管共源放大器可针对热释电微弱信号进行高增益电流放大。同时,简单的三管单元结构能够方便地置于像元之下,相比于采用特殊高阻材料实现的RTIA,不附加材料和工艺。经上华0.5 ?滋m CMOS工艺流片验证,在5 V电源电压下,该电路增益40 dB,输出摆幅3 V,在高低温测试下表现出了良好的增益带宽稳定性,适用于PZT和BST等热释电大阵列探测器。     

一种适用于传感器信号检测的斩波运算放大器

提出一种适合传感器微弱信号检测应用的全差分低噪声、低失调斩波运算放大器。采用两级折叠共源共栅运放结构,基于斩波稳定及动态元件匹配技术,通过在运放低阻节点的电流通路上添加斩波开关的设计方式,增加了运放的输入信号带宽和输出电压摆幅。芯片采用TSMC 0.18μm 1P6MCMOS工艺实现。测试结果表明,在1.8V电源电压,25kHz输入信号和300kHz斩波频率下,斩波运放输入等效失调电压小于120μV,在10Hz～1kHz之间,输入等效噪声为5nV/Hz^1/2,最高开环增益为84dB,单位增益带宽为4MHz。     

Design and optimization of CMOS LNA with ESD protection for 2.4 GHz WSN application

A new optimization method of a source inductive degenerated low noise amplifier(LNA) with electrostatic discharge protection is proposed.It can achieve power-constrained simultaneous noise and input matching. An analysis of the input impedance and the noise parameters is also given.Based on the developed method,a 2.4 GHz LNA for wireless sensor network application is designed and optimized using 0.18-μm RF CMOS technology. The measured results show that the LNA achieves a noise figure of 1.59 dB,a power gain of 14.12 dB, an input 1 dB compression point of-8 dBm and an input third-order intercept point of 1 dBm.The DC current is 4 mA under a supply of 1.8 V.     

A New Automatic Compensation Network for System‐on‐Chip Transceivers

This paper proposes a new automatic compensation network (ACN) for a system‐on‐chip (SoC) transceiver. We built a 5 GHz low noise amplifier (LNA) with an on‐chip ACN using 0.18 µm SiGe technology. This network is extremely useful for today's radio frequency (RF) integrated circuit devices in a complete RF transceiver environment. The network comprises an RF design‐for‐testability (DFT) circuit, capacitor mirror banks, and a digital signal processor. The RF DFT circuit consists of a test amplifier and RF peak detectors. The RF DFT circuit helps the network to provide DC output voltages, which makes the compensation network automatic. The proposed technique utilizes output DC voltage measurements and these measured values are translated into the LNA specifications such as input impedance, gain, and noise figure using the developed mathematical equations. The ACN automatically adjusts the performance of the 5 GHz LNA with the processor in the SoC transceiver when the LNA goes out of the normal range of operation. The ACN compensates abnormal operation due to unusual thermal variation or unusual process variation. The ACN is simple, inexpensive and suitable for a complete RF transceiver environment.     

Photonic theory of noise

The paper proposes that 1/f noise in materials and devices under non-equilibrium conditions is of electromagnetic origin rather than being related to charge carriers. For samples represented by simple resistors the analysis shows that the noise is due to the discrete nature of photons constituting the impinging electromagnetic flux from the source feeding the resistor. The paper presents detailed analysis of the external and internal electromagnetic fields of the resistor environment, with appropriate interpretation in terms of discrete photons. From quantum theory photons are known to retain their energy under interactions in linear environments. This property implies a departure from macroscopic electromagnetics in that photons cannot be partially transmitted and partially reflected, a phenomenon requiring appropriate modifications of boundary conditions at the resistor surface. These special demands call for inclusion of a supplementary internal resistor mode, serving as a lossless idler which is active only for matching purposes. At the resistor terminals the impinging photons give rise to excitation of RF current and voltage noise with an exact 1/f frequency distribution, which is in agreement with all available experimental measurements. The paper presents detailed formulae for noise spectral densities under general drive conditions from DC and RF sources of arbitrary internal resistance. The presented theoretical noise formulae have the same form as earlier empirical formulae for 1/f noise. With an RF source at frequency f₀ the analysis predicts noise with 1/|f-f₀| frequency distribution, which is compatible with available experimental observations.     

Noise Analysis and Optimization of Programmable Gain Amplifier with DC Offset Cancelation

The noise contribution of a DC offset cancelation (DCOC) circuit in a programmable gain amplifier (PGA) is studied for the first time in this paper. The analysis presented shows that the DCOC-induced noise may deteriorate the PGA’s noise performance significantly if we do not pay enough attention to it. For an analog DCOC (ADCOC), it is concluded that the PGA’s noise increases rapidly as the output DC offset decreases, thereby causing difficulties to achieve both low noise and low DC offset simultaneously. We propose an optimization technique that can effectively alleviate the noise issue by increasing the feedback amplifier’s gain and the resistor’s value simultaneously, while maintaining a reasonable DC gain. For a digital DCOC (DDCOC), the extra noise comes from the transistors of the current source (sink) bank. The transistors with a longer channel length are preferred for their lower thermal and flicker noise current. The proof-of-concept prototypes are designed in a 0.18-\(\upmu \)m CMOS process, and a 3-stage PGA with ADCOC is fabricated. The measurement results validate the analysis and simulation results well.     

高电源抑制比低噪声带隙基准电压源的设计

基于带隙基准原理,通过优化电路结构和采用BiCMOS技术,提出一种精度高、噪声小的带隙基准源电路。利用具有高开环增益的折叠式共源共栅放大器,提高了低频电压抑制比;应用低跨导PMOS对管及电路输出端低通滤波器,实现了更低的噪声输出;合理的版图设计减小了失调电压带来的影响。Hspice仿真结果表明,在3V电源电压下,输出基准电压为1.2182mV,温度系数为1.257×10-5/℃;频率从103～105 Hz变化时,输出噪声最大值的变化量小于5μV。流片测试结果表明,该基准源输出基准电压的电源抑制比高,温度系数小,噪声与功耗低。     

10Gb/s GaAs PHEMT电流模跨阻抗光接收机前置放大器

采用0.5μm GaAs PHEMT工艺研制了一种单电源共栅电流模跨阻抗前置放大器(TIA).测量得到放大器-3dB带宽为7.5GHz,跨阻增益为45dBΩ;输入输出电压驻波比(VSWR)均小于2;等效输入噪声电流谱密度在14.3～22pA/ Hz之间,平均值为17.2pA/ Hz.在输入10Gb/s非归零(NRZ)伪随机二进制序列(PRBS)信号下,放大器输出眼图清晰,具有14ps的定时抖动和138mV的峰峰电压.     

Analysis of the Noise Characteristics of CMOS Current Conveyors

The definition of the current conveyor is reviewed and a multiple-output second generation current conveyor (CCII) is shown to combine the different generations of current conveyors presently existing. Next, noise sources are introduced, and a general noise model for the current conveyor is described. This model is used for the analysis of selected examples of current conveyor based operational amplifier configurations and the noise performance of these configurations is compared. Finally, the noise model is developed for a CMOS current conveyor implementation, and approaches to an optimization of the noise performance are discussed. It is concluded that a class AB implementation can yield a lower noise output for the same dynamic range than a class A implementation. For both the class A implementation and the class AB implementation it is essential to design low noise current mirrors and current sources, and with the class AB design, the current mirror and current source noise can be reduced by using small values of bias current without compromising the maximum available output current.     

一种采用有源电感的可调增益小面积超宽带低噪声放大器

设计了一款采用可调谐有源电感（TAI）的可调增益的小面积超宽带低噪声放大器(LNA),输入级采用共基极结构,输出级采用射随器结构,分别实现了宽带输入和输出匹配;放大级采用带有反馈电阻的共射共基结构以取得宽的带宽,并采用TAI作负载,通过调节TAI的多个外部偏压使LNA的增益可调。结果表明,该LNA在2~9GHz的频带内,通过组合调节有源电感调节端口的偏压可实现S21在16.5~21.1dB的连续可调;S11小于-14.7dB;S22小于-19.3dB;NF小于4.9dB;芯片面积仅为0.049mm2。     

一种低噪放多级匹配网络的设计与仿真

匹配网络影响了低噪放的增益、噪声系数、带宽等重要指标。若采用单向设计,则输入与输出端匹配网络相互影响,使得匹配网络的性能下降,而常规双向设计需要对不同用途的匹配网络分别考虑,且设计繁琐。由此,本文提出了一种最佳阻抗匹配仿真法,它能较好地克服匹配网络间相互影响,对不同用途匹配网络不需分开设计,即可达到双向设计相同的目的,且设计过程简单直观,程序化,适合多级匹配网络的仿真设计。最后利用这种方法对2.49GHz高增益三级低噪放的各级匹配网络进行了设计。     

10Gb/s光接收机跨阻前置放大器芯片设计研究

采用0.18 μm BiCMOS工艺设计并实现了一种高增益、低噪声、宽带宽以及大输入动态范围的光接收机跨阻前置放大器.在寄生电容为250 fF的情况下,采用全集成的四级放大电路,合理实现了上述各项参数指标间的折中.测试结果表明:放大器单端跨阻增益为73 dB,-3 dB带宽为7.6 GHz,灵敏度低至-20.44 dBm,功耗为74 mW,最大差分输出电压为200 mV,最大输入饱和光电流峰-峰值为1 mA,等效输入噪声为17.1 pA/√Hz,芯片面积为800 μ.m×950μm.     

微电容超声换能器的前端专用集成电路设计

针对微电容超声换能器(CMUT)微弱电流信号检测的要求,设计了一种用于CMUT的前端专用集成电路——运算放大器(OPA)电路。运算放大器电路采用两级放大结构,第一级采用全差分折叠-共源共栅结构,输出级采用AB类控制的轨到轨输出级,在运算放大器电路反相输入端和输出端通过一个反馈电阻实现CMUT电流信号到电压信号的转换。采用GlobalFoundries 0.18μm的标准CMOS工艺进行了仿真设计和流片,芯片尺寸为226μm×75μm。仿真结果表明,运算放大器的开环增益为62 dB,单位增益带宽为30 MHz,在3 MHz处的输入参考噪声电压为2.9μV/Hz^1/2,电路采用±3.3 V供电,静态功耗为11 mW。测试结果表明仿真与实测结果相符,该运算放大器电路能够实现CMUT微弱电流信号检测功能。