基于SoC平台的H.264/MPEG-4 AVC解码器设计

提出了一种基于SoC平台的H.264/MPEG-4 AVC解码器设计方案,该方案基于Gaisler Research开发的LEON3 RISC核,采用双总线的流水线结构,具有很高的性价比,通过在Modelsim 6.0下的仿真结果表明,硬件解码部分在200 MHz系统时钟时可以实时解码H.264 High 44 4 profile 4.0 level码流.     

MPEG-4解码器芯片的比较

介绍了目前市场上比较流行的一些MPEG-4编解码芯片，比较了它们的应用前景和特性，并简要介绍了新一代视频编解码标准H．264的芯片产品。     

AVS中的音视频编码压缩技术

介绍了音视频编码标准AVS中的主要技术特点,对AVS标准所采用的主要技术进行了综述,给出了AVS视频标准与MPEG-4 AVC/H.264编码器性能的比较和分析,讨论了AVS的发展前景.     

视频编码新标准H.264/AVC中的重要技术

简要介绍了最新的视频编码标准H．264／AVC的制定情况，详细叙述了H．264／AVC基本框架中采用的几个重要技术，最后比较了H．264／AVC和已有的几个编码标准的性能，H．264／AVC的压缩性能最好。     

一种基于缩减栅格算法的SVC联合信源/信道编码方法

 针对H.264/AVC可分级编码扩充标准(SVC),本文提出了一种联合信源/信道编码(JSCC)的视频传输方法.该方法采用一种新型的缩减栅格算法与拉格朗日优化技术对SVC数据与差错控制保护级别进行最优分配.本文提出的缩减栅格算法采用疏散式栅格结构,实行依层计算与缩减队列的策略,计算效率比同类高效算法提高了约20~50倍.大量仿真数据表明,采用本文高效算法的JSCC方法在各种信道条件下达到同类方法相同的优化性能.     

Joint Source/Channel Coding Based on Two‐Dimensional Optimization for Scalable H.264/AVC Video

The scalable extension of the H.264/AVC video coding standard (SVC) demonstrates superb adaptability in video communications. Joint source and channel coding (JSCC) has been shown to be very effective for such scalable video consisting of parts of different significance. In this paper, a new JSCC scheme for SVC transmission over packet loss channels is proposed which performs two‐dimensional optimization on the quality layers of each frame in a rate‐distortion (R‐D) sense as well as on the temporal hierarchical structure of frames under dependency constraints. To compute the end‐to‐end R‐D points of a frame, a novel reduced trellis algorithm is developed with a significant reduction of complexity from the existing Viterbi‐based algorithm. The R‐D points of frames are sorted under the hierarchical dependency constraints and optimal JSCC solution is obtained in terms of the best R‐D performance. Experimental results show that our scheme outperforms the existing scheme of [13] with average quality gains of 0.26 dB and 0.22 dB for progressive and non‐progressive modes respectively.     

H．264／AVC视频编码新技术研究

视频编码新标准H.2 64/AVC采用了许多先进技术如统一的VLC符号编码,高精度、多模式的位移估计,基于4×4块的整数变换、分层的编码语法等。这些措施使得H.2 64算法具有很高的编码效率。同时在网络层通过对信息的封装与优先级控制等技术来实现数据在不同网络之间的透明传输。H.2 64的这种码流结构网络适应性强,增加了差错恢复能力,具有较强的抗误码特性,能够很好地适应丢包率高、干扰严重的无线信道中的视频传输。本文从编码效率和网络适应性方面讨论了H.2 64/AVC中所采用的新技术     

H.264编/解码器中去块效应滤波系统的设计

提出了一种针对H.264/MPEG-4 AVC标准的高性能低复杂度的去块效应滤波系统的VLSI结构,该结构利用数据重用机制以减少数据的吞吐量,同时辅以高效的数据流控制和并行计算.在100MHz的情况下,该结构满足1920×1088@30Hz的高清晰度视频编解码要求.     

A novel watermarking scheme for H.264/AVC video authentication

As the H.264/AVC-based video products become more and more popular, issues of copyright protection and authentication that are appropriate for this standard will be very important. In this paper, a content-based authentication watermarking scheme for H.264/AVC video is proposed. Considering the new feature of H.264/AVC, the content-based authentication code for spatial tampering is firstly generated using the reliable features extracted from video frame blocks. The authentication code, which can detect malicious manipulations but allow recompression, is embedded into the DCT coefficients in diagonal positions using a novel modulation method. Spatial tampering can be located by comparing the extracted and the original feature-based watermarks. In addition, combining ECC and interleaving coding, the frame index of each video frame is used as watermark information and embedded in the residual coefficients. Temporal tampering can be detected by the mismatch between the extracted and the observed frame index. Experimental results show that the proposed scheme can discriminate the malicious tampering from the mild signal processing. The tampered location can also be approximately determined according to the glide window and the predefined threshold.     

Power Dissipation of the Network-on-Chip in Multi-Processor System-on-Chip Dedicated for Video Coding Applications

In the near future, small electronic hand-held devices will be equipped with digital cameras capable of acquiring high resolution images (HDTV) at real-time rates, resulting in video streams of dozens of megabytes per second. The real-time video decoding and especially encoding of such streams with AVC/ H.264 or SVC standards require a huge amount of computing power that, in the case of a hand-held device, has to be delivered under the constraint of low power dissipation. In this paper we present a Multi-Processor System-on-Chip dedicated for high performance, low-power video coding applications using Network-on-Chip (NoC) as communication infrastructure. Extensive experiments have established the power dissipation models of individual NoC components, i.e. network interfaces, routers and wires. Based on these models and the NoC topology, we build the power model of the complete NoC. For three different implementation scenarios of the AVC/H.264 simple profile encoder we derive the power dissipation of the NoC for image resolutions up to HDTV at rate of 30 frames per second. The results obtained show that for the same application mapping scenario (worst case), moving from CIF to HDTV resolution will result in a 35% increase of the total power dissipation. Finally, for HDTV resolution, the difference in power dissipation between the worst (21 mW) and the best case application mapping scenario is 26%.

Frame distortion estimation for unequal error protection methods in scalable video coding (SVC)

In many multimedia applications, coded video is transmitted over error prone heterogeneous networks. Because of the predictive mechanism used in video coding, transmission error would propagate temporally and spatially and would result in significant quality losses. In order to address this problem, different error resilience methods have been proposed. One of the techniques, which is commonly used in video streaming, is unequal error protection (UEP) of scalable video coding (SVC). In this technique, different independent layers of an SVC stream are protected differently and based on their importance by using forward error correction (FEC) codes. Accurately analyzing the importance or utility of each video part is a critical component and would lead to a better protection and higher quality of the received video. Calculation of the utility is usually based on multiple decoding of sub-bitstreams and is highly computationally complex. In this work, we propose an accurate low complexity utility estimation technique that can be used in different applications. This technique estimates the utility of each network abstraction layer (NAL) by considering the error propagation to future frames. We utilize this method in an UEP framework with the scalable extension of H.264/AVC codec and it achieves almost the same performance as highly complex estimation techniques (an average loss of 0.05 dB). Furthermore, we propose a low delay version of this technique that can be used in delay constrained application. The estimation accuracy and performance of our proposed technique are studied extensively.