Nanostructured metal–insulator–metal capacitor with anodic titania

This paper presents fabrication and electrical characterization of barrier type TiO₂ metal–insulator–metal (MIM) capacitor using anodization. Polarization process, conduction mechanisms, and structural properties are studied in detail. We found that the anodization voltage played a major role in electrical and structural properties of the thin film. The barrier type anodic TiO₂ is suggested as a dielectric material for high-performance MIM capacitors.     

Optical-beam profiling by field-controlled metal–semiconductor–metal structures

Optical-beam profiling properties of Schottky-barrier metal–semiconductor–metal (MSM) structures have been investigated experimentally. Making use of a planar molybdenum/n-type silicon/molybdenum (Mo/n-Si/Mo) MSM structure with a wide electrode separation, one-dimensional (1-D) profiling of optical-beam intensity distribution from a helium–neon (He–Ne) laser was carried out. It was confirmed that, in addition to the existing photosensing function, the sensitivity (output photocurrent) of such a structure could be controlled by applying a bias via lateral spreading of the surface space-charge-region (SCR) at the side of the reverse-biased Schottky-junction.     

Photon-assisted capacitance–voltage study of organic metal–insulator–semiconductor capacitors

The results are reported of a detailed investigation into the photoinduced changes that occur in the capacitance–voltage (C–V) response of an organic metal–insulator–semiconductor (MIS) capacitor based on the organic semiconductor poly(3-hexylthiophene), P3HT. During the forward voltage sweep, the device is driven into deep depletion but stabilizes at a voltage-independent minimum capacitance, C_min, whose value depends on photon energy, light intensity and voltage ramp rate. On reversing the voltage sweep, strong hysteresis is observed owing to a positive shift in the flatband voltage, V_FB, of the device. A theoretical quasi-static model is developed in which it is assumed that electrons photogenerated in the semiconductor depletion region escape geminate recombination following the Onsager model. These electrons then drift to the P3HT/insulator interface where they become deeply trapped thus effecting a positive shift in V_FB. By choosing appropriate values for the only disposable parameter in the model, an excellent fit is obtained to the experimental C_min, from which we extract values for the zero-field quantum yield of photoelectrons in P3HT that are of similar magnitude, 10^?5 to 10^?3, to those previously deduced for π-conjugated polymers from photoconduction measurements. From the observed hysteresis we deduce that the interfacial electron trap density probably exceeds 10¹⁶ m^?2. Evidence is presented suggesting that the ratio of free to trapped electrons at the interface depends on the insulator used for fabricating the device.     

Effect of hydrogen on interface of metal–semiconductor Schottky diode

The effect of hydrogen on p-type Si/Mn and Si/Co Schottky diode has been investigated in present studies. The variations of I–V characteristics suggested that the rectifying act of these diodes change with variation of hydrogen pressure, which is due to the diffusion of hydrogen through the Mn and Co metal films up to Si surface or a creation of surface states at the interface. It is also observed that the effect of hydrogen found to be reverse in order for forward as well as reverse direction of current in Mn and Co deposited films on Si substrate, corresponding to anionic and protonic model of hydrogen interaction with metals. One can say that hydrogen plays an amphoteric role to neutralize either donors or acceptors level in semiconductors and metals. The Raman spectra of Si/Mn and Si/Co are taken and stoke lines link with the presence of hydrogen is observed. In this paper, we are presenting the role of hydrogen pressure on I–V characteristics at the interface of metal–semiconductor structure.     

Electrical characterization of controlled and unintentional modified metal–organic contacts

A method to characterize metal–organic contacts subjected to controlled technological treatments or unintentional degradation processes is proposed. The procedure is useful to characterize different fundamental aspects of a metal–organic structure such as the height of the interface energy barrier, the presence of impurities or trapping effects and the carrier mobility. Current–voltage curves in organic diodes are analyzed and the value of the free carrier density at the metal–organic interface is extracted and discussed. The charge carrier density is chosen for this analysis as this is one of the key physical parameters in the understanding of the physical processes involved in the device operation. The extracted charge, when described as a function of the current density, gives information about the doping and impurity concentration, the effective barrier seen by the carriers at the metal–organic interface or effective barriers seen by the carriers in the hopping processes across the organic material. An important advantage of the proposed procedure is the low computational time. Also, the procedure aims to provide a quick analysis for researchers on how the physical properties of the devices are evolving when they are technologically altered or degraded.     

Selective UV photodetectors based on the metal–AlGaN Schottky barrier

Selective metal–AlGaN photodetectors based on the Schottky barrier and operating in UV spectral range have been developed. The selective photodiodes based on Ag–AlGaN Schottky barriers of different composition have been manufactured, which has made it possible to improve the photosensitivity in the UV spectral range and eliminate spurious signals in the long-wavelength part of the UV spectral range. This has made it possible to develop visible-blind photodetectors with the long-wavelength edge of photosensitivity lying at the wavelengths less than 350 nm. The width of the photosensitivity spectrum is within 15–40 nm, depending on the thickness of the Ag layer, which varies from 15 to 150 nm. The proper choice of the composition of the Al _x Ga_1–x N solid solution ensures increase in the photoresponse and reduction of the FWHM spectrum width up to 11 nm by matching peaks of the Ag transmission spectrum and the absorption spectrum of the epitaxial layer. The sensitivity is 0.071 A/W. The combination of effects of wideband window and overthe- barrier transfer has made it possible to create the ultraselective UV photodetectors based on Au–AlGaN structures with a half-width of the photosensitivity spectrum of 5–6 nm for the wave range 350—375 nm and a sensitivity of up to 140 mA/W. Based on a structure with the upper Al _x Ga_1–x N epitaxial layer (with the AlN content x = 0.1 or x = 0.06), selective photodetectors with the maximum photosensitivity at wavelengths of 355 nm and 362 nm have been developed. Application of an additional less wideband GaN layer has made it possible to independently control the short-wavelength and long-wavelength boundaries of the sensitivity range.     

Quantum-well charge and voltage distribution in a metal–insulator–semiconductor structure upon resonant electron Tunneling

The prerequisites for electron storage in the quantum well of a metal–oxide–p ⁺-Si resonant-tunneling structure and the effect of the stored charge on the voltage distribution are theoretically investigated. Systems with SiO₂, HfO₂, and TiO₂ insulators are studied. It is demonstrated that the occurrence of a charge in the well in the case of resonant transport can be expected in structures on substrates with an acceptor concentration from (5–6) × 10¹⁸ to (2–3) × 10¹⁹ cm^–3 in the range of oxide thicknesses dependent on this concentration. In particular, the oxide layer thickness in the structures with SiO₂/p ⁺-Si(10¹⁹ cm^–3) should exceed ~3 nm. The electron density in the well can reach ~10¹² cm^–2 and higher. However, the effect of this charge on the electrostatics of the structure becomes noticeable only at relatively high voltages far above the activation of resonant transport through the first subband.     

Electrical and photoelectric properties of Si-based metal–insulator–semiconductor structures with Au nanoparticles at the insulator–semiconductor interface

It is shown that the formation of Au nanoparticles at the insulator–silicon interface in structures with a high density of surface states results in a shift of the Fermi-level pinning energy at this interface towards the valence-band ceiling in silicon and in increasing the surface-state density at energies close to the Fermi level. In this case, a band with a peak at 0.85 eV arises on the photosensivity curves of the capacitor photovoltage, which is explained by the photoemission of electrons from the formed Au-nanoparticle electron states near the valence-band ceiling in silicon.     

Facile synthetic route to implement a fully bendable organic metal–insulator–semiconductor device on polyimide sheet

Triblock copolymer surfactant, HO(CH₂CH₂O)₂₀(CH₂CH(CH₃)O)₇₀(CH₂CH₂O)₂₀H (i.e. P123)-based nanocrystalline (nc)-TiO₂ thin film had been synthesized on organic flexible polyimide (PI) sheet for their application in organic metal–insulator–semiconductor (MIS) device. The nc-TiO₂ film over PI was successfully deposited for the first time by a systematic solution proceeds dip-coating method and by the assistance of triblock copolymer surfactant. The effect of annealing temperature (270 °C, 5 h) on the texture, morphology and time-induced hydrophilicity was studied by X-ray diffraction (XRD), atomic force microscopy (AFM), X-ray photoelectron spectroscopy (XPS) and contact angle system, respectively, to examine the chemical composition of the film and the contact angle. The surface morphology of the semiconducting layer of organic pentacene was also investigated by using AFM and XRD, and confirmed that continuous crystalline film growth had occurred on the nc-TiO₂ surface over flexible PI sheet. The semiconductor–dielectric interface of pentacene and nc-TiO₂ films was characterized by current–voltage and capacitance–voltage measurements. This interface measurement in cross-link MIS structured device yielded a low leakage current density of 8.7 × 10^?12 A cm^?2 at 0 to ?5 V, maximum capacitance of 102.3 pF at 1 MHz and estimated dielectric constant value of 28.8. Furthermore, assessment of quality study of nc-TiO₂ film in real-life flexibility tests for different types of bending settings with high durability (c.a. 30 days) demonstrated a better comprehension of dielectric properties over flexible PI sheet. We expected them to have a keen interest in the scientific study, which could be an alternate opportunity to the excellent dielectric–semiconductor interface at economic and low temperature processing for large-area flexible field-effect transistors and sensors.     

Generation of surface electron states with a silicon–ultrathin-oxide interface under the field-induced damage of metal–oxide–semiconductor structures

The high-frequency capacitance–voltage characteristics of metal–oxide–semiconductor structures on n-Si substrates with an oxide thickness of 39 Å are studied upon being subjected to damage by field stress. It is shown that the action of a high, but pre-breakdown electric field on an ultrathin insulating layer brings about the formation of a large number of additional localized interface electron states with an energy level arranged at 0.14 eV below the conduction band of silicon. It is found that, as the field stress is increased, the recharging of newly formed centers provides the accumulation of excess charge up to 8 × 10¹² cm^–2 at the silicon–oxide interface. The lifetime of localized centers created under field stress is two days, after which the dependences of the charge localized at the semiconductor–insulator interface on the voltage at the gate after and before field stress are practically the same.     

Influence of growth conditions of oxide on electrical properties of AlGaN/GaN metal–insulator–semiconductor transistors

AlGaN/GaN metal–insulator–semiconductor high-electron-mobility transistors(MIS-HEMTs) on a silicon substrate were fabricated with silicon oxide as a gate dielectric by sputtering deposition and electron-beam(EB) evaporation. It was found that the oxide deposition method and conditions have great influences on the electrical properties of HEMTs. The low sputtering temperature or oxygen introduction at higher temperature results in a positive equivalent charge density at the oxide/AlGaN interface(Nequ), which induces a negative shift of threshold voltage and an increase in both sheet electron density(ns) and drain current density(ID). Contrarily, EB deposition makes a negative Nequ, resulting in reduced ns and ID. Besides, the maximum transconductance(gm-max) decreases and the off-state gate current density(I_G-off) increases for oxides at lower sputtering temperature compared with that at higher temperature, possibly due to a more serious sputter-induced damage and much larger Nequ at lower sputtering temperature. At high sputtering temperature, I_G-off decreases by two orders of magnitude compared to that without oxygen, which indicates that oxygen introduction and partial pressure depression of argon decreases the sputter-induced damage significantly. I_G-off for EB-evaporated samples is lower by orders of magnitude than that of sputtered ones, possibly attributed to the lower damage of EB evaporation to the barrier layer surface.     

Calculation of the Schottky barrier and current–voltage characteristics of metal–alloy structures based on silicon carbide

A simple but nonlinear model of the defect density at a metal–semiconductor interface, when a Schottky barrier is formed by surface defects states localized at the interface, is developed. It is shown that taking the nonlinear dependence of the Fermi level on the defect density into account leads to a Schottky barrier increase by 15–25%. The calculated barrier heights are used to analyze the current–voltage characteristics of n-M/p-(SiC)_1–x(AlN)_x structures. The results of calculations are compared to experimental data.     

Stress immunity enhancement of the SiN uniaxial strained n-channel metal–oxide–semiconductor field-effect-transistor by channel fluorine implantation

Channel fluorine implantation (CFI) has been successfully integrated with silicon nitride contact etch stop layer (SiN CESL) to investigate electrical characteristics and stress reliabilities of the n-channel metal–oxide–semiconductor field-effect-transistor (nMOSFET) with HfO₂/SiON gate dielectric. Although fluorine incorporation had been used widely to improve device characteristics, however, nearly identical transconductance, subthreshold swing and drain current of the SiN CESL strained nMOSFET combining the CFI process clearly indicates that stress-induced electron mobility enhancement does not affect by the fluorine incorporation. On the other hand, the SiN CESL strained nMOSFET with fluorine incorporation obviously exhibits superior stress reliabilities due to stronger Si–F/Hf–F bonds formation. The channel hot electron stress and constant voltage stress induced threshold voltage shift can be significantly suppressed larger than 26% and 15%, respectively. The results clearly demonstrate that combining the SiN CESL strained nMOSFET with fluorinated gate dielectric using CFI process becomes a suitable technology to further enhance stress immunity.     

Low-temperature metal–oxide thin-film transistor technologies for implementing flexible electronic circuits and systems

Here we review two 300℃ metal–oxide(MO) thin-film transistor(TFT) technologies for the implementation of flexible electronic circuits and systems. Fluorination-enhanced TFTs for suppressing the variation and shift of turn-on voltage(VON),and dual-gate TFTs for acquiring sensor signals and modulating VON have been deployed to improve the robustness and performance of the systems in which they are deployed. Digital circuit building blocks based on fluorinated TFTs have been designed, fabricated, a...     

Conduction in titanium dioxide films and metal–TiO<Subscript>2</Subscript>–Si structures

The effect of the annealing of titanium oxide films on the electrical properties of metal–TiO₂–n-Si structures is investigated. It is shown that, regardless of the annealing temperature, the conductivity of the structures at positive gate potentials is determined by the space-charge-limited current in the insulator with traps exponentially distributed in terms of energy. At negative gate potentials, the main contribution to the current is provided by the generation of electron–hole pairs in the space-charge region in silicon. The properties of the TiO₂/n-Si interface depend on the structure and phase state of the oxide film, which are determined by the annealing temperature.     

C-AFM study on multi - resistive switching modes observed in metal–organic frameworks thin films

Metal-organic framework (MOF) materials have recently attracted much attention for use in resistive random-access memory due to the advantages of having high insulative properties, well-defined structures, a large specific surface area, and an adjustable pore size. In this study, the memory device based on zirconium (IV)-carboxylate MOF (UiO-66) nanoparticles exhibits the low operation voltage (V < 0.5 V), high ON/OFF ratio (~10⁴), excellent endurance (5 × 10² cycles), and longtime retention (10⁴ s). To clarify the resistive switching mechanism of the Ag/PVA-MOF/FTO device, conductive atomic force microscopy (C-AFM) was used. The results indicate that all of the electrode, Zr₆ clusters of UiO-66, PVA, and UiO-66 conjugation have simultaneous contributions to the resistance switching behavior. The resistive switching can be controlled either by the electron hopping process between Ag⁺ ions and Zr₆ nodes in threshold mode or the formation/rupture of the metal filaments in the bipolar switching mode. Interestingly, inherent characteristics of MOF materials, such as high porosity and large size cages (octahedral, tetrahedral), strongly influence the transport properties and switching mechanism of the device which is also discussed in detail. These resistive switching characteristics and mechanisms of UiO-66 could provide a thorough understanding for future research and application not just for UiO-66 but also for the general MOFs materials.     

Application of metal halide perovskite photodetectors

In recent years,metal halide perovskite materials have attracted wide attention in the fields of photovoltaics(PVs),light-emitting diodes(LEDs)and photodetectors(PDs)due to their excellent light absorption[1-6],adjustable bandgaps and long carrier diffusion length.Compared with commercial Si and GaN photodetectors,perovskite photodetectors(PPDs)present wider light detection range,higher sensitivity and higher external quantum efficiency(EQE)[7-9].     

Interface studies of ALD-grown metal oxide insulators on Ge and III–V semiconductors (Invited Paper)

Atomic layer deposited (ALD) HfO₂/GeO_xN_y/Ge(1 0 0) and Al₂O₃/In_0.53Ga_0.47As(1 0 0) ? 4 × 2 gate stacks were analyzed both by MOS capacitor electrical characterization and by advanced physical characterization to correlate the presence of electrically-active defects with chemical bonding across the insulator/channel interface. By controlled in situ plasma nitridation of Ge and post-ALD annealing, the capacitance-derived equivalent oxide thickness was reduced to 1.3 nm for 5 nm HfO₂ layers, and mid-gap density of interface states, D_it = 3 × 10¹¹ cm^?2 eV^?1, was obtained. In contrast to the Ge case, where an engineered interface layer greatly improves electrical characteristics, we show that ALD-Al₂O₃ deposited on the In_0.53Ga_0.47As (1 0 0) ? 4 × 2 surface after in situ thermal desorption in the ALD chamber of a protective As cap results in an atomically-abrupt and unpinned interface. By avoiding subcutaneous oxidation of the InGaAs channel during Al₂O₃ deposition, a relatively passive gate oxide/III–V interface is formed.     

Electrical properties of Ge metal–oxide–semiconductor capacitors with high-k La2O3 gate dielectric incorporated by N or/and Ti

LaON, LaTiO and LaTiON films are deposited as gate dielectrics by incorporating N or/and Ti into La2O3 using the sputtering method to fabricate Ge MOS capacitors, and the electrical properties of the devices are carefully examined. LaON/Ge capacitors exhibit the best interface quality, gate leakage property and device reliability, but a smaller k value (14.9). LaTiO/Ge capacitors exhibit a higher k value (22.7), but a deteriorated interface quality, gate leakage property and device reliability. LaTiON/Ge capacitors exhibit the highest k value (24.6), and a relatively better interface quality (3.1E11 eV^-1cm^-2), gate leakage property (3.6E3 A/cm^2 at Vg = 1 V + Vfb) and device reliability. Therefore, LaTiON is more suitable for high performance Ge MOS devices as a gate dielectric than LaON and LaTiO materials.