Double bump flip-chip assembly

Capillary underfill remains the dominate process for underfilling Hip-chip die both in packages and for direct chip attach (DCA) on printed circuit board (PCB) assemblies. Capillary underfill requires a post reflow dispense and cure operation, and the underflow time increases with increasing die area and decreasing die-to-substrate spacing. Fluxing or no-How underfills are dispensed prior to die placement and cure during the solder reflow cycle. Since filler particles in the fluxing underfill can be trapped between the solder ball and the substrate pad during placement, the filler content of fluxing underfills is typically limited to <20% or assembly yield drops dramatically. At 20% filler concentration, the coefficient of thermal expansion (CTE) of the underfill is near that of the bulk resin (50-80 ppm//spl deg/C). In this paper, a double bump Hip-chip process is described. A filled capillary underfill is coated onto a wafer and cured. The wafer is then polished to expose the solder bumps. A second solder bump is formed over the original bump by stencil printing solder paste. After dicing, the die is assembled to the PCB using unfilled fluxing underfill. In the resulting structure, the low CTE underfill is near the low CTE Si die, and the higher CTE underfill is in contact with the PCB. In addition, the standoff height is increased compared to a conventional single bump assembly. In air-to-air thermal shock tests, the double bump assembly was /spl sim/ 1.5 X more reliable than the conventional single bump construction with fluxing underfill. Modeling results are also presented.     

Study on effect of coupling agents on underfill material in flipchip packaging

Coupling agents are widely used in order to improve the adhesion property of underfill. In this study, three different silane coupling agents, two titanate coupling agents, and one zirconate coupling agent were added into an epoxy underfill material. Their effects on the flow behavior and curing profile of the epoxy underfill were studied with a rheometer and a differential scanning calorimeter, respectively. The thermal stability of the cured underfill material was studied with a thermogravimetric analyzer. A thermal mechanical analyzer and a dynamic mechanical analyzer were used to measure the coefficient of thermal expansion, the glass transition temperature (T_g), and the storage modulus (E'). In addition, the adhesion of the underfill on benzocyclobutene passivated silicon die and polyimide passivated silicon die was measured through die shear test. The effects of aging in an 85°C/85% relative humidity chamber were also studied through moisture absorption test and die shear test     

Reliability assessment and hygroswelling modeling of FCBGA with no-flow underfill

In the flip-chip ball grid array (FCBGA) assembly process, no-flow underfill has the advantage over traditional capillary-flow underfill on shorter cycle time. Reliability tests are performed on both unmolded and molded FCBGA with three different types of no-flow underfill materials. The JEDEC Level-3 (JL3) moisture preconditioning, followed by reflow and pressure cooker test (PCT) is found to be a critical test for failures of underbump metallization (UBM) opening and underfill/die delamination. In this paper, various types of modeling techniques are applied to analyze the FCBGA-8×8 mm on moisture distribution, hygroswelling behavior, and thermomechanical stress. For moisture diffusion modeling, thermal-moisture analogy is used to calculate the degree of moisture saturation in the multi-material system of FCBGA. The local moisture concentration along the critical interface, e.g. die/underfill, is critical for delamination, because the moisture weakens the interfacial adhesion strength, generates internal vapor pressure during reflow, and induces tensile hygroswelling stress on UBM during PCT. The results of moisture distribution can be used as loading input for the subsequent hygroswelling modeling. The magnitude of hygroswelling stress acting on UBM is found to be greater than the thermal stress induced during reflow, both in tensile mode which may cause the UBM-opening failure. Underfill with lower saturated moisture concentration (C_sat) and coefficient of moisture expansion (CME) are found to induce lower UBM stress and has better reliability results. Molded package generally has higher stress level than unmolded package. Parametric studies are performed to study the effects of no-flow underfill materials, package type (molded vs. unmolded), die thickness, and substrate size on the stresses of UBM during reflow and PCT.     

底部填充工艺的瞬时温度环境管理

微电子组装的大部份工艺开发都要求将元件做到更小,以便在尺寸日益缩小的便携式设备上实现更多功能。阐述了大元件的底部填充,即一侧的尺寸超过15mm,底部填充的胶量介于30～50mg。大尺寸晶元的制造工艺要求比现有生产线更大的产能,这就给底部填充点胶带来更大的挑战。大元件的产能超过3000个/h时,需要点胶机点出非常多的胶水。如此多的胶水在出胶前通过点胶阀,这将会带来加热的问题-某些工艺要求出胶前胶水必须要加热。这会对胶点尺寸有影响,因为随着温度的变化,底部填充的胶水黏度也会随之变化,从而轻微影响点出的胶量。从而将影响晶元相邻的“非沾染区”。稳定的温度是点胶稳定性的保证,并且能帮助胶水流进晶元下方同时也有助胶水分离从而更容易喷射出来。从研究中可以观察到：系统温度环境（点胶机内部）对点胶的胶水质量有影响。     

Recent advances in modeling the underfill process in flip-chip packaging

Flip-chip underfill process is a very important step in the flip-chip packaging technology because of its great impact on the reliability of the electronic devices. In this technology, underfill is used to redistribute the thermo-mechanical stress generated from the mismatch of the coefficient of thermal expansion between silicon die and organic substrate for increasing the reliability of flip-chip packaging. In this article, the models which have been used to describe the properties of underfill flow driven by capillary action are discussed. The models included apply to Newtonian and non-Newtonian behavior with and without the solder bump resistance for the purpose of understanding the behavior of underfill flow in flip-chip packaging.     

Reliability issues for flip-chip packages

In this article, we review the reliability issues for plastic flip-chip packages, which have become an enabling technology for future packaging development. The evolution of area-array interconnects with high I/O counts and power dissipation has made thermal deformation an important reliability concern for flip-chip packages. Significant advances have been made in understanding the thermo-mechanical behavior of flip-chip packages based on recent studies using moiré interferometry. Results from moiré studies are reviewed by focusing on the role of the underfill to show how it reduces the shear strains of the solder balls but shifts the reliability concern to delamination of the underfill interfaces. The development of the high-resolution moiré interferometry based on the phase-shift technique provided a powerful method for quantitative analysis of thermal deformation and strain distribution for high-density flip-chip packages. This method has been applied to study plastic flip-chip packages and the results and impacts on delamination at the die/underfill interface and in the underfill region above the plated through-hole via are discussed. Here a related reliability problem of die cracking during packaging assembly and test is also discussed. Finally, we discuss briefly two emerging reliability issues for advanced flip-chip packages, one on the packaging effect on Cu/low k interconnect reliability and the other on electromigration of solder balls in flip-chip packages.     

Underfilling fine pitch BGAs

Fine pitch BGAs and chip scale packages have been developed as an alternative to direct flip chip attachment for high-density electronics. The larger solder sphere diameter and higher standoff of CSPs and fine pitch BGAs improve thermal cycle reliability while the larger pitch relaxes wiring congestion on the printed wiring board. Fine pitch BGAs and CSPs also allow rework to replace defective devices. Thermal cycle reliability has been shown to meet many consumer application requirements. However, fine pitch BGAs and CSPs have difficulty passing mechanical shock and substrate flexing tests for portable electronics applications. The fine pitch BGA used in the study was a 10 mm package with the die wire bonded. The package substrate was bismaleimide-triazine (BT) and the solder sphere diameter was 0.56 mm. Two types of underfill were examined. The first was a fast flow, snap cure underfill. This material rapidly flows under the package and can be cured in five minutes at 165°C using an in-line convection oven. The second underfill was a thermally reworkable underfill for those applications requiring device removal and replacement. The paper discusses the assembly and rework process. In addition, liquid-to-liquid thermal shock data is presented along with mechanical shock and flexing test results     

Processing of fluxing underfills for flip chip-on-laminate assembly

Fluxing underfill eliminates process steps in the assembly of flip chip-on-laminate (FCOL) when compared to conventional capillary flow underfill processing. In the fluxing underfill process, the underfill is dispensed onto the board prior to die placement. During placement, the underfill flows in a "squeeze flow" process until the solder balls contact the pads on the board. The material properties, the dispense pattern and resulting shape, solder mask design pattern, placement force, placement speed, and hold time all impact the placement process and the potential for void formation. A design of experiments was used to optimize the placement process to minimize placement-induced voids. The major factor identified was board design, followed by placement acceleration. During the reflow cycle, the fluxing underfill provides the fluxing action required for good wetting and then cures by the end of the reflow cycle. With small, homogeneous circuit boards it is relatively easy to develop a reflow profile to achieve good solder wetting. However, with complex SMT assemblies involving components with significant thermal mass this is more challenging.     

Die cracking and reliable die design for flip-chip assemblies

Die cracking during underfill cure or thermal cycling is a cause for concern in flip-chip assemblies. In this work, an integrated process-reliability modeling methodology has been developed to determine the stresses at the backside of the die during underfill cure and subsequent thermal cycling. The predicted die stresses have been compared with experimental data, and excellent agreement is seen between the theoretical predictions and the experimental data. The modeling methodology has been used to understand the effect of material and geometry parameters such as substrate thickness, die thickness, standoff height, interconnect pitch, underfill modulus and coefficient of thermal expansion (CTE), and solder mask CTE on die stresses and thus die cracking. Based on underfill-cure and thermal cycling models for specific cases, the critical flaw size to induce catastrophic die cracking has been calculated using linear-elastic fracture mechanics. Design recommendations, including die thinning and polishing, have been made to reduce the tensile stresses on the backside of the die and thus die cracking     

倒装焊SnPb焊点热循环失效和底充胶的影响

采用实验方法,确定了倒装焊SnPb焊点的热循环寿命．采用粘塑性和粘弹性材料模式描述了SnPb焊料和底充胶的力学行为,用有限元方法模拟了SnPb焊点在热循环条件下的应力应变过程．基于计算的塑性应变范围和实验的热循环寿命,确定了倒装焊SnPb焊点热循环失效Coffin-Manson经验方程的材料参数．研究表明,有底充胶倒装焊SnPb焊点的塑性应变范围比无底充胶时明显减小,热循环寿命可提高约20倍,充胶后的焊点高度对可靠性的影响变得不明显．     

倒装焊SnPb焊点热循环失效和底充胶的影响

采用实验方法 ,确定了倒装焊 Sn Pb焊点的热循环寿命 .采用粘塑性和粘弹性材料模式描述了 Sn Pb焊料和底充胶的力学行为 ,用有限元方法模拟了 Sn Pb焊点在热循环条件下的应力应变过程 .基于计算的塑性应变范围和实验的热循环寿命 ,确定了倒装焊 Sn Pb焊点热循环失效 Coffin- Manson经验方程的材料参数 .研究表明 ,有底充胶倒装焊 Sn Pb焊点的塑性应变范围比无底充胶时明显减小 ,热循环寿命可提高约 2 0倍 ,充胶后的焊点高度对可靠性的影响变得不明显     

Dependence of Flip Chip Solder Reliability on Filler Settling

Thermomechanical reliability of solder joints in flip-chip packages is usually analyzed by assuming a homogeneous underfill ignoring the settling of filler particles. However, filler settling does impact flip chip reliability. This paper reports a numerical study of the influence of filler settling on the fatigue estimation of flip-chip solder joints. In total, nine underfill materials ( 35 vol% silica filler in three epoxies with three filler settling profiles for each epoxy) are individually introduced in a 2-D finite element (FE) model to compare the thermal response of flip chip solder joints that are surrounded by the underfill. The results show that the fatigue indicators for the solder joints (inelastic shear strain increments and inelastic shear strain energy density) corresponding to a gradual, nonuniform filler profile studied in this paper can be smaller than those associated with the uniform filler profile, suggesting that certain gradual filler settling profiles in conjunction with certain resin grades may favor a longer solder fatigue lifetime. The origin of this intriguing observation is in the fact that the solder fatigue indicators are a function of the thermal mismatch among the die, substrate, solder, and underfill materials. The thermal mechanics interplayed among these materials along with a gradual filler profile may allow for minimizing thermal mismatch; and thus lead to lower fatigue indicators.      

Reliability of microBGA assembly using no-flow underfill

In this paper, the reliability of the microBGA assembly using no-flow underfill is studied by thermal shock and bending cycle. Recently, a more promising underfill technology so-called “no-flow underfill” has been invented to cope with the limitations, which promises low cost assembly. The research results of self-alignment about no-flow underfill show that the self-alignment of microBGA using no-flow underfill is inferior to that using flux. There is residual displacement more or less in various offset volumes. Therefore, the effect of no-flow underfill on reliability of microBGA assembly needs to be investigated systematically. In this study, samples are reflowed with an optimized “rapid ramp” temperature profile, and using flux and no-flow underfill, respectively. One group of samples are subjected to thermal shock at temperature −40–125°C, and dwell time 15 min. Another group of samples is subjected to cyclic bending at a bending speed of 300 mm/min between 500 and −500 μ at the center of a microBGA package. The fatigue lifetime distribution is examined with the aid of “Weibull” method to investigate the effect of no-flow underfill on the reliability of microBGA assembly, and the failure mechanism is investigated by using the scanning electron microscope. Our experiment results show that the no-flow underfill can greatly enhance the mechanical fatigue lifetime. The underfilled material improves the stress distribution in solder joints. For assemblies with no underfills, the fracture always occurs in the outermost solder joint. The issue is improved by underfilling with no-flow underfill. However, the no-flow underfill cannot improve the thermal reliability of microBGA assembly, because the coefficient of thermal expansion (CTE) of no-flow underfill is too great at present. It is necessary to reduce the no-flow underfill CTE, so as to apply actually to BGA and CSP etc. Moreover, it is displayed that the fatigue lifetime of the residual displacement solder is less than 50% of that of the non-misaligned solder. The residual displacement is formed when the misalignment is >25% during mounting. Therefore, when the no-flow underfill is used in microBGA assembly, care must be taken to keep the mount position, and misalignment <25%.     

Guidelines to select underfills for flip chip on board assemblies and compliant interposers for chip scale package assemblies

The effect of thermomechanical properties of underfill and compliant interposer materials, such as coefficient of thermal expansion (CTE) and stiffness (Young's modulus) on reliability of flip chip on board (FCOB) and chip scale packages (CSPs) under thermal cycling stresses is investigated in this study. Quasi-three-dimensional viscoplastic stress analysis using finite element modeling (FEM) is combined with an energy partitioning (EP) model for creep-fatigue damage accumulation to predict the fatigue durability for a given thermal cycle. Parametric FEM simulations are performed for five different CTEs and five different stiffnesses of the underfill and compliant interposer materials. The creep work dissipation due to thermal cycling is estimated with quasi 3-D model, while 3-D model is used to estimate the hydrostatic stresses. To minimize the computational effort, the 3-D analysis is conducted only for the extreme values of the two parameters (CTE and stiffness) and the results are interpolated for intermediate values. The results show that the stiffness of the underfill material as well as the CTE play important role in influencing the fatigue life of FCOB assemblies. The fatigue durability increases as underfill stiffness and CTE increase. In the case of compliant interposers, the reverse is true and durability increases as interposer stiffness decreases. Furthermore, the interposer CTE affects the fatigue durability more significantly than underfill CTE, with durability increasing as CTE decreases. The eventual goal is to define the optimum design parameters of the FCOB underfill and CSP interposer, in order to maximize the fatigue endurance of the solder joints under cyclic thermal loading environments.     

FCOB器件在热循环载荷下的界面层裂研究

界面层裂是塑封半导体器件的主要失效模式之一。采用通用有限元软件MSC.MARC,研究了FCOB(基板倒装焊)器件在热循环(–55~+125℃)载荷作用下,底充胶与芯片界面的层裂问题。结果表明:底充胶与芯片界面最易出现分层,分层扩展的位置都在该界面的边缘拐角处;如果分层导致底充胶开裂,开裂的方向大约是35°。     

Comparing the Impacts of the Capillary and the Molded Underfill Process on the Reliability of the Flip-Chip BGA

In the assembly process for the conventional capillary underfill (CUF) flip-chip ball grid array (FCBGA) packaging the underfill dispensing creates bottleneck. The material property of the underfill, the dispensing pattern and the curing profile all have a significant impact on the flip-chip packaging reliability. Due to the demand for high performance in the CPU, graphics and communication market, the large die size with more integrated functions using the low-K chip must meet the reliability criteria and the high thermal dissipation. In addition, the coplanarity of the flip-chip package has become a major challenge for large die packaging. This work investigates the impact of the CUF and the novel molded underfill (MUF) processes on solder bumps, low-K chip and solder ball stress, packaging coplanarity and reliability. Compared to the conventional CUF FCBGA, the proposed MUF FCBGA packaging provides superior solder bump protection, packaging coplanarity and reliability. This strong solder bump protection and high packaging reliability is due to the low coefficient of thermal expansion and high modulus of the molding compound. According to the simulation results, the maximum stress of the solder bumps, chip and packaging coplanarity of the MUF FCBGA shows a remarkable improvement over the CUF FCBGA, by 58.3%, 8.4%, and 41.8% (66 $mu {rm m}$), respectively. The results of the present study indicates that the MUF packaging is adequate for large die sizes and large packaging sizes, especially for the low-K chip and all kinds of solder bump compositions such as eutectic tin-lead, high lead, and lead free bumps.      

An investigation on thermal reliability of underfilled PBGA solder joints

The failure mechanism, as well as cycles to failure, of two groups of PBGA samples (with/without underfill) for thermal shock in the range of -40/spl square/-125/spl square/ were presented. The experiment shows that the solder ball in the samples without underfill cracked after 500 times cycle, while no crack was found in the underfilled samples even after 2700 cycles. However, the die attach layer delaminated after 500 cycles and the PCB cracked in the underfilled samples after long time cycling. C-SAM is employed to investigate the delamination in the underfilled samples. Highly concentrated stress-strain induced by the CTE mismatch between the BGA component and the PCB, coarsened grain and two kinds of intermetallic compounds (Ni/sub 3/Sn/sub 2//NiSn/sub 4/) which formed during reflow and thermal cycling and their impact on the reliability of solder joints are discussed in this paper. The initiation of the crack and its propagation are also presented in this paper. By means of dye penetrant test, the authors reveal the distribution of microcracks in the solder ball array. In addition, this paper includes results of simulation, which further verified its conclusions.     

Package design and materials selection optimization for overmolded flip chip packaging

In overmolded flip chip (OM-FC) packaging, interface delamination-particularly at the die/underfill interface-is often expected to be a main type of failure mode. In this paper, a systematic stress analysis is performed by means of numerical simulations for the optimal design of package geometries and materials combinations. The behavior of the interfacial stresses at the die/underfill and die/mold-compound (MC) during the molding process is investigated, followed by a parametric study to examine the effects of the package geometries and materials parameters including the underfill fillet size, die thickness, die size, die standoff height, solder mask design pattern, MC used as underfill material, MC properties, etc., on the interfacial stresses. The results demonstrate that a proper selection of these parameters can mitigate the interfacial stresses, and thus is important for the reliability of the low-cost OM-FC packages.     

Parametric reliability analysis of no-underfill flip chip package

This research proposes a parametric analysis for a flip chip package with a constraint-layer structure. Previous research has shown that flip-chip type packages with organic substrates require underfill for achieving adequate reliability life. Although underfill encapsulant is needed to improve the reliability of flip chip solder joint interconnects, it will also increase the difficulty of reworkability, increase the packaging cost and decrease the manufacturing throughput. This research is based on the fact that if the thermal mismatch between the silicon die and the organic substrate could be minimized, then the reliability of the solder joint could be accordingly enhanced. This research proposes a structure using a ceramic-like material with CTE close to silicon, mounted on the backside of the substrate to constrain the thermal expansion of the organic substrate. The ceramic-like material could reduce the thermal mismatch between silicon die and substrate, thereby enhancing the reliability life of the solder joint. Furthermore, in order to achieve better reliability design of this flip chip package, a parametric analysis using finite element analysis is performed for package design. The design parameters of the flip chip package include die size, substrate size/material, and constraint-layer size/material, etc. The results show that this constraint-layer structure could make the solder joints of the package achieve the same range of reliability as the conventional underfill material. More importantly, the flip chip package without underfill material could easily solve the reworkability problem, enhance the thermal dissipation capability and also improve the manufacturing throughput     

Influence of underfill materials on the reliability of coreless flip chip package

A flip chip package was assembled by using 6-layer laminated polyimide coreless substrate, eutectic Sn37Pb solder bump, two kinds of underfill materials and Sn_3.0Ag_0.5Cu solder balls. Regarding to the yield, the peripheral solder joints were often found not to connect with the substrate due to the warpage at high temperature, modification of reflow profile was benefit to improve this issue. All the samples passed the moisture sensitive level test with a peak temperature of 260 °C and no delamination at the interface of underfill and substrate was found. In order to know the reliability of coreless flip chip package, five test items including temperature cycle test (TCT), thermal shock test (TST), highly accelerated stress test (HAST), high temperature storage test (HTST) and thermal humidity storage test (THST) were done. Both of the two underfill materials could make the samples pass the HTST and THST, however, in the case of TCT, TST and HAST, the reliability of coreless flip chip package was dominated by underfill material. A higher Young’s modules of underfill, the more die crack failures were found. Choosing a correct underfill material was the key factor for volume production of coreless flip chip package.