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本文引入符号码数组、常数数组和记数数组,前二数组用来描述增广矩阵的元素表达式,建立节点导纳方程,后一数组用来写出入度矩阵,然后根据入度矩阵产生Coates流图的全部1-因子增益。在展开行列式时利用符号代码合并同类项,消去相消项,从而得到无相消项的全符号网络函数。 相似文献
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在系统分析LDPC码编译码技术的基础上,根据无线传感器网络的应用特点,提出了LDPC码在无线传感器网络节点中的设计方案,方案采用(n,3,6)规则LDPC码,校验矩阵采用PEG-QC构造法,编码采用RU算法,译码采用Log-BP算法,并对该方案进行了MATLAB仿真,仿真结果表明了该方案的有效性. 相似文献
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本文给出了量子门的符号化表示形式,将n量子线路表示成一个控制位符号向量和一个低阶受控量子门的组合,避免了使用高维矩阵的巨大存储开销.对无循环格雷码生成算法进行扩展,提出了n元k定位二进制数生成算法.提出了快速量子仿真算法FQSA,将输入状态向量分组,用同一酉算子对各组进行矩阵向量乘积运算,从而快速产生输出状态向量.相比其他通用量子仿真算法,FQSA节省了存储空间,并具有最优的时间复杂度.仿真QFT表明,较当前最好的分治算法,FQSA极大降低了运行时间,提高了可仿真量子比特数. 相似文献
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黄汝激 《电子科学学刊(英文版)》1994,11(2):143-149
The concepts of complementary cofactor pairs, normal double-graphs and feasible torn vertex seta are introduced. By using them a decomposition theorem for first-order cofactor C(Y) is derived. Combining it with the modified double-graph method, a new decomposition analysis-modified double-graph decomposition analysis is presented for finding symbolic network functions. Its advantages are that the resultant symbolic expressions are compact and contain no cancellation terms, and its sign evaluation is very simple. 相似文献
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引入了互补余因式对、正规双图和可行撕裂点集的概念。应用它们导出了一阶余因式C(Y)的分解定理。把它与变形双图法相结合,提出了求符号网络函数的一个新的分解分析法变形双图分解分析法。它的优点是所得符号网络函数表达式紧凑而且不含对消项,并且它的符号计算很简单。 相似文献
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Performance bounds for maximum-likelihood decoding of convolutional codes over memoryless channels are commonly measured using the distance weight enumerator T(x,y), also referred to as the transfer function, of the code. This paper presents an efficient iterative method to obtain T(x,y) called the state reduction algorithm. The algorithm is a systematic technique to simplify signal flow graphs that algebraically manipulate the symbolic adjacency matrix associated with the convolutional code. Next, the algorithm is modified to compute the first few terms of the series expansion of T(1,y) and {/spl part/T(x,y)//spl part/x}/sub x=1/ (the distance spectra) without first computing the complete T(x,y). 相似文献
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Tang Baomin 《中国邮电高校学报(英文版)》1997,(2)
PerformanceEvalutionof2B1QDataEchoCancelerinDigitalSubscriberAccesNetworksManuscriptreceivedOct.12,1996TangBaomin(NanjingUniv... 相似文献
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A Symbolic Pole/Zero Extraction Methodology Based on Analysis of Circuit Time-Constants 总被引:1,自引:0,他引:1
O. Guerra J. D. Rodríguez-García F. V. Fernández A. Rodríguez-Vázquez 《Analog Integrated Circuits and Signal Processing》2002,31(2):101-118
This paper introduces a methodology for symbolic pole/zero extraction based on the formulation of the time-constant matrix of the circuits. This methodology incorporates approximation techniques specifically devoted to achieve an optimum trade-off between accuracy and complexity of the symbolic root expressions. The capability to efficiently handle even large circuits will be demonstrated through several practical circuits. 相似文献
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A new version of Self-Adjusting Output Data Compression is put forward as a method of multiple-error detection in RAM. The parity-check matrix of a linear code with suitably large code distance is used to compress RAM content. The matrix columns are essentially generated in real time from memory addresses. The reliability of the method is determined by the code distance of the parity-check matrix used for compression. A hardware realization of the method is proposed. 相似文献
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Active-RC circuits containing 2-terminal linear passive elements and ideal transistors or operational amplifiers are derived from symbolic voltage or current transfer functions by admittance matrix transformations without any prior assumption concerning circuit architecture or topology. Since the method is a reversal of symbolic circuit analysis by Gaussian elimination applied to a circuit nodal admittance matrix, it can generate all circuits using the specified elements that possess a given symbolic transfer function. The method is useful for synthesis of low-order circuits, such as those used for cascade implementation, for deriving alternative circuits with the same transfer function as an existing circuit or for realizing unusual transfer functions, as may arise, for example, where a transfer function is required that contains specific tuning parameters 相似文献
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《IEEE transactions on information theory / Professional Technical Group on Information Theory》1971,17(6):761-765
A bound and construction are presented for high-rate burst-error-correcting recurrent codes. The bound is an upper bound on the block length in terms of the total redundancy used in decoding, the redundancy per block, and the burst length. The construction uses a block-code parity-check matrix as the first block of the recurrent code parity-check matrix. For a block code it is typical to find that only a portion of the redundancy need be used to detect a burst. Any block code for which this is true can be used in the construction. The recurrent code is then related as follows to the block code from which it is constructed. 1) The recurrent code block length is the same as the block-code block length. 2) The total redundancy used in decoding the recurrent code is the same as the block-code redundancy per block. 3) The recurrent code redundancy per block is the same as the block-code redundancy required for burst detection only. 4) The recurrent code is of higher rate than the block code. 5) The recurrent code requires a guard space between bursts but otherwise corrects the same bursts as the block code. It is shown that, when certain well-known cyclic codes are used in the construction, the resulting recurrent codes are close to the upper bound. 相似文献
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在多重置换阵的基础上,提出一种适用基于网络编码的协作中继策略的结构化LDPC码构造方法.首先定义了多重置换阵的概念,提出并证明了该方阵在秩和消元等方面的重要性质;给出具体的构造步骤,构造了列重为3和围长至少为6的满秩LDPC码;分析了该LDPC码的生成矩阵,具有稀疏和结构化的特点,适用基于网络编码的协作中继系统中进行联合网络编码和迭代译码.仿真结果表明,在相同码长、2/3码率和准循环矩阵 Y 结构条件下,相比阵列LDPC码、近似双对角形式的LDPC码和三对角形式的LDPC码,新构造的LDPC码具有相对较好的译码性能. 相似文献
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F. Grasso A. Luchetta S. Manetti M.C. Piccirilli 《Analog Integrated Circuits and Signal Processing》2004,40(3):205-213
In this work symbolic methods are used for implementing a procedure for the selection of test frequencies in multifrequency parametric fault diagnosis of analog linear circuits. The proposed approach is based on the evaluation of the condition number and the norm of a sensitivity matrix of the circuit under test. This matrix is determined by exploiting the testability and ambiguity group concepts. A Test Error Index (T.E.I.) is obtained which permits to select the set of frequencies which better leads to locate parametric faults in analog linear circuits. A program implementing the proposed procedure has been realized by using symbolic techniques. Examples of application are also included. 相似文献
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Minimum-distance bounds by graph analysis 总被引:3,自引:0,他引:3
Tanner R.M. 《IEEE transactions on information theory / Professional Technical Group on Information Theory》2001,47(2):808-821
The parity-check matrix of a linear code is used to define a bipartite code constraint (Tanner) graph in which bit nodes are connected to parity-check nodes. The connectivity properties of this graph are analyzed using both local connectivity and the eigenvalues of the associated adjacency matrix. A simple lower bound on the minimum distance of the code is expressed in terms of the two largest eigenvalues. For a more powerful bound, local properties of the subgraph corresponding to a minimum-weight word in the code are used to create an optimization problem whose solution is a lower bound on the code's minimum distance. Linear programming gives one bound. The technique is illustrated by applying it to sparse block codes with parameters [7,3,4] and [42,23,6] 相似文献
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本文给出了能重建各种电磁参数的Volterra泛函方法及其中的符号运算规则和一般递推方式,为电磁逆问题提供了一种新途径,从Riccati方程出发,文中给出了一维电导率剖面的直接Volterra泛函展式,所得结果有显著的改善。 相似文献
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GPS接收机中的码分多址信号处理研究 总被引:1,自引:0,他引:1
介绍了基于码分多址信号处理的GPS(全球定位系统)接收机的算法和电路设计。GPS接收机电路的信号处理任务主要是对数字化后的基带扩频信号进行载波跟踪、解调、解扩、码跟踪,从而得到符号数据。着重讨论了GPS接收机中信号处理部分的COSTAS、码跟踪、帧同步生成电路三大模块的功能任务、原理、算法及其相应的电路设计。通过这些研究工作,可以进一步设计出当前应用日益普遍的GPS接收机电路,该电路具有功能全面、通用性好、可靠性高等特点。 相似文献