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基于算法的容错或算法容错是提高实时数字信号处理和其他大规模计算环境中并行系统可靠性的有效方案,本文讨论了一种新的具有高纠错能力的广义加权校验和编码方法,并进一步给出了快速的检测的检错纠错算法,最后讨论了新的编码方案在容错运算中的应用。 相似文献
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基于连续校验和的模拟电路并发检错与纠错技术,可以用来设计具有容错能力的模拟电路,然而,检错电路的硬件开销在实际应用中是一个不能忽略的问题,本文对此进行了研究。 相似文献
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基于商和余数的快速排序算法 总被引:2,自引:1,他引:1
谢琪 《微电子学与计算机》2002,19(7):22-23,26
文章提出了一种对任意整数都适用的基于商和余数的快速排序算法,给出了算法的描述,其时间复杂性为O(Max(n,ΔM)),只需附加约n ΔM个存储空间(其中ΔM为待排序数组关键安的变化范围)。 相似文献
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本文介绍了多相阵列FFT在星上多载波数字化分路中的应用,并针对星上处理的实时高速处理要求,提出了一种FFT的实现方案,并用一片FPGA芯片验证了其正确性和可行性。 相似文献
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采取基-4按频率抽取FFT算法,设计一种可在FPGA上实现的64点、32位长、定点复数FFT处理器.基-4堞形运算单元中采用六级流水线设计,并行处理4路输入/输出数据,能极大地提高FFT的处理速度.该设计采用VHDL描述的多个功能模块,经ModelSim对系统进行逻辑综合与时序仿真.实验证明,利用FPGA实现64点FFT,运算速度快,完全可以处理高速实时信号. 相似文献
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基于FPGA的FFT处理器设计 总被引:1,自引:0,他引:1
在OFDM系统中,调制和解调是通过FFT来实现的,FFT算法的实现是实时高速信号处理系统设计中的难点。针对FFT在OFDM通信系统中的实际应用,提出了一种切实可行的基于FPGA(现场可编程门阵列)的FFT实现方法与硬件结构。论文重点介绍FFT控制模块的设计原理,设计了一种新的FFT控制器结构,并采用Quartus对控制器做了详细的仿真研究。结果表明控制器使蝶形运算、读取数据、存储数据等操作协调一致,而且提高了系统的处理速度,在计算和数据通信间取得了平衡。 相似文献
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由于图像中相邻像素点之间具有很大的相似性,因此,图像传输时就存在包含相同信息的分组。本文提出了多级校验级联编码结构(MPCCs),并给出了基于MPCCs的图像编码传输方案。 相似文献
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Badi Guibane Belgacem Hamdi Abdellatif Mtibaa Brahim Bensalem 《International Journal of Electronics》2018,105(6):1025-1035
Offline test is essential to ensure good manufacturing quality. However, for permanent or transient faults that occur during the use of the integrated circuit in an application, an online integrated test is needed as well. This procedure should ensure the detection and possibly the correction or the masking of these faults. This requirement of self-correction is sometimes necessary, especially in critical applications that require high security such as automotive, space or biomedical applications. We propose a fault-tolerant design for analogue and mixed-signal design complementary metal oxide (CMOS) circuits based on the quiescent current supply (IDDQ) testing. A defect can cause an increase in current consumption. IDDQ testing technique is based on the measurement of power supply current to distinguish between functional and failed circuits. The technique has been an effective testing method for detecting physical defects such as gate-oxide shorts, floating gates (open) and bridging defects in CMOS integrated circuits. An architecture called BICS (Built In Current Sensor) is used for monitoring the supply current (IDDQ) of the connected integrated circuit. If the measured current is not within the normal range, a defect is signalled and the system switches connection from the defective to a functional integrated circuit. The fault-tolerant technique is composed essentially by a double mirror built-in current sensor, allowing the detection of abnormal current consumption and blocks allowing the connection to redundant circuits, if a defect occurs. Spices simulations are performed to valid the proposed design. 相似文献
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电力电子电路容错控制研究 总被引:1,自引:0,他引:1
与电力电子电路的传统开关函数模型相比,由于混合逻辑动态(MLD)模型同时包含电路的控制变迁和条件变迁,因而MLD模型更能精确的反应电路的变化过程。这里建立了电力电子电路的MLD模型,考虑到MLD模型中包含离散变量,传统控制方法不再适用,因而将辅助逻辑变量和辅助连续变量引入模型预测控制(MPC),研究了基于MLD模型和MPC的电力电子电路容错控制及其实现步骤。该方法具有实现简单、容错性能良好、通用性较强的优点。以三相四桥臂逆变电路的容错控制为例验证了该方法的可行性和有效性。 相似文献
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Fault tolerant VLSI systems 总被引:1,自引:0,他引:1
Peercy M. Banerjee P. 《Proceedings of the IEEE. Institute of Electrical and Electronics Engineers》1993,81(5):745-758
A wide variety of fault tolerance techniques for VLSI technology are examined. Device-, gate-, and function-levels fault models are described. The basic methods available to the designer of fault tolerance measures are introduced by surveying redundancy techniques. Techniques of fault detection that use space, time, and information redundancies, algorithm-based fault tolerance, in VLSI components, large-scale processor-level implementations of fault detection, fault tolerance in automated VLSI production systems are discussed. Reconfiguration of the system and recovery of system operation are described. Issues relating to the reconfiguration after discovery of a fault in fabrication or in operation are discussed. Recovery capabilities of a VLSI microprocessor are reviewed 相似文献
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传统雷达目标检测方法一般将单个距离单元的目标当成单目标进行检测,而不会估计距离单元内目标的数量。针对该研究空缺,提出一种基于深度残差网络的雷达目标数量估计方法。该方法将雷达信号转换成时频图并输入至训练好的深度残差网络。残差网络根据单个目标与多个目标对应时频图的差异即可准确得到雷达目标数量的估计值。仿真表明该方法能有效地估计出雷达目标数量。 相似文献
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In computer networks with decentralized control, it is necessary to provide a distributed query mechanism, whereby a node can dynamically discover the location of a remote resource. The authors propose a query mechanism based on flooding with feedback, which uses no more than two messages over any link. They examine the fault tolerant aspects of this distributed query mechanism, operating in a network where links and nodes may fail and show that, under certain conditions, the resource is indeed found. They then construct enhancements to this mechanism, where the conditions under which the resource is found are substantially relaxed, at the cost of some increase in message complexity 相似文献
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A new technique for applying fault tolerance to modulus replication RNS computations by adding redundancy to the independent computational channels is introduced. This technique provides a low-overhead solution to fault tolerant large inner product computations 相似文献
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随着信息技术的发展,计算机服务器系统在我国的得到了非常广泛的应用,小到中小企业,大到电力、国防、卫生等重点行业都离不开计算机服务器系统提供7*24小时不间断的工作。因此,一旦计算机服务器系统发生故障,就可能会带来巨大的经济损失。基于此,本文对计算机服务器系统的容错技术进行了探讨。 相似文献
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随着芯片面积的增加及电路复杂性的增强,芯片的成品率逐渐下降,为了保证合理的成品率,人们将容错技术结合入了集成电路。文中首先概述了缺陷及其分布,然后概述了容错技术,并详细地叙述了动态容错技术中的两个关键问题:故障诊断及冗余单元的分配问题。 相似文献