Modeling of laser-annealed polysilicon TFT characteristics

A model based on two-dimensional (2-D) simulation, for a polysilicon thin-film transistor (poly-Si TFT) with large grains, fabricated in laser recrystallized material, is presented. The importance of differentiating between the density of states of traps within grains and traps localized at grain boundaries is demonstrated. It is shown that the observed lack of saturation in the TFT output characteristics arises due to the effect of high interface trap density within the grain boundaries, whereas the subthreshold slope has a strong dependence on the trap density within the grains. Only by differentiating in this way between grain and grain boundary parameters can both output and subthreshold characteristics of an n-channel poly-Si TFT be accurately modeled using the same set of parameters. Appropriate values for the density of states in both grains and grain boundaries are suggested for laser-annealed TFTs     

Nonlinear and dynamic properties of charge transport in polycrystalline silicon under optical illumination

Nonlinear and dynamic properties of the photocurrent in polycrystalline silicon (polysilicon) are studied theoretically. The admittance of the photoexcited polysilicon is calculated as a function of frequency, DC bias, and illumination level. Application of the theory to the spectroscopy of interface states at grain boundaries is considered. The possibility of determining the recombination current density at grain boundaries by measuring the nonlinear photocurrent and photoadmittance is demonstrated.     

On-current modeling of large-grain polycrystalline siliconthin-film transistors

Large-grain excimer laser-annealed polysilicon TFTs are studied. Due to the large grain size of the polysilicon film (about 2.5 μm), we propose a model for the on-current (above threshold voltage) taking into account the number of grain boundaries within the channel. This linear-region model considers grain and grain boundaries as two noncorrelated regions within the channel of a polysilicon TFT. The trap density at the grain boundaries and the device parameters involved in this model are determined by fitting the experimental transfer characteristic in the linear regime. Moreover, we show that the proposed model provides reliable results within a temperature range from 150 K to 300 K. Finally, it serves to optimize the energy density of laser annealing and to make predictions about polysilicon TFT technology, since TFTs performances versus grain size plots can be obtained     

Influence of polysilicon film thickness on radiation response of advanced excimer laser annealed polycrystalline silicon thin film transistors

This paper presents results of gamma irradiation effects in advanced excimer laser annealed polysilicon thin film transistors realized in polysilicon films having different thicknesses. It is shown that the thickness of polysilicon film has a strong influence on the degradation level of electrical parameters of irradiated thin film transistors, offering a possibility for optimization of these devices with the purpose to increase their reliability. The analysis was performed by monitoring of important electrical parameters, as well as of the density of irradiation induced oxide trapped charge and interface traps at the oxide–polysilicon interface, and the density of polysilicon grain boundary traps in the channel region of the transistors.     

Physical Model for the Resistivity and Temperature Coefficient of Resistivity in Heavily Doped Polysilicon

One of the key benefits of using polysilicon as the material for resistors and piezoresistors is that the temperature coefficient of resistivity (TCR) can be tailored to be negative, zero, or positive by adjusting the doping concentration. This paper focuses on optimization of the boron doping of low-pressure chemical vapor deposited polysilicon resistors for obtaining near-zero TCR and development of a physical model that explains quantitatively all the results obtained in the optimization experiments encompassing the doping concentration ranges that show negative, near-zero, and positive TCR values in the polysilicon resistors. The proposed model considers single-crystal silicon grain in equilibrium with amorphous silicon grain boundary. The grain boundary carrier concentration is calculated considering exponential band tails in the density of states for amorphous silicon in the grain boundaries. Comparison of the results from the model shows excellent agreement with the measured values of resistivity as well as TCR for heavily doped polysilicon. It is shown that the trap density for holes in the grain boundary increases as the square root of the doping concentration, which is consistent with the defect compensation model of doping in the amorphous silicon grain boundaries.     

Subthreshold behavior of thin-film LPCVD PolySilicon MOSFET's

A physical model that characterizes the subthreshold drain current (gate-voltage swing) and the threshold voltage of thin-film LPCVD polysilicon MOSFET's is developed and supported experimentally. The model describes the influence of the grain boundaries and of the charge coupling between the front and back gates on the subthreshold behavior. Main predictions are that the gate-voltage swing depends strongly on grain-boundary properties but weakly on the charge-coupling effects, that the threshold voltage depends strongly on grain-boundary properties and charge-coupling effects, and that the charge-coupling effects diminish as the grain-boundary trap density, the thickness of the film, or the doping density in the film increases. Comparisons of model predictions and measured data for passivated (hydrogenated) and unpassivated devices indicate quantitatively how hydrogenation reduces the trap density and increases the carrier mobility in the channel.     

Characterization of phosphorus implanted low pressure chemical vapor deposited polycrystalline silicon

Thin (3000–5000Å) low pressure chemically vapor deposited (LPCVD) films of polycrystalline silicon suitable for microelectronics applications have been deposited from silane at 600°C and at a pressure of 0.25 Torr. The films were phosphorus implanted at 150 KeV and electrically characterized with the annealing conditions and film thickness as parameters, over a resistivity range of four orders of magnitude (10³–10⁷Ω/□). Annealing during silox deposition was found to result in a lower film resistivity than annealing done in nitrogen atmosphere. Resistivity measurements as a function of temperature indicate that the electrical activation energy is a linear function of 1/N(N is the doping concentration), changing from 0.056 eV for a doping concentration of 8.9 × 10¹⁸ cm⁻³ to 0.310 eV for doping concentration of 3.3 × 10¹⁸ cm⁻³. The grain boundary trap density was found to have a logarithmically decreasing dependence on the polysilicon thickness, decreasing from 1.3 × 10¹³ cm⁻² for 2850Å polysilicon film to 8.3 × 10¹² cm⁻² for 4500Å polysilicon film.     

A current conduction mechanism in laser recrystallized silicon metal-oxide-semiconductor transistors

Laser recrystallization is a method used for improving the quality of deposited silicon films by enlarging the grain sizes and reducing the density of defect states in the films. N-channel MOS transistors were fabricated on silicon films that had been recrystallized by an argon ion laser at different power levels. These transistors showed electrical characteristics similar, but somewhat inferior to those devices fabricated on single crystal silicon substrates. These differences are attributed to the presence of trapping states at the grain boundaries of the crystallites in the recrystallized silicon. A coulombic scattering model is presented to explain these differences. In the case of films annealed at low laser power, an additional factor of nonuniform trap state distribution is invoked to explain device characteristics. This model provides an adequate explanation for the observed transport properties of transistors fabricated from recrystallized silicon films.     

多晶硅薄膜晶体管亚阈值区准二维模型(英文)

从准二维泊松方程出发,结合多晶硅扩散和热发射载流子输运理论,建立了多晶硅薄膜晶体管亚阈值电流模型。由表面势方程及亚阈值电流方程求得包含陷阱态和晶粒尺寸的亚阈值斜率解析表达式。模型具有简明的表达式,并且在大晶粒和低陷阱态情形下可简化为传统长沟道MOSFET亚阈值区模型。仿真结果与试验数据符合得很好,验证了模型的正确性。     

Tunnel oxide prepared by thermal oxidation of thin polysilicon filmon silicon (TOPS)

A textured tunnel oxide, TOPS, prepared by thermally oxidizing a thin polysilicon film on a Si substrate is reported. Due to the rapid diffusion of oxygen through the grain boundaries of the thin polysilicon into Si substrate and the enhanced oxidation rate at the grain boundaries, a textured Si-SiO₂ interface is obtained. The textured interface results in localized high fields and enhances electron injection into TOPS. TOPS exhibits a higher electron injection efficiency, a better immunity to the electron trapping and interface state generation under high-field operation, and a higher asymmetric injection polarity than the normal oxide     

The Effect of the Microstructure on Trap‐Assisted Recombination and Light Soaking Phenomenon in Hybrid Perovskite Solar Cells

Despite the rich experience gained in controlling the microstructure of perovskite films over the past several years, little is known about how the microstructure affects the device properties of perovskite solar cells (HPSCs). In this work, the effects of the perovskite film microstructure on the charge recombination and light‐soaking phenomenon in mixed halide HPSCs are investigated. Devices with noncompact perovskite morphology show a severe light soaking effect, with the power conversion efficiency (PCE) improved from 3.7% to 11.6% after light soaking. Devices with compact perovskite morphology show a negligible light soaking effect, with PCE slightly increased from 11.4% to 11.9% after light soaking. From device investigations, photoluminescence, and impedance spectroscopy measurements, it is demonstrated that interface electron traps at the grain boundaries as well as at the crystal surface dominate the light soaking effect. Severe trap‐assisted recombination takes place in HPSCs using noncompact films, while it is effectively eliminated in devices with compact films. Moreover, how the grain size of the perovskite film affects the light soaking phenomenon is investigated. In the case of compact perovskite films, the size of the grains has a limited effect on the light soaking. In these compact films, grains are fused and trap states are effectively reduced.     

Performance and reliability of SLS ELA polysilicon TFTs fabricated with novel crystallization techniques

SLS ELA polysilicon TFTs fabricated in films crystallized with several novel techniques, yielding different film microstructure and texture, were investigated. The parameter statistics indicate that the TFT performance depends on film quality and asperities, in conjunction with the grain boundary trap density. The drain current transients, upon TFT switch from OFF to ON state, showed gate oxide polarization, related to film asperities and also confirmed the presence of extended defects in the TFTs of small mobilities. DC hot carrier stress was applied, indicating a reliability dependence on polysilicon structure and differences in degradation mechanisms for the various TFT technologies.     

Electrical properties of uncontaminated PbTe films on mica substrates prepared by molecular beam deposition

Uncontaminated PbTe films were prepared by molecular beam deposition under clean conditions in a uhv environment and the film properties were measured in situ. The carrier concentration was found to be determined by source conditions and values between 10¹⁶ cm^?3 (intrinsic level) and n = 5 × 10¹⁸cm^?3 could be obtained in a controllable manner. A low temperature anneal enabled bulk value Hall mobilities (1750 cm² V^?1 sec^?1 at 300 K) to be obtained at room temperature and above which indicated that surface scattering in the films was predominantly specular. The mobility at low temperatures (down to 100 K) was limited by small potential barriers located at the double-positioned grain boundaries which were present in the film. Field effect measurements indicated the potential barriers arose from a continuous distribution of band gap states situated in the grain boundaries. These states had a fairly uniform density (? 10¹²cm^?2 (kT)^?1) but there was some increase towards the conduction band edge. They also limited the field effect mobility (μ_FE) to ?0.5 bulk value, giving μ_FE ? 800cm² (volt sec)^?1 for films with carr concentrations above 5 × 10¹⁷ cm^?3. By exposure to low pressures of oxygen the carrier concentrations in annealed n-type films could be reduced to near intrinsic values with no associated degradation in the electrical properties. This indicated that the films were not compensated with the native p-type defect.     

Electrical measurements on ion-implanted LPCVD polycrystalline silicon films

The electrical conduction properties of ion implanted polycrystalline silicon films have been studied. The polysilicon films were deposited by pyrolysis of silane at 647°C in LPCVD system onto oxide-coated silicon wafers to a thickness of 0.6 μm. Dopants were itroducd by implanting with boron or phosphorus ions, accelerated to 145 keV; doses ranged from 1 × 10¹² cm^?2 to 1 × 10¹⁵ cm^?2. Film resistivities spanning 8 orders of magnitude were obtained using this doping range. Current-voltage characteristics of polysilicon resistors were measured at temperatures ranging from 24 to 140°C. The associated barrier heights and activation energies were derived. The grain-boundary trapping states density was estimated to be 5 × 10¹² cm^?2. We found that both dopant atom segregation and carrier trapping at the grain boundaries play important roles in polysilicon electrical conduction properties. However, within the dose range studies, the dopant atom segragation is most detrimental to the film conductivity for doses < 1 × 10¹³ cm^?2; as the dose is increased, carrier trapping effects become more pronounced for doses up to 5 × 10¹⁴ cm^?2. For doses ? 5 × 10¹⁴ cm^?2, conduction due to carriers tunneling through the potential barriers at grain boundaries has to be considered.     

Correlation between infrared transmission spectra and the interface trap density of SiO2 films

This work is an attempt to estimate the electrical properties of SiO₂ thin films by recording and analyzing their infrared transmission spectra. In order to study a big variety of films having different infrared and electrical properties, we studied SiO₂ films prepared by low pressure chemical vapor deposition (LPCVD) from SiH₄ + O₂ mixtures at 425 °C and annealed at 750 °C and 950 °C for 30 min. In addition thermally grown gate quality SiO₂ films of similar thickness were studied in order to compare their infrared and electrical properties with the LPCVD oxides. It was found that all studied SiO₂ films have two groups of Si–O–Si bridges. The first group corresponds to bridges located in the bulk of the film and far away from the interfaces, the grain boundaries and defects and the second group corresponds to all other bridges located near the interfaces, the grain boundaries and defects. The relative population of the bulk over the boundary bridges was found equal to 0.60 for the LPCVD film after deposition and increased to 4.0 for the LPCVD films after annealing at 950 °C. Thermally grown SiO₂ films at 950 °C were found to have a relative population of Si–O–Si bridges equal to 3.9. The interface trap density of the LPCVD film after deposition was found equal to 5.47 × 10¹² eV⁻¹ cm⁻² and decreases to 6.50 × 10¹⁰ eV⁻¹ cm⁻² after annealing at 950 °C for 30 min. The interface trap density of the thermally grown film was found equal to 1.27 × 10¹¹ eV⁻¹ cm⁻² showing that films with similar Si–O–Si bridge populations calculated from the FTIR analysis have similar interface trap densities.     

PLhenomenological model of grain-boundary trapping states in polycrystalline silicon under optical illumination

We have developed a new phenomenological model of grain boundary (GB) recombination, carrier transport and electrostatics under assumptions of Gaussian energy distributions of GB interface states, and unequal capture cross-sections of these GB states for electrons and holes in polycrystalline materials. Calculations have been performed of the recombination current density and the recombination velocity at grain boundaries in polycrystalline silicon for four different energy distributions. The results indicated that the recombination velocity at the grain boundary strongly depends on the location of the trap energy level. The assumption of GB interface states with a discrete (δ-function) distribution has been found to be inappropriate.     

Characterization of thin textured tunnel oxide prepared by thermaloxidation of thin polysilicon film on silicon

In this paper, the characteristics of thin textured tunnel oxide prepared by thermal oxidation of thin polysilicon film on Si substrate (TOPS) are studied. Because of the rapid diffusion of oxygen through the grain boundaries of the thin polysilicon film into the Si substrate and the enhanced oxidation rate at the grain boundaries, the oxidation rate of the TOPS sample is close to that of a normal oxide grown on a (111) Si substrate. Also, a textured Si/SiO₂ interface is obtained. The textured Si/SiO₂ interface results in localized high fields and causes a much higher electron injection rate. The optimum TOPS sample can be obtained by properly oxidizing the stacked α-Si film, independent of the substrate doping level. Also, the optimum TOPS sample exhibits a smaller electron trapping rate and a lower interface state generation rate when compared to the sample from a standard tunnel oxide process. These differences are attributed to a lower bulk electric field and a smaller injection area in the TOPS samples     

Grain boundary mediated leakage current in polycrystalline HfO2 films

In this work, we combine conductive atomic force microscopy (CAFM) and first principles calculations to investigate leakage current in thin polycrystalline HfO₂ films. A clear correlation between the presence of grain boundaries and increased leakage current through the film is demonstrated. The effect is a result of a number of related factors, including local reduction in the oxide film thickness near grain boundaries, the intrinsic electronic properties of grain boundaries which enhance direct tunnelling relative to the bulk, and segregation of oxygen vacancy defects which increase trap assisted tunnelling currents. These results highlight the important role of grain boundaries in determining the electrical properties of polycrystalline HfO₂ films with relevance to applications in advanced logic and memory devices.     

Subthreshold properties of TFTs with laser-crystallized laterally grown polysilicon layers

Trap-density analysis of laterally grown polysilicon films formed by continuous-wave laser revealed the main factor that controls the subthreshold property of low-temperature polysilicon thin-film transistors. In the low-current region, traps at the gate oxide/polysilicon interface are charged and the consequent insensitiveness of polysilicon surface potential to gate bias dominates the subthreshold property. In the higher current region, that is, close to the threshold voltage, a transport mechanism in which carriers are scattered at the grain boundaries becomes the dominant factor governing the subthreshold property.     

多晶硅薄膜压阻系数的理论研究

利用应力退耦模型,分别对多晶硅薄膜晶粒中性区和晶界势垒区的压阻系数进行了理论分析,并推导出多晶硅压阻系数的表达式.实验结果表明,利用文中推导出的理论公式所获得的计算值与实验测量结果基本符合,所给出的有关多晶硅压阻系数的理论结果可以作为多晶硅特性分析的理论依据.