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1.
赵峰  张云 《激光技术》1995,19(1):14-18
本文首先分析了在超大规模集成电路中电互连所遇到的困难,讨论了光学互连的优点。然后,总结了各种光互连,包括导波光互连和自由空间光互连的最近进展,最后分析了光互连研究中所遇到的困难以及相应的解决办法。  相似文献   

2.
阐述了近年所从事的计算机光互连研究:并行机内点到点的光互连系统解决了光互连的可行性问题。用于计算机集群(Cluster)系统计算机总线间的并行互连网络。正在研究波长寻址光互连以解决互连网络的交换延迟问题。  相似文献   

3.
徐勇放  黄培中 《混合微电子技术》1999,10(2):139-142,F003
高性能的电子系统中,其内部互连网络所产生的影响对系统性能的作用表现得尤为明显。随着系统集成朝着更大规模的方向发展,电子系统内部电路的互连延迟已经成为限制其发展的主要障碍之一。光互连技术以其独特的传输性质对克服电互连产生的问题有较好的针对性。本文介绍了几种光学互连方式以及采用光互连方式的光电子多芯片组件。  相似文献   

4.
超级计算机作为第三科研方法,得到了广泛的应用。本文通过对集成电路.光技术和MPP互连网络技术发展的分析,提出以光互连与电互连结合的三层互连网络实现MPP机互连,并对光互连网终实现作详细地描述。  相似文献   

5.
计算机光互连中的信息处理技术   总被引:3,自引:0,他引:3  
本文介绍了计算机光互连的分类及特点。讨论了实现光互连的物理依据和光互连的主要技术指标。分析了光学空间光调制器互连结构中的信息处理技术,光纤互连网络中的信息处理技术。在光纤互连网络技术中介绍了本研究所已取得的处理器阵列中的并行光互连处理持极同群系统光互连链路的并行接口处理技术的部分成果。  相似文献   

6.
光互连研究进展   总被引:1,自引:0,他引:1  
光互连在高度并行、高速、大容量的数字系统和智能计算等领域显示了卓越的潜能。文章首先比较了在超大规模集成系统(VLSI)中光互连和电互连的优劣,总结了各种类的光互连及近年取得的新进展,并分析了光互连遇到的困难和未来前景。  相似文献   

7.
随着集成电路技术的发展,单个芯片上核的数目不断增加,多核将成为芯片体系架构的未来发展趋势。核间的互连成为芯片设计中的一个关键技术。传统的片上电互连在带宽、时延、能耗和可靠性等方面都面临挑战,光互连可以很好地解决这些问题。本文对现有片上光互连的集成光电子器件发展进行了综述,在此基础上研究了一个典型的多核光互连系统,对网络结构、节点组成和通信过程等逐一进行了分析。结果表明,光互连是未来多核系统的有效互连方式。  相似文献   

8.
计算机光互连技术的应用前景   总被引:1,自引:0,他引:1  
"光互连"是利用光的波粒二相性与物质相互作用产生的各种现象实现数据,信号传输和交换的理论和技术.简述了其特点、国内外发展概况,物理依据,技术特性以及超型计算机光互连的必要性和可行性.讨论了光互连的若干前沿技术:微机电系统光互连、多级电控全息交叉互连、空分-波分复用联合的广播和选择交换系统在超型机或机群系统中的应用.  相似文献   

9.
介绍了波导光互连的研究现状及发展趋势.波导光互连研究主要包括波导结构的成形、微反光镜的制作、功能结构的设计以及可靠性测试,应用前景广阔,是今后几年光互连技术的研究重点之一.然而波导光互连也面临着很大的挑战:廉价材料和工艺的选择,性能与可靠性的完善,互连密度的提高与可靠性的协调,3D封装以及标准化与产业化等.  相似文献   

10.
风挺 《半导体光电》1991,12(2):114-118
为克服光通信、电子计算技术等的速度限制,采用光互连是一种有效途径。光互连也是光计算机的基本技术。文中对光互连技术进行了分析,并介绍了一种有利于光互连的最理想光源——面发射激光二极管。  相似文献   

11.
本文首次利用MEI方法计算了多层介质多导体互连的电容和电感矩阵.由于引入了测试环的概念,避免了多层结构的格林函数的推导和Sommerfeld积分的计算,同时也去掉了传统MEI方法中MEI系数与几何形状有关的假设.计算结果表明:本文提出的算法正确,与常见的算法如矩量法,边界元法和有限元法等方法相比,计算速度大大加快,并且对结构的适应性强,可以分析截面为任意形状且导体有耗的互连,因此该方法是一种提取电磁参数的快速算法.在计算得到的电容和电感矩阵的基础上,本文还利用双重波形收敛法计算了端接非线性负载的多导体互连各端口的瞬态响应.  相似文献   

12.
The use of optical interconnections between processors, boards, chips, and gates in electronic digital systems to overcome the current performance limitations is described. The advantages of optical interconnections in relation to the interconnection distance, the data capacity, and the interconnection functions are presented. The devices which will support practical implementation of optical interconnections and the integration of optical interconnection devices are discussed. The development of future integrated optoelectronic materials, processing, and fabrication technologies to support integrated optical electronics is also discussed  相似文献   

13.
为了适应21世纪高度信息化社会的需要,解决目前电子系统中电互连和信息处理技术带来的局限,光互连与光计算已成为跨世纪引人注目的话题,文中介绍光互连的特点,功能.形式,以及在光计算机和光神经网络中的作用。  相似文献   

14.
This paper explores design options for planar optical interconnections integrated onto boards, discusses fabrication options for both beam turning and embedded interconnections to optoelectronic devices, describes integration processes for creating embedded planar optical interconnections, and discusses measurement results for a number of integration schemes that have been demonstrated by the authors. In the area of optical interconnections with beams coupled to and from the board, the topics covered include integrated metal-coated polymer mirrors and volume holographic gratings for optical beam turning perpendicular to the board. Optical interconnections that utilize active thin film (approximately 1-5 /spl mu/m thick) optoelectronic components embedded in the board are also discussed, using both Si and high temperature FR-4 substrates. Both direct and evanescent coupling of optical signals into and out of the waveguide are discussed using embedded optical lasers and photodetectors.  相似文献   

15.
Since optical interconnections can severely reduce problems associated with electrical interconnect technology (including bandwidth limitations, electromagnetic cross talk, signal delay and EMI aspects), the development of suitable electrooptic components is of crucial importance for implementation of optical interconnects in future computer systems. This paper addresses the design, modeling, fabrication as well as experimental assessment of LED-arrays, with diffractive lenses etched into the rear side of the LED-substrate. The suitability of such optical sources for board-to-board optical interconnections will be demonstrated  相似文献   

16.
Optical chip-to-chip communication is a promising technology that can mitigate some of the performance short-comings of electrical interconnections, especially bandwidth. Moreover, future high-performance chips are projected to drain hundreds of amperes of supply current. To this end, it is important to develop a high-density and high-performance integrated electrical and optical chip I/O interconnection technology. We describe sea of polymer pillars (or polymer pins), which enables the simultaneous batch fabrication of electrical and optical I/O interconnections at the wafer-level. The electrical and optical I/O interconnections are designed to be laterally compliant to minimize the stresses on the die's low-k dielectric as well as to maintain optical alignment between the coefficient of thermal expansion (CTE)-mismatched board and die during thermal cycling. We demonstrate the fabrication and mechanical performance of various size and aspect ratio electrical and optical polymer pillars. We also describe methods of fabricating polymer pillars with nonflat tip surface area for optical interconnection.  相似文献   

17.
Future computers will need to incorporate the parallelism of optical interconnections in order to achieve projected performance within reasonable size, power and speed constraints. This is necessary since optical interconnections have advantages in size, power, and speed over “long” distance communication. These features make optical interconnects ideal for inter-module connections in multichip module systems. Free-space optical interconnection can be one form of optical interconnections. Computer generated holograms (CGHs) are extremely attractive optical components for use in free space optical interconnections due to their ability to be computer designed. We will show that the fabrication limitations of CGHs for general interconnection networks require the need for placement algorithms for large processing element (PEs) arrays. In this paper, we will demonstrate that these fundamental CGH fabrication limitations greatly influence the computer aided design of optoelectronic interconnect networks that utilize CGHs for optical interconnections. Specifically, we show that the minimum feature size directly affects the logical placement of processing elements. Various physical models for free-space optical interconnects in parallel optoelectronic MCM systems are then identified from which we derive several logical models for analysis. We then analyze these cases and present algorithms to solve the associated layout problems. Design examples are given to illustrate the benefits of utilizing these placement algorithms in real optoelectronic interconnection networks  相似文献   

18.
A parallel digital optical cellular image processor (DOCIP) functionally comprises an array of identical I-bit processing elements or cells, a fixed interconnection network, and a control unit. Four interconnection network topologies are described, and include two variants of a mesh-connected array and two variants of a cellular hypercube network. The instruction sets of these single-instruction multiple-data (SIMD) machines are based on a mathematical morphological theory, binary image algebra (BIA), which provide an inherently parallel programming structure for their control. Physically, a DOCIP architecture uses a holographic optical element in a 3D free-space optical system to implement off-chip interconnections, and an optoelectronic spatial light modulator to implement a 2D array of nonlinear processing elements and (optionally) local on-chip interconnections. Two examples are given. The first, an experimental implementation of a single 54-gate cell of the DOCIP, uses an optically recorded hologram for within-cell optical interconnections, and a spatial light modulator for a 2D array of optically accessible gates. The second, a design for an efficient and more manufacturable architecture, uses a computer-generated diffractive optical element for cell-to-cell interconnections, and a 20 smart-pixel array of DOCIP cells, each cell having electronic logic and optical input/output  相似文献   

19.
A compact 10-Gb/s $times$ 12-channel optical transmitter was developed for very short-reach optical interconnections. The 10-Gb/s/ch operations were achieved without employing the heat pipes or heat sinks typically required to keep vertical-cavity surface-emitting lasers at a low temperature under 85 $^{circ}$C. Alumina ceramic substrates with high heat dissipation capability are incorporated in order to maintain the low temperature operation. The optical transmitter is designed to be as compact as a standard mechanically transferable (MT) optical connector. To enhance usability, the transmitter can be directly connected with the MT-type optical connector with guide pins assembled in the alumina substrate. The compactness and usability of the optical module is effective in intrabox and interbox optical interconnections.   相似文献   

20.
Polymer multilayer optical interconnections have gained interest over the past few years in view of their ability to increase the integration density, increase the routing flexibility, and make full use of the characteristics of 2D optoelectronic elements. The alignment between the functional elements in the different optical layers has to be sufficiently accurate in ensuring a high overall efficiency of the system. Numerical simulations have been used as a tool to determine whether laser ablation can be used as an alternative technology for the structuring of the functional elements of optical interconnections into a polymer optical layer. The experimentally achievable alignment accuracies are compared to tolerance ranges for an excess loss les 1 dB obtained from the numerical study. The experimental achievements show that the alignment accuracies fall within the numerical tolerance ranges and have a good reproducibility. Experimental realizations of a two-layer multimode waveguide and inter- and out-of-plane- coupling structures are discussed and shown.  相似文献   

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