共查询到20条相似文献,搜索用时 46 毫秒
1.
Metze G.M. Bass J.F. Lee T.T. Cornfeld A.B. Singer J.L. Hung H.-L. Huang H.C. Pande K.P. 《Electron Device Letters, IEEE》1990,11(1):24-26
State-of-the-art, 60-GHz, low-noise MMICs based on pseudomorphic modulation-doped FETs, with 0.25-μm×60-μm gates offset 0.3 μm from the source ohmic, are discussed. Single-state low-noise amplifiers (LNAs) exhibited minimum noise figures of 2.90 dB with 4.1 dB of associated gain at 59.25 GHz. Dual-state MMICs had minimum noise figures of 3.5 dB and 10.8 dB of associated gain at 58.50 GHz. Cascaded four-stage LNAs (two dual-stage MMICs) had minimum noise figures of 3.7 dB and over 20.7 dB of associated gain at 58.0 GHz. Finally, when biased for maximum gain, the four-stage amplifier exhibited over 30.4 dB of gain at 60.0 GHz 相似文献
2.
Onodera K. Nishimura K. Aoyama S. Sugitani S. Yamane Y. Hirano M. 《Electron Devices, IEEE Transactions on》1999,46(2):310-319
Fully ion-implanted low-noise GaAs MESFETs with a 0.11-μm Au/WSiN T-shaped gate have been successfully developed for applications in monolithic microwave and millimeter-wave integrated circuits (MMICs). In order to reduce the gate resistance, a wide Au gate head made of a first-level interconnect is employed. As the wide gate head results in parasitic capacitance, the relation between the gate head length (Lh) and the device performance is examined. The gate resistance is also precisely calculated using the cold FET technique and Mahon and Anhold's method. A current gain cutoff frequency (fT) and a maximum stable gain (MSG) decrease monotonously as Lh increases on account of parasitic capacitance. However, the device with Lh of 1.0 μm, which has lower gate resistance than 1.0 Ω, exhibits a noise figure of 0.78 dB with an associated gain of 8.7 dB at an operating frequency of 26 GHz. The measured noise figure is comparable to that of GaAs-based HEMT's 相似文献
3.
Hwang K.C. Chao P.C. Creamer C. Nichols K.B. Wang S. Tu D. Kong W. Dugas D. Patton G. 《Electron Device Letters, IEEE》1999,20(11):551-553
We report the first demonstration of W-band metamorphic HEMTs/LNA MMICs using an AlGaAsSb lattice strain relief buffer layer on a GaAs substrate. 0.1×50 μm low-noise devices have shown typical extrinsic transconductance of 850 mS/mm with high maximum drain current of 700 mA/mm and gate-drain breakdown voltage of 4.5 V. Small-signal S-parameter measurements performed on the 0.1-μm devices exhibited an excellent fT of 225 GHz and maximum stable gain (MSG) of 12.9 dB at 60 GHz and 10.4 dB at 110 GHz. The three-stage W-band LNA MMIC exhibits 4.2 dB noise figure with 18 dB gain at 82 GHz and 4.8 dB noise figure with 14 dB gain at 89 GHz, The gain and noise performance of the metamorphic HEMT technology is very close to that of the InP-based HEMT 相似文献
4.
Chen Y.-K. Nottenburg R.N. Panish M.B. Hamm R.A. Humphrey D.A. 《Electron Device Letters, IEEE》1989,10(10):470-472
The authors report the first low-noise InP/InGaAs heterostructure bipolar transistor (HBT). Minimum noise figures of 0.46, 2.0, and 3.33 dB were measured at 2, 10, and 18 GHz, respectively. The noise performance of this InP/InGaAs HBT with an emitter size of 3.5×3.5 μm2 is compared to that for FETs having a 1-μm gate length. The measured minimum noise figures agree well with calculated data using a modified Hawkins model. Broadband low-noise operation is observed because of the short transit time for injected nonequilibrium electrons to transverse the base and collector depletion region 相似文献
5.
GaAs MESFETs with advanced LDD structure have been developed by using a single resist-layered dummy gate (SRD) process. The advanced LDD structure suppresses the short channel effects, and reduces source resistance, while maintaining a moderate breakdown voltage. The 0.3-μm enhancement-mode devices exhibit a transconductance of 420 mS/mm, while the breakdown voltage of the depletion-mode device (Vth=-500 mV) is larger than 6 V. The standard deviation of the threshold voltage for 0.3-μm devices is less than 30 mV across a 3-in wafer. The 0.3-μm devices exhibit an average cutoff frequency of 47.2 GHz with a standard deviation of 1.3 GHz across a 3-in wafer. The cutoff frequency of a 0.15-μm device is as high as 72 GHz. D-type flip-flop circuits for digital IC applications and preamplifier for analog IC applications fabricated with 0.3-μm gate length devices operate above 10 Gb/s. In addition, the 0.3-μm devices also show good noise performance with a noise figure of 1.1 dB with associated gain of 6.5 dB at 18 GHz. These results demonstrate that GaAs MESFETs with an advanced LDD structure are quite suitable for digital, analog, microwave, and hybrid IC applications 相似文献
6.
Enciso M. Aniel F. Crozat P. Adde R. Zeuner M. Fox A. Hackbarth T. 《Electronics letters》2001,37(17):1089-1090
RF and microwave noise performances of strained Si/Si0.58 Ge0.42 n-MODFETs are presented for the first time. The 0.13 μm gate devices have de-embedded fT=49 GHz, fmax =70 GHz and a record intrinsic gm=700 mS/mm. A de-embedded minimum noise figure NFmin=0.3 dB with a 41 Ω noise resistance Rn and a 19 dB associated gain Gass are obtained at 2.5 GHz, while NFmin=2.0 dB with Gass=10 dB at 18 GHz. The noise parameters measured up to 18 GHz and from 10 to 180 mA/mm with high gain and low power dissipation show the potential of SiGe MODFETs for mobile communications 相似文献
7.
Metze G.M. Cornfeld A. Carlson E. Dahrooge G. Chang E. Singer J. Bass J. Hung H.-L. Lee T. 《Electron Device Letters, IEEE》1989,10(4):165-167
The development of V -band low-noise monolithic microwave integrated circuits (MMICs) based on pseudomorphic modulation-doped FETs (P-MODFETs) is presented. These dual-stage MMICs incorporate P-MODFETs, with 0.35-μm×60-μm gates, as the active elements, electron-beam-written tuning elements, and DC-blocking and bias networks. The dual-stage chips exhibited a maximum gain of 10.2 dB at 59.5 GHz and a minimum noise figure of 5.3 dB, with an associated gain of 8.2 dB at 58.2 GHz. A cascaded four-stage amplifier using two MMIC modules exhibited 5.8-dB minimum noise figure with an associated gain of 18.3 dB at 58 GHz and up to 21.1 dB of maximum gain 相似文献
8.
Tan K.L. Dia R.M. Streit D.C. Han A.C. Trinh T.Q. Velebir J.R. Liu P.H. Lin T. Yen H.C. Sholley M. Shaw L. 《Electron Device Letters, IEEE》1990,11(7):303-305
Low-noise planar doped pseudomorphic (PM) InGaAs high-electron-mobility transistors (HEMTs) with a gate length of 0.1 μm for W -band operation are discussed. These devices feature a multiple-finger layout with air bridges interconnecting the sources to reduce gate resistance. The device exhibits a minimum noise figure of 2.5 dB with an associated gain of 4.7 dB at 92.5 GHz. This result demonstrates the feasibility of using PM InGaAs HEMTs for W -band low-noise receivers without the need for using lattice-matched InP HEMTs 相似文献
9.
Lau C.L. Feng M. Lepkowski T.R. Wang G.W. Chang Y. Ito C. 《Electron Device Letters, IEEE》1989,10(9):409-411
Ion-implanted GaAs MESFETs with half-micrometer gate length have been fabricated on 3-in-diameter GaAs substrates. At 16 GHz, a minimum noise figure of 0.8 dB with an associated gain of 6.3 dB has been measured. This noise figure is believed to be the lowest ever reported for 0.5- and 0.25-μm ion-implanted MESFETs, and is comparable to that for 0.25-μm HEMTs at this frequency. By using the Fukui equation and the fitted equivalent circuit model, a K f factor of 1.4 has been obtained. These results clearly demonstrate the potential of ion-implanted MESFET technology for K -band low-noise integrated circuit applications 相似文献
10.
Moon J.S. Micovic M. Kurdoghlian A. Janke P. Hashimoto P. Wong W.-S. McCray L. Nguyen C. 《Electron Device Letters, IEEE》2002,23(11):637-639
We report low microwave noise performance of discrete AlGaN-GaN HEMTs at DC power dissipation comparable to that of GaAs-based low-noise FETs. At 1-V source-drain (SD) bias and DC power dissipation of 97 mW/mm, minimum noise figures (NF/sub min/) of 0.75 dB at 10 GHz and 1.5 dB at 20 GHz were achieved, respectively. A device breakdown voltage of 40 V was observed. Both the low microwave noise performance at small DC power level and high breakdown voltage was obtained with a shorter SD spacing of 1.5 /spl mu/m in 0.15-/spl mu/m gate length GaN HEMTs. By comparison, NF/sub min/ with 2 /spl mu/m SD spacing was 0.2 dB greater at 10 GHz. 相似文献
11.
Ion-implanted GaAs MESFETs with gate lengths of 0.3 and 0.5 μm have been fabricated using optical lithography. The devices with 0.3- and 0.5-μm gate lengths exhibit extrinsic transconductances, at zero gate bias, of 200 and 180 mS/mm at drain currents of 400 and 420 mA/mm, respectively. The gate-to-drain diode characteristics of these two different gate-length devices show similar breakdown voltages of 13-15 V. From S-parameter measurements, current-gain cutoff frequencies, f ts, of 56 and 30 GHz are obtained for 0.3- and 0.5-μm gate-length devices, respectively. The high drain current-voltage product and the microwave performance indicate that ion-implanted technology has the potential to be used to manufacture power devices for millimeter-wave applications 相似文献
12.
Mishra U.K. Brown A.S. Delaney M.J. Greiling P.T. Krumm C.F. 《Microwave Theory and Techniques》1989,37(9):1279-1285
The status of lattice-matched high-electron-mobility transistors (HEMTs) and pseudomorphic AlInAs-GaInAs grown on In substrates is reviewed. The best lattice-matched devices with 0.1-μm gate length had a transconductance g m=1080 mS/mm and a unity current gain cutoff frequency f T=178 GHz, whereas similar pseudomorphic HEMTs had g m=1160 mS/mm and f T=210 GHz. Single-stage V -band amplifiers demonstrated 1.3- and 1.5-dB noise figures and 9.5- and 8.0-dB associated gains for the lattice-matched and pseudomorphic HEMTs, respectively. The best performance achieved was a minimum noise figure of F min=0.8 dB with a small-signal gain of G a=8.7 dB 相似文献
13.
Ferlet-Cavrois V. Marcandella C. Musseau O. Leray J.L. Pelloire J.L. Martin F. Kolev S. Pasquet D. 《Electron Device Letters, IEEE》1998,19(7):265-267
This paper shows for the first time the high-performances of a partially depleted 0.18-μm technology at low supply voltage. The SOI technology uses a standard digital process with a TiSi 2 salicided polysilicon gate and a low dose SIMOX substrate. The process does not include any specific feature like T-gate, or high-resistivity SOI substrate. At 1 V, and 2 GHz the current gain and the unilateral power gain are higher than 15 dB for both 0.18 μm gate length NMOS and PMOS transistors. At 1.5 V, the 0.18-μm NMOS and PMOS show a transition frequency of, respectively, 51 GHz and 23 GHz and a maximum oscillation frequency of 28 GHz and 13 GHz. These results have been obtained with an optimized transistor geometry to reduce the influence of the access resistances. The high-frequency potential of this 0.18-μm SOI technology demonstrates the possible integration of microwave functions with digital circuits on a single chip for low-power, low-voltage applications like wireless telecommunication 相似文献
14.
A study of the high-frequency performance of short-gate ion-implanted GaAs MESFETs with gate lengths of 0.3 and 0.5 μm is discussed. Excellent DC and microwave performance have been achieved with an emphasis on the reduction of effective gate length during device fabrication. From f t of 83 and 48 GHz for 0.3-0.5-μm gate devices, respectively, an electron velocity of 1.5×107 cm/s is estimated. An f t of 240 GHz is also projected for a 0.1-μm-gate GaAs MESFET. These experimental results are believed to be comparable to those of the best HEMTs (high-electron-mobility transistors) reported and higher than those generally accepted for MESFETs 相似文献
15.
Hanyu I. Asai S. Nunokawa M. Joshin K. Hirachi Y. Ohmura S. Aoki Y. Aigo T. 《Electronics letters》1988,24(21):1327-1328
A T-shaped quarter-micron gate structure composed of WSix /Ti/Pt/Au has been developed for low-noise AlGaAs/GaAs HEMTs. The gate resistance R g was reduced to 0.3 Ω for devices with 200 μm-wide gates despite using WSix, and the source resistance R s reached 0.28 Ω mm by minimising the source-gate distance using a self-alignment technique. This HEMT exhibited the lowest reported noise figure of 0.54 dB with an associated gain of 12.1 dB at 12 GHz 相似文献
16.
The authors developed 0.15-μm-gate pseudomorphic n-InGaP/InGaAs/GaAs HEMTs for low-noise amplifiers. Passivated devices exhibited a noise figure of 0.41 dB with an associated gain of 13.0 dB at 12 GHz including package loss, and of 1.2 dB with an associated gain of 5.8 dB at 50 GHz. Reducing the short-channel effects was the key to achieving the best performance ever reported for passivated and packaged low-noise HEMTs on GaAs substrates. A high aspect ratio under the thin n-InGaP layer and good carrier confinement in the pseudomorphic InGaAs channel reduce the undesirable short-channel effects in these devices 相似文献
17.
An 0.12 μm gate length direct ion-implanted GaAs MESFET exhibiting excellent DC and microwave characteristics has been developed. By using a shallow implant schedule to form a highly-doped channel and an AsH3 overpressure annealing system to optimize the shallow dopant profile, the GaAs MESFET performance was further improved. Peak transconductance of 500 mS/mm was obtained at Ids =380 mA/mm. A noise figure of 0.9 dB with associated gain of 8.9 dB were achieved at 18 GHz. The current gain cutoff frequency fmax of 160 GHz indicates the suitability of this 0.12 μm T-gate device for millimeter-wave IC applications 相似文献
18.
Lau C.L. Feng M. Schellenberg J. Brusen P. Lepkowski T. Hwang T. Ito C. 《Electron Device Letters, IEEE》1991,12(5):244-245
The authors report the 60-GHz noise performance of low-noise ion-implanted InxGa1-xAs MESFETs with 0.25 μm T-shaped gates and amplifiers using these devices. The device noise figure was 2.8 dB with an associated gain of 5.6 dB at 60 GHz. A hybrid two-state amplifier using these ion-implanted InxGa1-x As MESFETs achieved a noise figure of 4.6 dB with an associated gain of 10.1 dB at 60 GHz. When this amplifier was biased at 100% I dss, it achieved 11.5-dB gain at 60 GHz. These results, achieved using low-cost ion-implantation techniques, are the best reported noise figures for ion-implanted MESFETs 相似文献
19.
Tan K.L. Dia R.M. Streit D.C. Shaw L.K. Han A.C. Sholley M.D. Liu P.H. Trinh T.Q. Lin T. Yen H.C. 《Electron Device Letters, IEEE》1991,12(1):23-25
20.
Chao P.-C. Shur M.S. Tiberio R.C. Duh K.H.G. Smith P.M. Ballingall J.M. Ho P. Jabra A. 《Electron Devices, IEEE Transactions on》1989,36(3):461-473
Analytical modeling of these very-short-channel HEMTs (high-electron-mobility transistors) using the charge-control model is given. The calculations performed using this model indicate a very high electron velocity in the device channel (3.2±0.2×107 cm/s) and clearly demonstrate the advantages of the planar-doped devices as compared to the conventional uniformly doped HEMTs. Devices with different air-bridged geometries have been fabricated to study the effect of the gate resistance on the sub-0.1-μm HEMT performance. With reduced gate resistance in the air-bridge-drain device, noise figures as low as 0.7 and 1.9 dB were measured at 18 and 60 GHz, respectively. Maximum available gains as high as 13.0 dB at 60 GHz and 9.2 dB at 92 GHz, corresponding to an f max of 270 GHz, have also been measured in the device. Using the planar-doped pseudomorphic structure with a high gate aspect-ratio design, a noise figure of less than 2.0 dB at 94 GHz is projected based on expected further reduction in the parasitic gate and source resistances 相似文献