高速串行背板1OGbps信号传输性能仿真和分析

在高性能计算机系统中,10Gbps串行背板互连设计需求日益显现.作为超高频互连传输,10Gbps背板互连设计中准确仿真和有效分析其传输性能的难度越来越大.本文简要介绍10Gbps背板互连的设计难点,总结提出通道的判断标准.针对一种典型背板通道的设计进行建模和仿真,并通过S参数和传输眼图两种方式分析单通道的传输性能.同时,针对超高频信号串扰影响逐渐加大的现实,建立双通道模型,从S参数角度对近端和远端串扰进行分析,并从传输眼图的角度进行定量对比,结果表明两种分析结果能够符合一致,串扰影响完全可控.通道设计性能经测试可以满足10Gbps信号传输.     

基于FPGA的通用高速串行互连协议设计

为提高高速通信系统的数据传输带宽,设计了一种基于FPGA、采用8b/10b编/解码、可应用于芯片与芯片或背板与背板之间通信的通用高速申行互连传输协议。介绍了点对点传输、全双工通信的协议体系结构,论述了协议物理层中数据传输时的串/并数据转换方法和帧同步机制,给出了协议链路层中循环冗余校验码算法、扰码/解扰模块、数据封装格式以及链路层控制器的设计。实验结果表明,系统设计的16bit位宽数据经8b/10b编码后,串行速率达到了1.25Gbps。     

CPCI-E背板设计与仿真

CPCI-E背板的设计直接影响CPCI-E系统的性能。结合行业规范,设计一种具备高兼容性的CPCI-E背板。对背板中涉及的信号完整性问题进行分析,并做出针对性设计。通过仿真的方法验证设计的可行性。     

外置预加重均衡器在高速背板互联中的应用

<正>高速串行接口由于连接简单、数据吞吐量大和先天的共模干扰抑制优势,成为背板互联的首选接口。然而由于传输线、连接器以及过孔对高频信号的衰减,对于这些背板互联应用,如何保证信号的衰减被完全补偿,以及如何保证设计时留有足够的余量     

基于VPX的全网格互连底板设计

为了给VPX计算机组成模块之间的互连提供良好的通道和供电接口,通过研究VPX规范和信号完整性的相关理论,结合工程实践,提出了一套完整的基于VPX的全网格互连底板的设计方法.该设计方法中包含了基于VPX的全网格互连底板的设计思路和实现过程.在该方法中,对VPX计算机设计的难点进行了的描述和举例说明,其中对高速串行信号的完...     

如何进行100G背板性能的验证

高速背板是构建高性能数据平台的关键部件。目前热门的100G网络上单对差分线的数据速率已达到了25 Gb/s甚至更高。无论采用OIF组织制定的CEI-25G-LR背板规范还是IEEE组织制定的100GBase-KR4背板规范,面临的共同挑战是如何在这么高速率下提供背板应用场合需要的传输距离。当背板加工完成以后,需要进行一系列插入损耗、回波损耗、阻抗、串扰、信号传输眼图、传输误码率等,在系统调试阶段还需要对子卡发送的信号进行验证以排除可能的信号质量问题。本文对于100 Gb/s背板开发中可能遇到的挑战以及相应的测试方法进行了详细的介绍和讲解。     

高速背板连接器结构设计分析

本文对高速背板连接器壳体结构设计与端子结构设计进行了研究,分析了各类结构的实用意义,提出改善连接器稳定性与信号完整性的几种结构设计方法,以降低高速背板连接器设计过程中盲目性,提高其设计效率。     

Gbps串行链路信号完整性分析与设计

本文对影响Gbps串行链路信号完整性(SI)的主要原因进行了详细分析,提出了一系列改善信号完整性的解决方法和思想。实际设计了实验背板,测试结果验证了方法的有效性。     

基于FPGA的10Gbps光互连方案设计与验证

针对光、电传输特点和高速互连网络的特殊要求,通过分析光互连技术的发展历史和研究现状,提出了10Gb/s光互连技术可行性的设计方案;并为了验证该方案的可行性,采用试验的方式,完成了基于10Gb/s光互连的PCB实验板设计.从实验板的设计可发现:Framer FPGA在传统电互连和光互连间提供相应的协议转换和速率转换起着关键作用.     

基于零打扰测试背板的无线传感器网络测试平台

精确的网络运行状态监视和性能评估对于无线传感器网络的研究和实际部署具有极为关键的意义,而现有的测试技术和测试平台对无线传感器网络的自身运行存在一定的打扰,测试数据的精度也受限于传感器节点的硬件配置.针对现有测试技术和测试平台的缺陷,提出了内部侦听的测试方式,并进一步研发了基于零打扰测试背板的无线传感器网络测试平台.测试平台首先通过由额外的测试背板直接捕获传感器节点内部互连信号,产生测试数据;然后测试数据经由额外的传输网络传送到测试服务器,进行解析和预处理;最后,远程访问客户端通过订阅机制访问测试服务器上的测试数据,并对其分析和处理.测试平台在避免对无线传感器网络正常运行产生干扰的前提下,实现对运行时刻的无线传感器网络的高精度零打扰的透明测试.实验结果表明,基于零打扰测试背板的无线传感器网络测试平台可以对无线传感器网络进行信号分析、协议验证,并对性能进行精确的评估,     

A flexible full‐color AMOLED display driven by OTFTs

Abstract— Organic thin‐film‐transistor (OTFT) technologies have been developed to achieve a flexible backplane for driving full‐color organic light‐emitting diodes (OLEDs) with a resolution of 80 ppi. The full‐color pixel structure can be attained by using a combination of top‐emission OLEDs and fine‐patterned OTFTs. The fine‐patterned OTFTs are integrated by utilizing an organic semiconductor (OSC) separator, which is an insulating wall structure made of an organic insulator. Organic insulators are actively used for the OTFT integration, as well as for the separator, in order to enhance the mechanical flexibility of the OTFT backplane. By using these technologies, active‐matrix OLED (AMOLED) displays can be driven by the developed OTFT backplane even when they are mechanically flexed.     

Managing data storage in the network

The Internet backplane protocol, or IBP, supports logistical networking to allow applications to control the movement and storage of data between nodes. The protocol's name reflects its purpose: to enable applications to treat the Internet as if it were a processor backplane. IBP provides access to remote storage and standard Internet resources and directs communication between them with the IBP API. In short, the motivation behind IBP is to design, develop, implement, and deploy a layer of middleware that allows storage to be exploited as part of the Internet. IBP alpha versions have been in use since February 1999, and version 1.0 has been available since March 2001. The article describes the IBP API and presents some examples that show its strategic potential for builders of distributed applications. We also discuss a layered approach to functionality and deployment that uses IBP as a basic service and builds more useful services on top of it     

Development of rollable silicon thin‐film‐transistor backplanes utilizing a roll‐to‐roll continuous lamination process

Abstract— Rollable silicon thin‐film‐transistor (TFT) backplanes utilizing a roll‐to‐roll process have been developed. The roll‐to‐roll TFT‐backplane technology is characterized by a glass‐etching TFT transfer process and a roll‐to‐roll continuous lamination process. The transfer process includes high‐rate, uniform glass‐etching to transfer TFT arrays fabricated on a glass substrate to a flexible plastic film. In the roll‐to‐roll process, thinned TFT‐glass sheets (0.1 mm) and a base‐film roll are continuously laminated using a permanent adhesive. Choosing both an appropriate elastic modulus for the adhesive and an appropriate tension strength to be used in the process is the key to suppressing deformation of the TFT‐backplane rolls caused by thermal stress. TFT backplanes that can be wound, without any major physical damage such as cracking, on a roll whose core diameter is approximately 300 mm have been sucessfully obtained. Incorporating the TFT‐backplane rolls into other roll components, such as color‐filter rolls, will make it possible to produce TFT‐LCDs in a fully roll‐to‐roll manufacturing process.     

Post-processing and assembly of reflective microdisplays

Abstract— The performance and manufacturability of reflective displays can be enhanced by planarization, post-processing, and integrated assembly. Simplified methods for planarization and assembly of liquid-crystal-on-silicon (LCOS) microdisplays using polymeric resins are presented. Spin-cast benzocyclobutene (BCB) resin shows a six-fold reduction in step height on the surface of a typical LCOS backplane, at a cost significantly less than chemical mechanical polishing. Methods for dry-etching low-resistance contacts to the underlying circuitry and depositing high-reflectivity mirrors have been developed. In addition, photo-definable BCB resin has been utilized as both a spacer and adhesive technology in miniature-display assembly. Cell-gap thicknesses of 0.9–2.4 μm with 50–100-nm cell-gap variation and bonding shear strengths of 3200 ± 460 psi have been demonstrated, leading to wafer-scale assembly of LCOS cells. The photo-BCB spacer and adhesive technology is compatible with common liquid-crystal-alignment techniques. In this paper, the methods and results of LCOS backplane planarization, post-processing, and integrated display assembly are described.     

Flexible electrophoretic display driven by solution‐processed organic thin‐film transistors

Abstract— An organic thin‐film‐transistor (OTFT) backplane has been fabricated by using a solution‐processed organic semiconductor (OSC) and organic insulators. The OSC, a peri‐xanthenoxanthene derivative, provides a mobility of 0.5 cm²/V‐sec. These organic materials enhance the mechanical flexibility of the backplane. The developed backplane successfully drives a 13.3‐in. flexible UXGA electrophoretic display that can operate when bent at a radius of 5 mm.     

基于SerDes的千兆以太网设计与实现

采用SerDes作为物理层来实现背板互联,使各个插接到背板上的单元板通过千兆以太网协议互联起来。简要介绍了系统的基本架构和互联方式后,运用Ahera公司的CycloneⅣ芯片实现的千兆以太网接口通过SerDes与Broadcom公司的千兆以太网交换芯片互联。最后给出了该设计的测试结果和结论。     

A flexible 2.1‐in. active‐matrix electrophoretic display with high resolution and a thickness of 100 μm

Abstract— A paper‐thin QVGA, flexible 2.1‐in. active‐matrix electrophoretic display (AMEPD) that features 100‐μm thick and a 192‐ppi resolution has been developed. An LTPS‐TFT backplane with integrated peripheral driver circuits was first fabricated on a glass substrate and then transferred to a very thin (30‐μm) plastic film by employing surface‐free technology by laser ablation/annealing (SUFTLA®). A micro‐encapsulated electrophoretic imaging sheet was laminated on the backplane. A supporting substrate was used to support the LTPS‐TFT backplane. Fine images were successfully displayed on the rollable AM‐EPD. The integrated driver circuits dramatically reduce the number of external connection terminals, thus easily boosting the reliability of electrical connections even on such a thin plastic film.     

Artificial intelligence-assisted auto-optical inspection toward the stain detection of an organic light-emitting diode panel at the backplane fabrication step

This paper attempts to implement an auto-optical inspection (AOI) system using artificial intelligence (AI) technology for cost reduction in the production of organic light emitting diode (OLED) panels, specifically at the production stage of the thin film transistor (TFT) . Further, to improve the accuracy of mura detection, the possible causes of mura were properly identified, and a model to control and predict mura occurrence was realized based on the sufficient analysis of these causes. More specifically, an explainable AI (XAI) prediction model was developed using the fab image and test element group (TEG) engineering methods, which could be applied as input data for the circuit simulations to improve the accuracy of the overall simulations. Initially, we attempted to predict backplane stain using only the TFT width, length dimension, and resistance–capacitance (RC) extraction data, but the results were not accurate. Consequently, we identified, via sufficient analysis, that the correlation between the dehydrogenation and stain, and introduced an AI model. As a result, the accuracy was improved from 50 to 80%, which is more effective in terms of time and cost, compared to conventional simulation through the TCAD analysis. Overall, by implementing the inspection method described in this paper, it was possible to detect stains at the backplane stage, which was only possible during the final test stage, thereby resulting in significant cost savings.     

基于PXI的通用数据采集系统

简要介绍了针对多种数据类型的采集系统的硬件结构和基于LABVIEW平台的软件实现,该系统采用美国NI公司的各类数据采集板卡,能够对模拟信号、数字信号以及图像信号进行实时采集和显示。并且能够进行存储和回放;采集过程中。通过运用PXI总线的背板时钟和同步触发功能,较好的解决了各种板卡之间的同步问题;实验表明。系统的实时性得到了很好的满足,信号之间的时序关系能够清楚地反映到虚拟示波器和图像窗口中,满足用户对于通用数据采集系统的要求。