如何选择48V电源母线架构

如何为电源系统选择最合适的架构和产品是工程师面临的一个困难选择     

An ultra-wideband transceiver architecture for low power, low rate, wireless systems

This paper presents the system architecture, modeling, and design constraints for a baseband, integrated, CMOS, impulse ultra-wideband transceiver targeting very low power consumption on the order of 1 mW. Intended for a sensor network application, the radio supports low communication rates (/spl sim/100 kpbs) and ranging capabilities over short distances (/spl sim/10 m). Based on a "mostly digital" architecture, the analog complexity is reduced by moving the A/D convertor as close to the antenna as is reasonable. Pulses are generated from simple digital switches, overlaying the signal energy on the lower FCC UWB band (0-960 MHz). Reception is achieved using baseband gain blocks feeding a time-interleaved bank of low resolution A/D converters. A window of energy is captured in time and fed to the digital backend for processing. To save power and area, the digital backend implements only a pulse template correlation filter block overlaid with an additional spreading code. As a pulse template is used, no specific channel estimation or interference cancellation is assumed. The system performance is quantified for this case and implementation tradeoffs are explored with a strong focus on reducing power consumption. In particular, the issues of modulation choice, clock generation, gain and noise figure, ADC resolution, and digital signal processing requirements will be discussed.     

智能电网调度控制系统数据总线技术

数据总线技术是当前应用比较广泛的一种信息传输技术,信息传输速率很高、稳定性高,具有一定的可扩展性,而且能够用于越来越复杂的信息传输业务.本文对数据总线技术在智能电网调度控制系统中的应用进行分析与探讨.     

一种数据链集成架构

目前数据链集成需要统一的解决方案。通过对美军数据链集成发展现状的分析,给出了一种基于统一的软/硬件接口标准,通过构建通用信息处理服务、通用多数据链平台接口和通用数据链端机接口来实现的一种集成框架,并给出了典型平台集成应用,提出了实现该架构的关键技术,可以有效解决数据链平台集成和多链集成应用问题。     

高速率数据均衡器并行结构新算法

针对卫星信道高速率数据传输中的幅频特性和群时延特性的不理想,经过细致的理论分析和推导,提出了一种新的均衡器并行结构来解决此问题。介绍了系统和信道模型、以及横向均衡器的实现,最后详细阐述了并行结构算法。通过仿真证明了算法的可行性和有效性,对今后的工程实现起到了必要的验证作用。     

A 40-ns 64-Mb DRAM with 64-b parallel data bus architecture

The authors describe circuit techniques for wide input/output (I/O) data path and high-speed 64-Mb dynamic RAMs (DRAMs). A hierarchical data bus structure using double-level metallization has been developed to form 64-b parallel data bus lines without increasing the chip size. A current-sensing data bus amplifier, developed to sense the 64-b data bus signal in parallel, has made the wide I/O data path structure possible. A direct-sensing type column gate circuit with the READ/WRITE separated select line scheme achieves 40-ns RAS access. A shielded bit-line three-dimensional stacked-capacitor cell with a double-fin storage capacitor stores sufficient charge while the bit-line capacitance shows a reasonable value for sensing the data     

Low power high data rate wireless endoscopy transceiver

A low power high data rate wireless endoscopy transceiver is presented. Transceiver architecture, circuit topologies and design trade-offs have been considered carefully to satisfy the tight requirements of the medical endoscopy capsule: lower power consumption, high integration degree and high data rate. The prototype, implemented in 0.25 μm CMOS, integrates a super-heterodyne receiver and a super-heterodyne transmitter on a single chip together with an integrated RF local oscillator and LO buffers. The digital modulation and demodulation is also implemented in analog field and no data converters are needed for the whole endoscopy capsule. The measured sensitivity of the receiver is about −70 dBm with a data rate 256 kbps, and the measured output power of the transmitter could achieve −23 dBm with a data rate 1 Mbps. The transceiver operates from a power supply of 2.5 V, while only consuming 15 mW in receiver (RX) mode and 14 mW in transmitter (TX) mode.     

An FM subcarrier data broadcast on bus transportation statusindication system

FM Subsidiary Communication Authorization (SCA) has been used to broadcast background music for a long time. Analog audio programs or digital data transmission services, utilizing SCAs, such as paging, stock market and headline news updates are common in people's daily life. Some demonstrations have been offered in the past to broadcast fax messages and some studies dealing with broadcasting video programs over the FM SCA channels. This paper focuses on using the FM SCA subchannel to transmit bus service status. This application provides the transmission of accurate status of public bus transportation services in order to offer better services. The status can be displayed on bus stations display boards or on personal computer receivers     

An asymptotically least-favorable Chernoff bound for a large class of dependent data processes

It is desired to determine the worst-case asymptotic error probability performance of a given detector operating in an environment of uncertain data dependency. A class of Markov data process distributions is considered which satisfy a one-shift dependency bound and agree with a specified univariate distribution. Within this dependency contamination class the distribution structure which minimizes the exponential rate of decrease of detection error probabilities is identified. This is a uniform least-favorability principle, because the least-favorable dependency structure is the same for all bounded memoryless detectors. The error probability exponential rate criterion used is a device of large deviations theory. The results agree well with previous results obtained using Pitman's asymptotic relative efficiency (ARE), which is a more tractable small-signal performance criterion. In contrast to ARE, large deviations theory is closely related to finite-sample error probabilities via the finite-sample Chernoff bounds and other exponentially tight bounds and other approximations.     

Distributed joint rate and power control game-theoretic algorithms for wireless data

In this letter, we consider two distributed game theoretic algorithms to jointly solve the problem of optimizing the transmission rates and transmit powers for future wireless data communication systems. We then establish the existence, uniqueness and Pareto optimality of Nash equilibria of both games.     

An integrated low power system architecture for spectrum sensing enabled cognitive radios

Continuous rise in the number of users as well as the increased requirement of bandwidth per user has created a need to use the spectrum efficiently. Cognitive radios are solutions proposed to address the problem of using the spectrum efficiently. Regulatory bodies around the world, FCC included, have introduced specifications intended for cognitive radio applications. TV White Space devices, which operate in the spectrum holes caused by transition from analog to digital transmission, were the first targeted applications for cognitive radio specifications (IEEE 802.22, ECMA-392). However, to maximize the potential of the idea of cognitive radios it is desirable to be able to sense the spectrum across a wide band and accordingly transmit ??smartly??. This paper presents a possible transceiver architecture meant for integrated solutions while providing tentative block level specifications for the proposed architecture. Existing spectrum sensing techniques are discussed and an integrated low power system architecture at the PHY level suitable for waveform-based spectrum sensing technique that utilizes co-operative spectrum sensing methods is proposed.     

BiLink: A high performance NoC router architecture using bi-directional link with double data rate

This paper presents a novel high performance Network-on-Chip (NoC) router architecture design using a bi-directional link with double data rate (BiLink). Ideally, it can provide as high as 2 times speed-up compared with the conventional NoC router. BiLink utilizes an extra link stage between routers and transmits two flits in one link per cycle using phase pipelining if both routers require to use the current link. To further increase the effective bandwidth, the direction of each link can be configured in every clock cycle to cater for different traffic loads from each side. Therefore, the data rate can be as high as 4 times compared with conventional NoC routers under uneven traffic. Centralized mode control scheme is implemented using a finite state machine (FSM) approach. Cycle-accurate simulations are carried out on both synthetic traffic patterns as well as real application benchmarks. Simulation results show that BiLink can provide as high as 90% and 250% speedup compared with conventional NoC routers for even and uneven traffic, respectively. 2X and 3X gains in throughput are obtained under even and uneven traffic, respectively, when compared with the conventional NoC router for the virtual channel flow control. The BiLink router architecture is synthesized using TSMC 65 nm process technology and it is shown that an area overhead of 28% over state-of-the-art bi-directional NoC is introduced while the critical path is about 9% higher than that of the conventional routers. Despite the overhead in critical path and power consumption, a 47.45% improvement of Energy-Delay-Product (EDP) is achieved by BiLink under high injection rate traffic.     

An all digital receiver architecture for bandwidth efficienttransmission at high data rates

Using the maximum-likelihood approach, algorithms for detection and synchronization are derived that are well suited for VLSI implementation. Special emphasis is placed on an all-digital implementation where carrier and clock synchronization do not require a feedback of signals to the analog part, which simplifies the analog front-end design (mixing oscillator and A/D converter sampling clock run at fixed frequency). An important advantage of the proposed algorithms is that a high clock rate is not required; only two-four times the symbol rate is needed, depending on amplitude quantization. Implementation aspects, e.g. architecture, and quantization, are considered. A prototype is described which was implemented to prove the feasibility of the concept and to evaluate the performance under practical conditions     

一种相控阵雷达自适应数据率目标跟踪算法

为了提高相控阵雷达机动目标跟踪的系统资源利用率,给出了一种高效快速的自适应数据率交互多模型目标跟踪算法（FAIMM）,将目标数据更新时间与模型概率关联起来,使每一节拍的数据更新率随目标的瞬时机动特性自适应调整。仿真结果表明,与AIMM跟踪算法相比,自适应数据率跟踪算法准确率更高,系统资源消耗更少。     

适于视频应用的高数据传输率集成CMOS收发机

这篇文章给出了一个5GHz CMOS射频收发机的设计方案。此设计采用0.18微米射频CMOS加工工艺,集合了最新IEEE802.11n的特性例如多输入多输出技术的专利协议以及其他无线技术,可提供应用在家庭环境中的实时高清电视数据的无线高速传输。设计频率涵盖了从4.9GHz到5.9GHz的ISM频带,每个射频信道的频宽为20MHz。收发机采用了直接上变频发射器和低中频接收器的结构。在没有片上校准的情况下,设计采用双正交直接上变频混频器,得到了超过35dB的镜像抑制。测试结果得到6dB接收机噪声系数以及在-3dBm输出功率时得到发射机EVM结果优于33dB。     

An experimental procedure for characterizing interconnects to theDC power bus on a multilayer printed circuit board

The effectiveness of DC power bus decoupling is impacted by the inductance associated with interconnect vias in printed circuit boards (PCBs). Adequate characterization of these interconnects is necessary to facilitate modeling and simulation, and to assess the effectiveness of added decoupling. A measurement procedure is presented for determining the series inductance and resistance of an interconnect with a network analyzer. The validity and limitations of the procedure are discussed. Experimental results of interconnect parameters on an 8×10 in ten-layer test-board corroborate those measured with a precision impedance analyzer. The measured interconnect values are used to simulate several cases of power-bus decoupling which show good agreement with two-port swept frequency measurements     

基于CAN总线的灌区低功耗温湿度采集系统设计

由于灌区自然环境恶劣,观测点多且布局分散。为了分析灌区水量调配对温湿度监测的需求,设计开发了一种基于CAN总线和MSP430单片机相结合的低功耗温湿度采集系统。温湿度信号采集采用SHT10数字温湿度传感器,通过SPI总线技术与控制器进行通信,并引进CAN总线通信技术实现终端数据的传输。相比其他总线技术,CAN总线具有抗干扰能力强、数据的传输速率高、传输距离远、可靠性及性价比高等优点。设计中拟采用Microchip公司生产带SPI接口的CAN控制器MCP2515为CAN通信模块。     

一种高效的短波高速数传迭代合并均衡算法

针对电离层信道深衰落导致的短波高速率数据通信误码率急剧升高的问题,利用最小均方误差准则提出一种迭代合并均衡快速算法.算法根据串行高速数据波形的传输特点,构造了基于块处理的合并均衡器,通过增加软信息转换模块,实现了与译码器的软信息迭代.由于充分利用了时域和空域信息,算法获得了较大的性能增益.仿真结果表明:所提算法的误码率比原有均衡算法相比明显下降而计算量与之相当,因而能更好地适用于实际系统.     

An efficient data rate maximization algorithm for OFDM based wireless networks

In this paper we present a computationally efficient, suboptimal integer bit allocation algorithm that maximizes the overall data rate in multiuser orthogonal frequency division multiplexing (OFDM) systems implemented in wireless networks. Assuming the complete knowledge of a channel and allowing a subchannel to be simultaneously shared by multiple users we have solved this data rate maximization problem in two steps. The first step provides subchannel assignment to users considering the users’ requests on quality of service (QoS) expressed as the minimum signal-to-noise ratio (SNR) on each subchannel. The second step provides transmit power and bit allocation to subchannels in order to maximize the overall data rate. To reduce computational complexity of the problem we propose a simple method which assigns subchannels to users and distributes power and bits among them. We have analyzed the performance of our proposed algorithm by simulation in a multiuser frequency selective fading environment for various signal-to-noise ratios and various numbers of users in the system. We have concluded that our algorithm, unlike other similar algorithms, is suitable for OFDM wireless networks, especially when signal-to-noise ratio in the channel is low. Also, the results have shown that the total data rate grows with the number of users in the system.