共查询到17条相似文献,搜索用时 156 毫秒
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对称薄膜双栅nMOSFET模型的研究 总被引:1,自引:0,他引:1
利用对称薄膜双栅MOSFET在阈值电压附近硅膜中的常电位近似,以硅膜达到体反型时的泊松方程为基础,得到一个有效的双栅nMOS器件模型.考虑到薄膜双栅SOI器件的体反型特性,阈值电压处的表面势不再受限于传统的强反型界限(指2倍费米势),并运用跨导最大变化(TC)法对此模型进行分析,得到阈值电压和阈值电压处表面势的详细表达式;另外,还演示了薄膜双栅MOSFET的近乎完美的亚阈值斜率特性,其数值模拟结果与文献实验结果吻合较好. 相似文献
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报道了一种适于模拟 n沟 4H-Si C MOSFET直流 I-V特性的整体模型。该模型充分考虑了常温下 Si C中杂质不完全离化以及界面态电荷在禁带中不均匀分布的影响 ,通过解析求解泊松方程以及牛顿 -拉夫森迭代计算表面势 ,得到了表面电场以及表面势的分布 ,并以此为基础采用薄层电荷近似 ,计入栅压引起的载流子迁移率退化效应 ,导出了可用于所有器件工作区的统一漏电流解析表达式。当漏偏压为 1 0 V,栅压为 1 2 V时 ,模拟得到的饱和漏电流接近 40 m A。计算结果与实验值符合较好。 相似文献
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在沟道源端一侧引入高掺杂Halo结构的异质栅SOI MOSFET,可以有效降低亚阈值电流.通过求解二维泊松方程,为该器件建立了亚阈值条件下的表面势模型.利用常规漂移.扩散理论,在表面势模型的基础上,推导出新结构器件的亚阈值电流模型.为了求解简单,文中给出了一种分段近似方法,从而得到表面势的解析表达式.结果表明,所得到的表面势解析表达式和确切解的结果高度吻合.二维器件数值模拟器ISE验证了通过表面势解析表达式得到的亚阈值电流模型,在亚阈值区二者所得结果吻合得很好. 相似文献
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在沟道源端一侧引入高掺杂Halo结构的异质栅SOI MOSFET,可以有效降低亚阈值电流.通过求解二维泊松方程,为该器件建立了亚阈值条件下的表面势模型.利用常规漂移.扩散理论,在表面势模型的基础上,推导出新结构器件的亚阈值电流模型.为了求解简单,文中给出了一种分段近似方法,从而得到表面势的解析表达式.结果表明,所得到的表面势解析表达式和确切解的结果高度吻合.二维器件数值模拟器ISE验证了通过表面势解析表达式得到的亚阈值电流模型,在亚阈值区二者所得结果吻合得很好. 相似文献
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亚50nm自对准双栅MOSFET的结构设计 总被引:1,自引:1,他引:0
描述了一种用综合性方法设计的亚50nm自对准双栅MOSFET,该结构能够在改进的主流CMOS技术上实现.在这种方法下,由于各种因素的影响,双栅器件的栅长、硅岛厚度呈现出不同的缩减限制.同时,侧面绝缘层在器件漏电流和电路速度上表现出特有的宽度效应.建立了关于这种效应的模型,并提供了相关的设计指导.另外,还讨论了一种新型的沟道掺杂设计,命名为SCD.利用SCD的DG器件能够在体反模式和阈值控制间取得较好的平衡.最后,总结了制作一个SADG MOSFET 的指导原则. 相似文献
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描述了一种用综合性方法设计的亚50nm自对准双栅MOSFET,该结构能够在改进的主流CMOS技术上实现.在这种方法下,由于各种因素的影响,双栅器件的栅长、硅岛厚度呈现出不同的缩减限制.同时,侧面绝缘层在器件漏电流和电路速度上表现出特有的宽度效应.建立了关于这种效应的模型,并提供了相关的设计指导.另外,还讨论了一种新型的沟道掺杂设计,命名为SCD.利用SCD的DG器件能够在体反模式和阈值控制间取得较好的平衡.最后,总结了制作一个SADG MOSFET 的指导原则. 相似文献
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An analytic drain current model is presented for doped short-channel double-gate MOSFETs with a Gaussian-like doping profile in the vertical direction of the channel.The present model is valid in linear and saturation regions of device operation.The drain current variation with various device parameters has been demonstrated. The model is made more physical by incorporating the channel length modulation effect.Parameters like transconductance and drain conductance that are important in assessing the analog performance of the device have also been formulated.The model results are validated by numerical simulation results obtained by using the commercially available ATLASTM,a two dimensional device simulator from SILVACO. 相似文献
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Analytical solutions to drain current, depletion and inversion charges for MOSFETs with an ideally abrupt retrograde doping profile in the channel are derived based on the charge sheet model. The validity of the analytical solutions is confirmed by comparing the modeling results with simulation data obtained using numerical calculations; the modeling and simulation results are in excellent agreement. It is shown that the inclusion of an intrinsic surface layer in the channel causes a voltage shift in the drain current, in accordance with experimental observations. For the depletion charge, an analytical expression principally identical to that for the uniformly doped body case is found with a simple replacement of the surface potential, ψs, by the potential at the interface between the intrinsic surface layer and the doped substrate, ψξ. 相似文献
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F. Lime R. RitzenthalerM. Ricoma F. MartinezF. Pascal E. MirandaO. Faynot B. Iñiguez 《Solid-state electronics》2011,57(1):61-66
In this paper, a new compact charge based DC model for the drain current of long channel fully depleted ultra-thin body SOI MOSFETs and asymmetric double-gate MOSFETs with independent gate operation (ADGMOSFETs) is presented. The model was validated by both TCAD simulations and electrical measurements with a good agreement. In particular, great care was taken during the derivation of the model in order to respect the physics of the device and to make the correct approximations. The obtained solutions can be viewed as a generalization of classical MOS theory to the case of undoped fully depleted ADGMOS. As a result, the model consists of relatively simple equations and is a promising approach for the compact modeling and parameter extraction of fully depleted SOI transistors. 相似文献
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Darsen D. Lu Mohan V. DungaChung-Hsun Lin Ali M. NiknejadChenming Hu 《Solid-state electronics》2011,62(1):31-39
In this paper a computationally efficient surface-potential-based compact model for fully-depleted SOI MOSFETs with independently-controlled front- and back-gates is presented. A fully-depleted SOI MOSFET with a back-gate is essentially an independent double-gate device. To the best of our knowledge, existing surface-potential-based models for independent double-gate devices require numerical iteration to compute the surface potentials. This increases the model computational time and may cause convergence difficulties. In this work, a new approximation scheme is developed to compute the surface potentials and charge densities using explicit analytical equations. The approximation is shown to be computationally efficient and preserves important properties of fully-depleted SOI MOSFETs such as volume inversion. Drain current and charge expressions are derived without using the charge sheet approximation and agree well with TCAD simulations. Non-ideal effects are added to describe the I-V and C-V of a real device. Source-drain symmetry is preserved for both the current and the charge models. The full model is implemented in Verilog-A and its convergence is demonstrated through transient simulation of a coupled ring oscillator circuit with 2020 transistors. 相似文献
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The dc behavior of single-gate and double-gate MOSFETs with gate lengths ranging from 5 to 100 nm is simulated using drift-diffusion, hydrodynamic, and Monte Carlo approaches. It is shown that by simple adjustments of the drift-diffusion and hydrodynamic transport model parameters the Monte Carlo currents can be reproduced in the entire gate length range. The suitability of the different simulation methods for the simulation of nanometer MOSFETs is briefly discussed. 相似文献
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A. Tsormpatzoglou C.A. Dimitriadis G. Ghibaudo N. Collaert 《Microelectronic Engineering》2010,87(9):1764-1768
An analytical drain current model for undoped (or lightly-doped) symmetric double-gate (DG) MOSFETs is presented. This model is based on the subthreshold leakage current in weak inversion due to diffusion of carriers from source to drain and an analytical expression for the drain current in strong inversion of long-channel DG MOSFETs, both including the short-channel effects. In the saturation region, the series resistance, the channel length modulation, the surface-roughness scattering and the saturation velocity effects were also considered. The proposed model has been validated by comparing the transfer and output characteristics with simulation and experimental results. 相似文献